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2018-11-08COMPMID-1675: Add SVE supportGeorgios Pinitas
Change-Id: I86679adff556b6ffc9929b35cbf1b59b3958bdb1
2018-11-08COMPMID-1579: Add support for ChannelShuffle operator in NEONGeorgios Pinitas
Change-Id: I6d5f91579850906e1eb973ff6c5612195255e631
2018-11-08COMPMID-1773: Replaced Gemm wrapper for NEGEMM in NEWinogradPablo Tello
Change-Id: I68c648a5246fcdc67a496602089f93d65eb1d601
2018-11-06COMPMID-1451: Fix order of allocations in CLLSTMLayerMichele Di Giorgio
ArmNN reported an issue with padding in CLLSTMLayer. This was due to the fact that some tensors were allocated before they were passed to some configure functions which attempted to change the padding requirement on already allocated memory. Also, increase tolerance on number of mismatches for CLBBoxTransform FP16. Change-Id: Iad75b012be895693d0e553f3ab85f1ca7144e882
2018-11-06COMPMID-1328 Add support for BoxWithNMSLimit operator in CPPMichalis Spyrou
Change-Id: I5aae537372bf797fbb2a2bae81038f8963b041a9
2018-11-02COMPMID-1605: API alignment for the MemoryManager with ARMNNGeorgios Pinitas
Change-Id: Iac6a95ba7f388e65b7f1c8865c3e9bf289b233ea Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155490 Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1701: small cleanup NEWinogradConvolutionLayer.Pablo Tello
Change-Id: I0cf221c706c3d957423941d3aa9a9262dcb00c00 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155593 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Anthony Barbier <anthony.barbier@arm.com>
2018-11-02COMPMID-1413 - Improve the performance of GEMMLowp with 8 bit dot product on ↵Gian Marco Iodice
OpenCL COMPMID-1424 - Add dot product support for CLDepthwise QASYMM8 3x3 NHWC non-unit stride With this patch we are able to improve the performance of MobileNet v1-qasymm8 by 37 % Tried to use the dot product instruction in CLDepthwise QASYMM8 3x3 NHWC non-unit stride but I have not seen any benefit (maybe because we have few arithemtic operation and we do not have more load instructions). However Depthwise convolution has been improved by 30% Change-Id: Id768a99c2e53a04276707e427af5d0ec93419ada Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155082 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1451: Fix validation issue in CLReduceMeanMichalis Spyrou
Change-Id: Ie1bcdd9dca2dc3b26003790a19cc80bb953385b2 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155373 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: Remove invalid bias check in NEDeconvolutionLayerGeorgios Pinitas
Change-Id: Ibb6b0ceed19111c01fcc96eb50e461f9811b61b9 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155260 Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451 Properly remove dimensions in CLReduceMeanMichalis Spyrou
Change-Id: I7bd4a8ce81483ba56686b765ca3caabebe42882d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155000 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1451: Perform CLOutputStage using floats.Georgios Pinitas
Change-Id: Ic8312a5b6790aa7cd4468d42f08d557ad40e9441 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154570 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2018-11-02COMPMID-1451: Fuse activation in DepthwiseConvolution.Georgios Pinitas
Change-Id: Id964d9068e18aaa13ab8adcbf7a9375b034ea6c3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154651 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2018-11-02COMPMID-1327: Add support for BBoxTransform operator in CLgiuros01
Change-Id: I91865506166951b3bf7f06a0b2d4cde925cfefb6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153447 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1451:Fuse RELU,LU_BOUNDED_RELU with requantization in ↵Georgios Pinitas
NEGEMMConvolutionLayer. Change-Id: Iea5f2c5bcac8051c4c7655a6eabb2c43772eb31f Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154104 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2018-11-02COMPMID-1632 Add CLL2NormalizationLayer for NHWC and FP32Michalis Spyrou
Change-Id: Iae22554d5fe893fd22a000eab5bfd8275ea06eb3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154102 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1523: Fuse BN node with convolution.Georgios Pinitas
Change-Id: I146936c9e98b343496a4b61cdbadf0eaa38e885a Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154008 Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1580 Implement ReduceMean in NEONMichalis Spyrou
Change-Id: Id974efad304c2513b8824a6561ad45ee60b9e7fb Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153763 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1659: (Nightly) CLGEMMConvolutionLayer QASYMM8 TensorShape errorIsabella Gottardi
Change-Id: Ib4ca28b82bd82f0ed4d2c906185d3f4010246616 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153986 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: Fix allocation of weights in DeconvolutionMichele Di Giorgio
Change-Id: If3ca0b034a7448df1e5349b51a2b124f1b4e99c1 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153956 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1586: Add support for NHWC CLDeconvolutionLayerMichele Di Giorgio
COMPMID-1651: Fix QASYMM8 CLDeconvolutionLayer This patch also extends the range of values used for testing Convolution and Deconvolution to cover quantized [-1.0f, 1.0f]. Change-Id: I8b280669db67bb3ec25bf5d411c8f5954f5b0dab Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149869 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1574 Implement ReduceMean in OpenCLMichalis Spyrou
Change-Id: Id331199f569f52a37280a9ada5bf84694580b93c Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152843 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1451: Reverting changes for CLGEMM and CLGEMMLowp previuosly done ↵Isabella Gottardi
(384496) Mirroring CLGEMM behaviour to CLGEMMLowp Change-Id: I308b54e2c0de131a5322b77e83e7454db498d692 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153175 Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1621 Deconvolution wrong output calculationMichalis Spyrou
Change-Id: Ida71312bcf6dbd854f2ab1efc65f74910c79e152 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151510 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1451: Enable dot kernels in NEGEMMAssembly functionsGeorgios Pinitas
Change-Id: I9dd26b80025ea3a4c66f5f0bf41b7a98dd0d3aa4 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152549 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1630: Fixed broken DOTPROD detection.Pablo Tello
Change-Id: Ic857b938130c3d8713c9b414249cfabdcf846c2b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152451 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Vidhya Sudhan Loganathan <vidhyasudhan.loganathan@arm.com>
2018-11-02COMPMID-1607 - (Nightly) CLGEMMLowpMatrixMultiplyCore errors and mismatchesIsabella Gottardi
Change-Id: I5f2e6843526cb154176a5b113627d4f36c3a8edd Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150967 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1618 : Mobilenet QASYMM8 does not use dot prod kernel when ↵Vidhya Sudhan Loganathan
instrumentation timer is enabled issue description: cpu info was neither initialised in scheduler timer interceptor nor was it retrieved from real scheduler. Change-Id: Ibe75b0704250d99682ed866deaf3ddf5fda22de5 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151451 Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1559 : (Nightly) CLWinograd FP16 SIGABORT and mismatchesVidhya Sudhan Loganathan
Current implementation of winograd fp16 is not accurate enough for large runs. disabling its use and reopening ticket(COMPMID-1266) to fix it. The sigbus error that was originally reported against COMPMID-1559 is being tracked as COMPMID-1606 Change-Id: I45129aa366d5710402bc54b623c5fbfb865b3cd5 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151543 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02[COMPMID-1331] Add support for RoIAlign operator in CLgiuros01
Change-Id: Ie215daacd10477309dbf8af1bb2b05b7a0a8f203 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150773 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1519: Add support for 3D input/output in CLGEMMLowpOutputStageGeorgios Pinitas
Change-Id: I637add70310d2da4d82b236a6352af9d33be17a1 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149706 Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1596 Create UpsampleLayer for NEONMichalis Spyrou
Change-Id: I82d95c4f1c5fed13b213a2591cc2b4e0d0e02a54 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149676 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1518: Add support for GEMM3D in CLGEMMLowpMatrixMultiplyCoreGeorgios Pinitas
Change-Id: Ib14ac821ee5d4aff80bd602cd3e76e7018abb5e6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150268 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1590: Memory corruption in arm_compute_validation.Pablo Tello
RSH code only support padding SAME|VALID, this means we cannot call it with padx=1 for kernel size 5x5. The supporting padding values are 2 and 0. Fixed the problem by modifying the test shapes and added some asserts in NEWinogradConvolutionLayer. Change-Id: I4b73fa9d13c2200a47002965dc3b471d0f2cafba Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149883 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1540 Implement YOLOLayer on NEONMichalis Spyrou
Change-Id: Ice28996959dc666fff5e8ae486c1ff8093db083f Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148367 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1446 : Add support for 3D output in NEGEMMLowpOutputStageGeorgios Pinitas
Change-Id: I61e7d39d09a9936b1128ec04038fa2d8dfe6a2c8 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149211 Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1588 Create UpsampleKernel for YOLOLayerMichalis Spyrou
Change-Id: Ic1f9e85306a0a0b1459c9f9aa35bd629deea1710 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148797 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1564: Add NEDepthwiseConvolution3x3 for QASYMM8Georgios Pinitas
Change-Id: I1f55508af6f220e5f41df7b56daffb4761ed0591 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148253 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1532: Add DepthwiseConvolution3x3 FP16 on NEONGeorgios Pinitas
Change-Id: I780970f317b979b3230e2b471ac01df7fda9ee14 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148168 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
2018-11-02COMPMID-1563: Fix name of NEGEMMInterleavedWrapperAnthony Barbier
Change-Id: I5f868091cae7bd86eeeb7216d44f32c190c5a604 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147804 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1566: Add broadcast to CLArithmeticSubtractionGeorgios Pinitas
Change-Id: I05d21f9a92013ecfd1128d12cf1561cfd6e5c5e9 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147983 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
2018-11-02[COMPMID-1229] Implementing Pad on OpenCL -FP32/FP16Giuseppe Rossini
Change-Id: Ideead99410e5e0bda1035030af1bbcd0a65ea15e Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/144792 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1227 Implementing Space to Batch on OpenCLMichalis Spyrou
Change-Id: I6fd83d6584c56a4fd2470948f1987e23237c16d3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145577 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1563: Added a tag to ISCheduler::run_workloads to identify workloadsAnthony Barbier
Change-Id: Ieac59e3ccf47feab8f88c65200eb8a81b2eb4196 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147728 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1539 Implement YOLOLayer on CLGiorgio Arena
Change-Id: I332c0703e1399fca0c5b724529b54a28f49c88da Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146842 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1552: support kernels sizes 1x7, 7x1, 1x5, 5x1 in NEWinogradPablo Tello
Refactored the validate method to make it easier to maintain in the future when adding support for new kernels sizes Change-Id: I12d9fe7af15ceb0e655cef61ca94407558fb29e8 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146713 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
2018-11-02COMPMID-1556 - Add ReorgLayer to graph APIGian Marco Iodice
Change-Id: I50c13b5808f3cceec36b92e7afc027f47ebbdea4 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147369 Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Jenkins <bsgcomp@arm.com>
2018-11-02COMPMID-1555: Fix mismatch in EqualizeHistogram functionMichele Di Giorgio
Change-Id: I1fe346a360b2d9ddd8576a1d24ff66e78c95c1f2 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147049 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
2018-11-02[COMPMID-386] Github: Support SoftmaxLayer on different number of dimensions?giuros01
Change-Id: I7422b977538ff29930a90f078badc2edee78af93 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146638 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1527 - Implementing ReorgLayer on OpenCLGian Marco Iodice
Also extended tests on NEON Change-Id: Icb0eced534e904ef807972dd3a31988f501bb02e Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147095 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Jenkins <bsgcomp@arm.com>
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