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Change-Id: I563a885c9e78af746d74fc0a70d9bfcbf9c1ac1b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/141104
Reviewed-by: David Mansell <david.mansell@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Added IDs for A35/A75r0/A75r1/A76
Fixed variant encoding in midr
Update dot / fp16 support based on CPUInfo models detected
Change-Id: I308a453a4085fa192a92cf98db72c9dff749bb7d
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/140833
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: I0d981a06655cdd86c71fddbd07303d781577d0fd
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/132620
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Removed CPUTarget in favor of the CPUModel type.
CPUInfo now holds a vector of N CPUs.
CPUInfo autoinitialise upon construction with 1 GENERIC CPU.
CPPScheduler fills CPUInfo's vector upon construction (runtime).
IScheduler has a single CPUInfo obj and ThreadInfo always gets a pointer to it (avoid copying the vector)
Change-Id: I30f293258c959c87f6bac5eac8b963beb6a4d365
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/124626
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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