aboutsummaryrefslogtreecommitdiff
path: root/src/core
AgeCommit message (Collapse)Author
2021-02-18Set CLDirectConvolutionLayerKernel NCHW _border_size to input paddingGiorgio Arena
Change-Id: I5802c470683647b7426b3b6e7d17280cabc32163 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5100 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-16Fix data layout retention and handling of leftovers when there is no paddingMichele Di Giorgio
Resolves COMPMID-4258 Change-Id: I8782bf725cd0d376d538021406eb1f5be962b2cb Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/c/VisualCompute/ComputeLibrary/+/298627 Reviewed-by: Teresa Charlin Reyes <teresa.charlinreyes@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Teresa Charlin Reyes <teresa.charlinreyes@arm.com> Tested-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5082 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com>
2021-02-10Revert changes on tensor's strides and fix CLDepthwiseConvolution 3x3 QuantizedGiorgio Arena
- Revert changes in strides > num_dimensions. Set them to 0 - Fix offset calculcation in depthwise 3x3 quantized using select and stride_y for max offset Resolve COMPMID-4254 Change-Id: Ia99b9637f18b99b1fa3d4b7b4892046027d3e7e5 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5040 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-10Decouple CpuPoolingKernel data type and data layoutSheri Zhang
1. Decouple data layout for CpuPoolingKernel: NCHW & NHWC 2. Decouple data type for CpuPoolingKernel NHWC Partially solves: COMPMID-3999 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I3c6535eebdddeb467b7c68a7287a16959b5b9695 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5039 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-09Make Softmax kernels and operator statelessMichalis Spyrou
COMPMID-3997 Change-Id: I3a3cc76d8247dd769d9a5e6e171d718ea909312c Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4986 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-09Fix CLDepthwiseConvolutionLayer 3x3 QASYMM8Giorgio Arena
Fix errors when computing tensors with one element only - Replace Tensor3D with raw pointers so to get rid of offset to first element for NCHW layout - Add stronger out of bound constraints for NHWC layout - Set the border size to the input's padding for NHWC - Fill the strides == 0 with the largest stride, so to avoid accessing empty strides and multiplying by 0 Resolve COMPMID-4088 Change-Id: I751a4e6d7094b3c42306ff7f53af848fd35f19ac Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5024 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-08Make memset/copy functions state-lessSheri Zhang
Port following functions: - CLCopy - CLFill - CLPermute - CLReshapeLayer - CLCropResize Resolves: COMPMID-4002 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I8392aa515aaeb5b44dab6122be6a795d08376d5f Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5003 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-02-08Make NEON Pooling kernels and functions state-lessMichele Di Giorgio
Partially resolves COMPMID-3999 Change-Id: Ib39d40694df5c5f0a9401488e0c3af3ac26e8c55 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4984 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-04Tweak scheduling use of SQDMULH in quantized AVG poolingMichele Di Giorgio
Resolves COMPMID-4195 Change-Id: Ie5116c1ddddccafba40432fd4b5245bb27890a88 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4997 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-02-04Fix CL Compiler frontend failure for ArgMinMaxGiorgio Arena
- Change select condition's data type to satisfy its signature - Add failing test case with VEC_SIZE == 1 Resolve: COMPMID-4110 Change-Id: I52287bff7a2108f92fd12164e267df6c074d5508 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4978 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-02-03Fix OpenCL direct convolutionGian Marco Iodice
- The ARM DOT macro was using wrong variables for performing the dot product - K0 could be a non power of 2 values when IFM was not a multiple of 16 - Refactor the test for direct convolution NHWC Resolves COMPMID-4135, COMPMID-4155 Change-Id: I3a2dc89ef613ae20245cfc28e76ea36c55eaf81d Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4962 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-02-03Fix segfault in fsrcnn.tflite in GpuAccTeresa Charlin
* In CLDirectConvolution check for non-bias separately Resolves: COMPMID-4214 Change-Id: I83c0688e9b48d059665bbc6e1f0f050a516132d6 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4980 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-02-03Make CL Pooling kernels and functions state-lessMichele Di Giorgio
Resolves COMPMID-4000 Change-Id: I64878f93c033b4928fdefbb964c37c67fdecfaab Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4971 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-02-03Add WBSM tuning to CLTunerManuel Bottini
Add WBSM as possible parameter to be tuned Add helper functions to check WBSM support and setting the value in the kernel Update tuning parameter lists to use WBSM Update CLTuner to use WBSM The WBSM tuning is exposed as a parameter to be set at compile time by setting the CLTuningInfo CLTuningInfo contains information about the tuning mode and if wbsm tuning enabled Resolves: COMPMID-3936 Change-Id: Id53697c9c6d2cef41c049f368002f6197351b3ed Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4914 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-02-02Account for eventual padding in Pooling assembly kernelsMichele Di Giorgio
Resolves: COMPMID-4217 Change-Id: I8426a494ab0d3c6479de977cdab803d35bbe1e40 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4967 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-02-01Compress OpenCL kernel files using zlib for AndroidGeorgios Pinitas
Kernel files are embedded into the binary as the default option when building which leads to binary size bloating. Add `compress_kernels` option and utilize zlib for further compressing the text kernel files and reduce the overall binary size. We use a base64 encoding/decoding to ensure that the strings can be easily embedded. This adds to the binary size but still the overall reduction is significant. Maximum compression level 9 is used. Option is currently restricted to Android builds as android toolchain provides a zlib library. Initial experimentations indicate a binary size reduction of 50% Resolves: COMPMID-4017 Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: Iee81b8c00391b26a5f41642699692928a4d6bd6e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4958 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2021-02-01Make data_layout an attribute of the Scale functionMichele Di Giorgio
Resolves COMPMID-4208 Change-Id: I61ca670134a005462ad0528a5aff9507a90860e7 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4942 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-27Make CL Elementwise Unary kernels and functions state-lessMichele Di Giorgio
Resolves COMPMID-4004 Change-Id: I1dfe8bc52c1ff394ea208ba98b51033c738746a4 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4922 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-27Add broadcasting support in NEPixelWiseMultiplicationKernel for FP16Pablo Marquez Tello
* FP16 kernel missed the broadcast path * Resolves: COMPMID-4113 Change-Id: I8fd79030f2ae9c268dfeed672a57c6d0f64f58f4 Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4926 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-27Force early exit of threads when output_height=1 and channels=1 in assembly ↵Michele Di Giorgio
pooling Resolves COMPMID-4156, COMPMID-4125 Change-Id: I408e51e9759448e6190490975ccab2c1bc07a813 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4927 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-26Make CLArithmeticSubtraction kernel and function state-lessMichele Di Giorgio
Resolves COMPMID-4008 Change-Id: Ic5f40610e771f31e6d301dfae976c81e9c79fa8b Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4917 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-26Remove iostream header file when not neededGian Marco Iodice
Change-Id: Ic6b3e94fc252c2d6fe17e6bc32900d11c68ae399 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4916 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-26Make CLArithmeticAddition kernel and function state-lessMichele Di Giorgio
Resolves COMPMID-4006 Change-Id: Iddc32b0b250142aac9a4a7b9dc0eef462d196025 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4913 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
2021-01-26Rename functions/classes for elementwise unary operationsSang-Hoon Park
* Create CpuElementwiseUnary operator * Rename kernel classes * Make the kernels stateless Partially implements: COMPMID-4003 Change-Id: Ie0440cd01d4924847d6991b4df7ccaf311439297 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4912 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Rename functions/classes for elementwise operationsSang-Hoon Park
* Create CpuElementwise operator * Rename kernel classes * Make the kernels stateless Partially implements: COMPMID-4003 Change-Id: I4ef9c61a3acc3ac5dbe46463d62dcb88a5face21 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4881 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Fix Scale CTS failuresSheri Zhang
- Move back to use template for NEON implementaion to be more mantainable Resolves: COMPMID-4112 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I27b60674d743e3d7ec5bb065898cb75cb40bcf0e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4900 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com>
2021-01-22Check for unsupported armv7a optimized pooling kernelsMichele Di Giorgio
Resolves COMPMID-4136 Change-Id: I3c1f9e615cb2d2c48464ac5b7dbf0a26dc435889 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4906 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Update Fp16 heuristic for Mali-G76 and Mali-G77Gian Marco Iodice
Change-Id: I199c10574d0d84737adbc73829f60a220c7088b4 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4897 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-22CTS failures in Android R and Q in GpuAcc in ArgMinMaxGiorgio Arena
- Fix ambiguosity with select in OpenCL - Define a new macro for signed integer data type of the same input data type's size. This is needed because some ops (e.g. logical operators) in OpenCL work in this way Resolves: COMPMID-4116, COMPMID-4110 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: I560eda63fce24abd03d061f78f2f2ca951053fd0 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4898 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Make CLFloor and CLActivation kernels and functions state-lessGeorgios Pinitas
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: Icbe4e6a7c6732a59bdda0136af44c4852452dfd1 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4891 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Check for FP16 CPU support in optimized pooling kernelsMichele Di Giorgio
Resolves COMPMID-4123 Change-Id: I0c3c852c9d887cffc0d2e65142f75204ab5e3ff4 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4894 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Fix softmax SVE compiling failure without SVE2 supportSheri Zhang
Resolves partially: COMPMID-3891 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I1f08746c44146f4d6ad3e48bcc3d1d2470fd156e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4893 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Make Sub kernel and operator statelessSheri Zhang
- Rename NEArithmeticSubstractionKernel to CpuSubKernel and move files appropriately - Add CpuSub under src/runtime/cpu/operators Partially resolves: COMPMID-4007 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I4754ca9101d82dccacca744be6d069764a9c6b55 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4868 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-20Integrate improved pooling layer on NEONMichele Di Giorgio
Resolves COMPMID-4035 Change-Id: I559f8c4208fba9193dfe5012f03ddaf26c746215 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4855 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-20Make all CL Concatenate kernels and functions state-lessMichele Di Giorgio
Resolves COMPMID-3995 Change-Id: I84172bed20924f1d9ae3b4d14d7b321e9494296e Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4887 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-20Direct convolution fix for quantized data typeGian Marco Iodice
- Pass the quantized zero value to the opencl kernel Fixes COMPMID-3908 Change-Id: I6454c2e49f5b150a99178f2d72e0afa0a2990b54 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4884 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-19Fix doxygen references to new kernelsMichele Di Giorgio
Resolves COMPMID-4117 Change-Id: I9945a92402e34b9cfe0ba9ef2a961b168bf62721 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4883 Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-19Make memset/copy functions state-lessGeorgios Pinitas
Port following functions: - NECopy - NEFill - NEPermute - NEReshapeLayer Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I75f3f837012abab79c7dde9a20a34f64f75571d8 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4800 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-19Remove padding from direct convolution - OpenCLGian Marco Iodice
- Refactor direct convolution for NHWC - Remove old kernels for NHWC - Change the heuristic in CLConvolutionLayer.cpp. The new direct convolution implementation is faster than FFT Resolves COMPMID-3908 Change-Id: Iee15ce7b04e21847b6eaae5c6d3c1b18180e7efc Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4876 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-19Make Add kernel and operator statelessSheri Zhang
- Rename NEArithmeticAdditionKernel to CpuAddKernel Cpu and move files appropriately - Add CpuAdd under src/runtime/cpu/operators Partially resolves: COMPMID-4005 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I1d8d406df9773fea198899f50327407d7125c38d Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4867 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-19LOGICAL_NOT failTeresa Charlin
Explicitly cast scalar to vector for LOGICAL_NOT Related with COMPUTE-12536 and IVGCVSW-5617 Change-Id: I03accce000f8889fc4fb88c42c3c87845acb4f42 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4874 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Make Concatenate kernels and operator statelessGeorgios Pinitas
- Rename all concatenate kernels to use the Cpu prefix and move appropriately Change-Id: If647173e84969936ebd211d4d5ae6d1e73150bdc Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4799 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
2021-01-18Add SVE for SoftmaxMichalis Spyrou
Implements COMPMID-3875 Change-Id: I38991eed3f4966db125862af066bfedff5994a25 Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4854 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Decouple data types of elementwise kernelsSang-Hoon Park
Partially implements: COMPMID-4003 Change-Id: Ie51e43e24fb9a6b5b96d13cdc3d72fbda027a68b Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4873 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Cycle estimate-based kernel selection for dot product quantized s8/u8 kernelsGeorgios Pinitas
Resolves: COMPMID-3990 Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: If840c79209940535450f4ea1cbf6b0ec646a168e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4866 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-17Add missing std headersSang-Hoon Park
Missing std headers - limits, algorithm, cstddef - are added where they have to be. Partially implements: COMPMID-3808 Change-Id: Ia31f75370f8440dcb753e5ac6eb2eac18e9c63f3 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4861 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-15Introduce threshold for NEON floating-point SOFT_RELU activationMichele Di Giorgio
Large inputs produce incorrect results of Soft ReLu activations where the output saturates at around 88.72283. This is due to the approximation algorithm used for the logarithm. For this reason, we introduce a threshold such that with x > threshold, Soft ReLu activation will return the value x itself. SVE does not seem to suffer from the same issue, hence NEON kernels only are modified. Resolves COMPMID-4091 Change-Id: I357883deed4e4aba571a1d3163267772096c0412 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4865 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-15[Nightly Failure] Fix DeconvolutionLayer OpenCL kernel compilationGiorgio Arena
- Add case for VEC_SIZE == 3 in the TRANSPOSED_U macro Resolves: COMPMID-4094 Change-Id: I31870e589e66d895f9bf65c87aa04f32038365c0 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4864 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-14Remove OpenCL padding CLTransposeKernelManuel Bottini
By handling more general NxM blocks (where M and N can be 1,2,4,8,16) instead of only 4x4, 8x8, 16x16 and managing corner left values with partial stores Resolves: COMPMID-3923 Change-Id: I49b1a560c8325e00e061bd04edcf55034d04dcd8 Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4780 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-13Add support for macOSGeorgios Pinitas
* Add 'macos' as an additional OS build option * Guard unsupported paths like thread scheduling control and hwcaps checking with the __APPLE__ macro * Map linker options to respective Mach-O linker options Change-Id: I67bd9fa3c20831427b218ca7d3b4b9d454ab4fec Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4788 Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-18 12:01:54 +0000