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Valid region calculation has been removed before
but used unintentionally while adding dynamic
tensor shape support to CpuElementwiseKernel.
Remove it to eliminate valid region calculation
on CPU side.
Implements: COMPMID-4217
Change-Id: Ide161bdf9de81a7feabe1e631682945ca8ab0aa4
Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5242
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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The kernels and operators for binary and unary operations
are now capable of being configured with dynamic shapes and
computing windows at run-time.
Additionally, changing arguments' names is done
for consistency.
Partially Implements: COMPMID-4127
Change-Id: I48e5038692db667dec7cb2b2906fe5683214fe19
Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4973
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Replace all calculate_max_window(ValidRegion, ...) with
calculate_max_window(TensorShape, ...) in CPU kernels
Resolves COMPMID-4152 (1/2)
Change-Id: I7403ea6b24b9e7889890839142a06439d6c8a499
Signed-off-by: SiCongLi <sicong.li@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5202
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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- Revert changes in strides > num_dimensions. Set them to 0
- Fix offset calculcation in depthwise 3x3 quantized using select and stride_y for max offset
Resolve COMPMID-4254
Change-Id: Ia99b9637f18b99b1fa3d4b7b4892046027d3e7e5
Signed-off-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5040
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Fix errors when computing tensors with one element only
- Replace Tensor3D with raw pointers so to get rid of offset to first element for NCHW layout
- Add stronger out of bound constraints for NHWC layout
- Set the border size to the input's padding for NHWC
- Fill the strides == 0 with the largest stride, so to avoid accessing empty strides and multiplying by 0
Resolve COMPMID-4088
Change-Id: I751a4e6d7094b3c42306ff7f53af848fd35f19ac
Signed-off-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5024
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Manuel Bottini <manuel.bottini@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Resolves COMPMID-4117
Change-Id: I9945a92402e34b9cfe0ba9ef2a961b168bf62721
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4883
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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- Decouple data type for NEON NHWC implementation, supported data types are: fp32, fp16, u8, s16, qasymm8, qasymm8_signed.
- Add SVE support for NHWC and all six data types showed above.
Resolves: COMPMID-3873
Change-Id: I097de119f4667b28b025a78cadf7185afa5f15f0
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4766
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: If9d6fa8c900b68c4b6fd373f2fc1f9abb83ea917
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4145
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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