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1. Decouple data layout for CpuPoolingKernel: NCHW & NHWC
2. Decouple data type for CpuPoolingKernel NHWC
Partially solves: COMPMID-3999
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Change-Id: I3c6535eebdddeb467b7c68a7287a16959b5b9695
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5039
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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COMPMID-3997
Change-Id: I3a3cc76d8247dd769d9a5e6e171d718ea909312c
Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4986
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Partially resolves COMPMID-3999
Change-Id: Ib39d40694df5c5f0a9401488e0c3af3ac26e8c55
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4984
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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* Create CpuElementwiseUnary operator
* Rename kernel classes
* Make the kernels stateless
Partially implements: COMPMID-4003
Change-Id: Ie0440cd01d4924847d6991b4df7ccaf311439297
Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4912
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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* Create CpuElementwise operator
* Rename kernel classes
* Make the kernels stateless
Partially implements: COMPMID-4003
Change-Id: I4ef9c61a3acc3ac5dbe46463d62dcb88a5face21
Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4881
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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- Rename NEArithmeticSubstractionKernel to CpuSubKernel and move files appropriately
- Add CpuSub under src/runtime/cpu/operators
Partially resolves: COMPMID-4007
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Change-Id: I4754ca9101d82dccacca744be6d069764a9c6b55
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4868
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Resolves COMPMID-4117
Change-Id: I9945a92402e34b9cfe0ba9ef2a961b168bf62721
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4883
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Port following functions:
- NECopy
- NEFill
- NEPermute
- NEReshapeLayer
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I75f3f837012abab79c7dde9a20a34f64f75571d8
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4800
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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- Rename NEArithmeticAdditionKernel to CpuAddKernel Cpu and move files appropriately
- Add CpuAdd under src/runtime/cpu/operators
Partially resolves: COMPMID-4005
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Change-Id: I1d8d406df9773fea198899f50327407d7125c38d
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4867
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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- Rename all concatenate kernels to use the Cpu prefix and move
appropriately
Change-Id: If647173e84969936ebd211d4d5ae6d1e73150bdc
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4799
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
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Large inputs produce incorrect results of Soft ReLu activations where
the output saturates at around 88.72283. This is due to the
approximation algorithm used for the logarithm.
For this reason, we introduce a threshold such that with x > threshold,
Soft ReLu activation will return the value x itself.
SVE does not seem to suffer from the same issue, hence NEON kernels only
are modified.
Resolves COMPMID-4091
Change-Id: I357883deed4e4aba571a1d3163267772096c0412
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4865
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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- Decouple data type for NEON NHWC implementation, supported data types are: fp32, fp16, u8, s16, qasymm8, qasymm8_signed.
- Add SVE support for NHWC and all six data types showed above.
Resolves: COMPMID-3873
Change-Id: I097de119f4667b28b025a78cadf7185afa5f15f0
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4766
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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- Rename NEActivationLayer to CpuActivation
- Add member function to generate execution window
Partially Resolves: COMPMID-3992
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I4e1ae15cf456b860d3080b2fedc4dbcce7d1bb79
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4791
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
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- Rename NEFloorKernel to CpuFloorKernel to accomodate new ISA
implementations
- Remove state and instead pass tensors to operate during run
- Add member function to generate an execution window given an input and
output tensor description
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Change-Id: I9240b8ec534589c0f15c354f771f1ac5d7010c3b
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4773
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
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