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2021-11-04Add validate tests for CLConvolutionLayer and CLGEMMConvolutionLayer with ↵SiCongLi
post ops * Add validate tests * Restrict post ops support in ClGemmConv2d to only those that do not need im2col or col2im. In practice this means we only support post ops in conv1x1 with stride = 1, dilation = 1 and data layout = NHWC Resolves COMPMID-4435 Change-Id: I1fdf0c5d565a4624857250075ac76db35c2f383b Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6573 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-11-04Add PRelu to supported PostOps in:ramelg01
- ClGemmMatrixMultiplyReshapedKernel - ClGemmMatrixMultiplyNativeKernel - ClGemmMatrixMultiplyReshapedOnlyRhsKernel Resolves: COMPMID-4713 Change-Id: I3adcb1b3d4af37ebcbc3bee19cc1845885d08600 Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6553 Reviewed-by: SiCong Li <sicong.li@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-11-03Fix out-of-bound reads in cl gemm kernelsSiCongLi
* Revert "Remove padding in FP Cl Gemm kernels" This reverts commit 48717a3d38fef8d316cd4b9fd9a3bc1a43db736b. * Allow different boundary row handling strategies across native, reshaped and reshaped_only_rhs kernels by introducing a ELTWISE_OPERAND_ROW parameter to the macro Resolves COMPMID-4919 Change-Id: Icefc23c0760a6abb838fef1d0d5bda06b07c79e3 Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6569 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2021-11-03Add graph level convolution fusion with post operatorSheri Zhang
Resolves: COMPMID-4701 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I8a0d3c2ed4bf84489d94b8ae6641d6041aadaee5 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6557 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Reviewed-by: SiCong Li <sicong.li@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-11-02Fix GEMMMatrixMultiplyReshapedOnlyRHSKernel tests to use InitializerListDatasetSiCongLi
Resolves: COMPMID-4435 Change-Id: Ia57197b63b033674de250b8e7765a0fbb8ce698d Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6562 Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-11-02Fix clang issue when casting negative int32_t to int64_tGiorgio Arena
Resolve COMPMID-4898 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: I657e53883c10dc50a59815e527159567315d0aeb Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/c/VisualCompute/ComputeLibrary/+/370574 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: bsgcomp <bsgcomp@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6546 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-11-02Add post ops to ClGemmMatrixMultiplyReshapedOnlyRHSKernel and ↵SiCongLi
ClGemmMatrixMultiplyNativeKernel Part 3 Partially resolves: COMPMID-4435 Change-Id: Ifc5affa3a24a70942ca2d001380205df09b03ad7 Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6550 Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-11-01Add PostOp support to GEMM and CLGEMM operators and functions Part 2SiCongLi
* Implement PostOp interface changes * Remove spaces around "=" in TypePrinter Partially resolves COMPMID-4435 Signed-off-by: SiCongLi <sicong.li@arm.com> Change-Id: If1e2280554030a0f635e73339a2e86987f6dc41b Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6484 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-11-01Remove padding in FP Cl Gemm kernelsSiCongLi
* Remove rhs and bias padding in ClGemmMatrixMultiplyNativeKernel * Rework ClGemmMatrixMultiplyReshapedOnlyRHSKernel to use the same padding boundary condition as the other kernels Partially resolves COMPMID-4435 Change-Id: I1c17af9cca0b5cb3be087ce160948b7b0e62d297 Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6549 Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-11-01Fix dst "widening" validationSiCongLi
* Auto-initialize the dst tensor before checking for PostOp shape compliance so that we catch the invalid case of "widening" dst tensor shape * Rework post op validate test cases to be more readable Partially resolves: COMPMID-4435 Change-Id: I79943994182942f962e4d59a7fa0d6f017ae9ac7 Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6548 Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-28Add experimental PostOp interface to ClGemmMatrixMultiplyReshapedKernel Part 1SiCongLi
This interface supports the fusion of multiple elementwise operations Partially resolves: COMPMID-4435 Change-Id: If68dd7dd98dcf239fde7cb1f0a4a6d4d1e899a6f Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6483 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-27Fixed issue where cppflags were being set incorrectlyPablo Marquez Tello
* Build flags were missing -D * Changed -ARM_COMPUTE_CPU_ENABLED to -DARM_COMPUTE_CPU_ENABLED * Changed -ARM_COMPUTE_OPENCL_ENABLED to -DARM_COMPUTE_OPENCL_ENABLED Change-Id: I39f996331021e1198f344172ea4ff5a4a360d5ba Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6510 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-27Improve conv3d validationFreddie Liardet
Improve validation of cpu conv3d and add validation test. Align Size3D to Size3D comparison with how Size2D implements it. Remove print statement in MaxUnpooling validation tests. Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: I17048d56b08704cdbf1ad978af02009e57f3aa83 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6512 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-22Add uint8/int8 support to cpu conv3dFreddie Liardet
Add support for qasymm8/qasymm8_signed in cpu conv3d. Resolves: COMPMID-4665 Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: I2450bb6f24969745c8b936f4b657bd406b788c57 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6478 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-22Remove large conv3d testsFreddie Liardet
Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: I27ea2e96a2360bf9a77556b8c0171ce7666fc49f Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6496 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Michele Di Giorgio <michele.digiorgio@arm.com>
2021-10-21Reduce size of large conv3d nightly testsFreddie Liardet
Resolves: COMPMID-4881 Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: I36081563840404a75c0b77d7f3c90a96790e9915 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6491 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-21Fix enforcing incorrect ISA feature for given CPU modelsGeorgios Pinitas
Removes forcing dot-product support for A64fx on NEON. Dot-product is only supported in the SVE pipeline. Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I72c2485e72246b9c39efd4e2b9b1d63a1e9c28f6 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6379 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-21Enable CPP11 math on AndroidPablo Tello
* Partially resolves MLCE-622 Change-Id: I2995abae669ea436f573f1efa5c83d7ea753ce86 Signed-off-by: Pablo Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6477 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-20Implement CLDirectConv3DKernel - uint8/int8Giorgio Arena
Resolve COMPMID-4663 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: I5c3c1cffed5385c06b789543318f7f4d6096987e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6468 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>
2021-10-19Fix arm8.6-a-sve2 build issuesFreddie Liardet
Resolves: COMPMID-4866 Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: Id03ce0f5c25e0c0cef92ef9686201d96963fd7c1 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6464 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-18DirectConv3d support refineSheri Zhang
- Decouple data support of CpuDirectConv3dKernel - Update documentation for Conv3d Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I1d94aa28f821f45a1a3d39cc3335c8faeee89f0d Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6453 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-18Remove legacy GeMM kernels on OpenCLGian Marco Iodice
Resolves COMPMID-4446 Change-Id: I1d3c2391b67681f4d3af440826aa95b47a1288a6 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6444 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-18Fix precision issue in ChannelShuffleKernelPablo Marquez Tello
* Fixed the issue in NHWC Neon * Fixed the rounding error in CL * Added a new test case to reproduce the problem * Resolves COMPMID-4831 Change-Id: I1613168cad580ca5acefe8ba340130af05cffaff Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6454 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-18Add user provided JSON operator list buildFreddie Liardet
Allow ACL to be built via a user provided JSON file containing operators, data types and data layouts. Modify TFLite file to JSON file script to output data layouts. Fix build issue with "fat_binary" and "high_priority" options. Resolves: COMPMID-4697, COMPMID-4837 Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: I08d494151c98f804325707ffd922ffe216813023 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6427 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
2021-10-18Fix unused variable issueSheri Zhang
Resovles: COMPMID-4851 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: Ic79dadb17efb6ec5a08dbad02e17c0eaff48569f Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6451 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-18Implement Minimum Workload Size (MWS) in all CPPKernels used by small networksDana Zlotnik
* create get_mws method in ICPPKernel class that retuns default value for all kernels * overwrite the default value for all the kernels used by small networks (according to banchmark case) Resolves COMPMID-4648 Change-Id: I46d7cae61217213279d2ee740edc73f600b6d576 Signed-off-by: Dana Zlotnik <dana.zlotnik@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6412 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: SiCong Li <sicong.li@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-15Conv3d supportSheri Zhang
* Add CpuDirectConv3d support for fp32 and fp16 * Dilation is not supported * Need decouple Partially resolve: COMPMID-4661 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: Ib1865b9ff328b684d131512b1baf77bc2f10318f Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6430 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
2021-10-15Fix CLConv3D filelist and commentsGiorgio Arena
Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: I4d48f1b8eba6681a9de0ae5f1fd8a4ad1edf7fe8 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6439 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-14Implement CLDirectConv3D f32/f16Giorgio Arena
Resolve COMPMID-4660 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: Ibd66ec1eb6faa60086981b1e3a9c12561df3445f Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6420 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2021-10-13Removed unsupported NHWC from Pooling::validatePablo Tello
* Resolves COMPMID-4845 Change-Id: If286584c74d747e76fc12e3cb5c75d4411d0878d Signed-off-by: Pablo Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6426 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Freddie Liardet <frederick.liardet@arm.com>
2021-10-13Improve performance of Softmax uint8 on GPUAdnan AlSinan
Resolves COMPMID-4805 Change-Id: I0acd4479f196cf9518995a60d3b57a9a49e0db57 Signed-off-by: Adnan AlSinan <adnan.alsinan@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6413 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-by: Freddie Liardet <frederick.liardet@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2021-10-12Add missing common functionalities for DirectConv3DGiorgio Arena
Partially resolves COMPMID-4660 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: Iaa659fd9c0ce364e491b04e5ccd1620d69aeca61 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6417 Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-12Remove padding in cpuPool2d NCHWFreddie Liardet
Remove padding from all cpuPool2d NCHW kernels (FP16,FP32 & Quantized) Resolves: COMPMID-4728, COMPMID-4823 Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Change-Id: Ida619f67cd6606b33828f2d9dee925aeb794cc50 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6358 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-11Fix precision issue in ChannelShuffleKernelPablo Tello
* Partially resolves COMPMID-4831 Change-Id: I2100432c51f2a4d2f2524ed7a3574035632c092c Signed-off-by: Pablo Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6403 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Freddie Liardet <frederick.liardet@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-08Create Fixture for DirectConv3DGiorgio Arena
Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: If0162fe55a89733ffc927a8f2edf68491dfd8daf Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6391 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-07Add support for 5D data layout indexingGiorgio Arena
Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: Ib346bb6b90d2220ec5934c83a9a1f0cd540b8731 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6377 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-07Per-operator build dependenciesGeorgios Pinitas
Creates a list of operators their respective dependencies. Alters the build system to walk-through them resolve the dependencies and build Compute Library. Removes the following unused kernels/functions: -[NE|CL]MinMaxLayerKernel -CLFillBorder Resolves: COMPMID-4695,COMPMID-4696 Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I35ebeef38dac25ec5459cfe9c5f7c9a708621124 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/c/VisualCompute/ComputeLibrary/+/357914 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Comments-Addressed: bsgcomp <bsgcomp@arm.com> Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6295 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-06Fix the multipliers calculationPablo Marquez Tello
* Removed code forcing the multipliers and shifts to 0 * Resolves COMPMID-4833 Change-Id: I7c0eadde3691732c263818bb1cd0fc0cb75ce5a9 Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6378 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-06Add missing ISA selection heuristicsGeorgios Pinitas
- Fixes identification heuristics for SVE2 based kernels in CpuAdd - Adds identification heuristics for SVE to CpuElementwise Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: Id287dbd72fba81afc415d7aec74e06aae11984e3 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6369 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-06Optimize CpuScale NHWC F32/F16Gian Marco Iodice
- Rework CpuScaleKernel F32/F16 NHWC - bilinear - Rework CpuScaleKernel F32/F16 NHWC - nearest - Add test to validate the vector computation path Resolves COMPMID-4801, COMPMID-4802 Change-Id: Ie6e4f262a8cce509edd7b8f564c940758625c58a Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6361 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
2021-10-05Fix of linking errors to find CPPSplit symbols when compiling android nn driverramelg01
Resolves: COMPMID-4835 Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com> Change-Id: I1e768b3f3130316e71b994a9b3fbc81d518d5361 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6368 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>
2021-10-05Fixed the compiler warning -Werror=type-limitsPablo Marquez Tello
* Comparison is always false due to limited range of data type. rescale_value is truncated to int32_t and then is compared agains (1ll <<31) which will be always false * Resolves MLCE-508 Change-Id: I252f64d4aec8f3e120d71fc5e40c7665816173ac Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6342 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-05Fix tolerance issue for Scale tests on OpenCLGian Marco Iodice
Resolves COMPMID-4819, COMPMID-4817 Change-Id: I257ee8921742c5070d283b62db1e5138a8cfa439 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6363 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-04Provide logging for configure functions in all CPP functionsramelg01
- Moving impl of CPPSplit template to src/runtime/CPP to allow including of Log.h from src/common. - Fix logging of vector<ITensor*> to print contained tensor's info not their ptrs. Partially-Resovles: COMPMID-4718 Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com> Change-Id: Idec81665b2a7c0cfae5248803109c6e2edc520a1 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6362 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-10-01Provide logging for configure functions in all CL functionsramelg01
Partially Resolves: COMPMID-4718 Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com> Change-Id: I59943081de0f3105bdbfc78af53971a0de8cd53e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6332 Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-10-01Add OpenCL sources to Android.bp fileJakub Sujak
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com> Change-Id: Iff1820714ffac838ae106ed9a49bc18a7e572809 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6347 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
2021-09-29Add support for non-constant weights and biases in CpuFullyConnectedGiorgio Arena
Changing the approach for specifying that weights and biases tensors are non-constant by making it a member of TensorInfo rather than an option of the functions. Resolves: COMPMID-4222, COMPMID-4811 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: I9b0081ccbcf8271ce029ba6755563d64c59e1d32 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6313 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-09-29FIX: seg fault when printing TensorInfo's quantization info per channelramelg01
Resolves: COMPMID-4818 Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com> Change-Id: I2ac4b84181a1b432aa34e22b9ffa9a1c882a32aa Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6319 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-09-28Provide logging for configure functions in all gpu operatorsramelg01
Partially Resolves: COMPMID-4718 Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com> Change-Id: I3d80e732fc957114ec84ef8350dbf12eeae23054 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6301 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Freddie Liardet <frederick.liardet@arm.com> Reviewed-by: Jakub Jan Sujak <jakub.sujak@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-09-27Generate an operator configuration file from a list of tflite modelsGeorgios Pinitas
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I1b13da6558bd11d49747162d66c81255ccec1498 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6166 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: SiCong Li <sicong.li@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-26 00:59:23 +0000