diff options
Diffstat (limited to 'src/runtime/gpu')
-rw-r--r-- | src/runtime/gpu/cl/operators/ClDirectConv2d.cpp (renamed from src/runtime/gpu/cl/operators/ClDirectConvolution.cpp) | 18 | ||||
-rw-r--r-- | src/runtime/gpu/cl/operators/ClDirectConv2d.h (renamed from src/runtime/gpu/cl/operators/ClDirectConvolution.h) | 25 | ||||
-rw-r--r-- | src/runtime/gpu/cl/operators/ClPool2d.cpp (renamed from src/runtime/gpu/cl/operators/ClPooling.cpp) | 14 | ||||
-rw-r--r-- | src/runtime/gpu/cl/operators/ClPool2d.h (renamed from src/runtime/gpu/cl/operators/ClPooling.h) | 19 |
4 files changed, 32 insertions, 44 deletions
diff --git a/src/runtime/gpu/cl/operators/ClDirectConvolution.cpp b/src/runtime/gpu/cl/operators/ClDirectConv2d.cpp index 3382a6c3c5..527b3a65f9 100644 --- a/src/runtime/gpu/cl/operators/ClDirectConvolution.cpp +++ b/src/runtime/gpu/cl/operators/ClDirectConv2d.cpp @@ -21,13 +21,13 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#include "src/runtime/gpu/cl/operators/ClDirectConvolution.h" +#include "src/runtime/gpu/cl/operators/ClDirectConv2d.h" #include "arm_compute/runtime/CL/CLScheduler.h" #include "src/core/CL/kernels/CLFillBorderKernel.h" #include "src/core/gpu/cl/ClCompileContext.h" #include "src/core/gpu/cl/kernels/ClActivationKernel.h" -#include "src/core/gpu/cl/kernels/ClDirectConvolutionKernel.h" +#include "src/core/gpu/cl/kernels/ClDirectConv2dKernel.h" namespace arm_compute { @@ -44,11 +44,11 @@ ITensorPack select_activation_src_dst(ITensorPack &tensors) } } // namespace -void ClDirectConvolution::configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, - const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info) +void ClDirectConv2d::configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, + const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info) { // Configure direct convolution kernel - auto k = std::make_unique<kernels::ClDirectConvolutionKernel>(); + auto k = std::make_unique<kernels::ClDirectConv2dKernel>(); k->set_target(CLScheduler::get().target()); k->configure(compile_context, src, weights, biases, dst, conv_info); _direct_conv_kernel = std::move(k); @@ -74,10 +74,10 @@ void ClDirectConvolution::configure(const CLCompileContext &compile_context, ITe CLScheduler::get().tune_kernel_static(*_direct_conv_kernel); } -Status ClDirectConvolution::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, - const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info) +Status ClDirectConv2d::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, + const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info) { - ARM_COMPUTE_RETURN_ON_ERROR(kernels::ClDirectConvolutionKernel::validate(src, weights, biases, dst, conv_info, CLScheduler::get().target())); + ARM_COMPUTE_RETURN_ON_ERROR(kernels::ClDirectConv2dKernel::validate(src, weights, biases, dst, conv_info, CLScheduler::get().target())); if(act_info.enabled()) { ARM_COMPUTE_RETURN_ON_ERROR(kernels::ClActivationKernel::validate(dst, dst, act_info)); @@ -85,7 +85,7 @@ Status ClDirectConvolution::validate(const ITensorInfo *src, const ITensorInfo * return Status{}; } -void ClDirectConvolution::run(ITensorPack &tensors) +void ClDirectConv2d::run(ITensorPack &tensors) { // Run border handler CLScheduler::get().enqueue_op(*_src_border_handler.get(), tensors, false); diff --git a/src/runtime/gpu/cl/operators/ClDirectConvolution.h b/src/runtime/gpu/cl/operators/ClDirectConv2d.h index e7ad927b0b..e069733fab 100644 --- a/src/runtime/gpu/cl/operators/ClDirectConvolution.h +++ b/src/runtime/gpu/cl/operators/ClDirectConv2d.h @@ -21,8 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifndef ARM_COMPUTE_CL_DIRECT_CONVOLUTION_H -#define ARM_COMPUTE_CL_DIRECT_CONVOLUTION_H +#ifndef ARM_COMPUTE_CL_DIRECT_CONV2D_H +#define ARM_COMPUTE_CL_DIRECT_CONV2D_H #include "src/core/gpu/cl/ClCompileContext.h" #include "src/core/gpu/cl/IClKernel.h" @@ -37,13 +37,13 @@ namespace opencl /** Basic function to simulate a directly convolution layer. This function calls the following OpenCL kernels: * * -# @ref CLFillBorderKernel (executed if padding size is different from zero) - * -# @ref opencl::ClDirectConvolution + * -# @ref opencl::ClDirectConv2d */ -class ClDirectConvolution : public IClOperator +class ClDirectConv2d : public IClOperator { public: /** Constructor */ - ClDirectConvolution() = default; + ClDirectConv2d() = default; /** Set the src and dst tensors. * * @param[in] compile_context The compile context to be used. @@ -61,18 +61,9 @@ public: */ void configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info = ActivationLayerInfo()); - /** Static function to check if given info will lead to a valid configuration of @ref ClDirectConvolution + /** Static function to check if given info will lead to a valid configuration * - * @param[in] src Source tensor. 3 lower dimensions represent a single src [width, height, IFM], - * while every optional dimension from 4 and above represent a batch of srcs. - * Data types supported: QASYMM8_SIGNED/QASYMM8/F16/F32. - * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. Data type supported:Same as @p src. - * @param[in] biases Biases tensor. Shared biases supported. Biases are 1D tensor with dimensions [OFM]. - * Data type supported: Should match @p src data type, except for src of QASYMM8 and QASYMM8_SIGNED type where biases should be of S32 type. - * @param[in] dst Destination tensor. 3 lower dimensions represent a single dst [width, height, OFM], while the rest represent batch of dsts. - * Data types supported: Same as @p src. - * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. - * @param[in] act_info (Optional) Activation layer information in case of a fused activation. + * Similar to ClDirectConv2d::configure() * * @return a status */ @@ -89,4 +80,4 @@ private: }; } // namespace opencl } // namespace arm_compute -#endif /* ARM_COMPUTE_CL_DIRECT_CONVOLUTION_H */
\ No newline at end of file +#endif /* ARM_COMPUTE_CL_DIRECT_CONV2D_H */
\ No newline at end of file diff --git a/src/runtime/gpu/cl/operators/ClPooling.cpp b/src/runtime/gpu/cl/operators/ClPool2d.cpp index 8610eb9842..40c2b0a8ba 100644 --- a/src/runtime/gpu/cl/operators/ClPooling.cpp +++ b/src/runtime/gpu/cl/operators/ClPool2d.cpp @@ -21,23 +21,23 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#include "src/runtime/gpu/cl/operators/ClPooling.h" +#include "src/runtime/gpu/cl/operators/ClPool2d.h" #include "arm_compute/runtime/CL/CLScheduler.h" #include "src/core/CL/kernels/CLFillBorderKernel.h" #include "src/core/gpu/cl/ClCompileContext.h" -#include "src/core/gpu/cl/kernels/ClPoolingKernel.h" +#include "src/core/gpu/cl/kernels/ClPool2dKernel.h" namespace arm_compute { namespace opencl { -void ClPooling::configure(const ClCompileContext &compile_context, ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &info, ITensorInfo *indices) +void ClPool2d::configure(const ClCompileContext &compile_context, ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &info, ITensorInfo *indices) { ARM_COMPUTE_ERROR_ON_NULLPTR(src); // Configure pooling kernel - auto k = std::make_unique<kernels::ClPoolingKernel>(); + auto k = std::make_unique<kernels::ClPool2dKernel>(); k->set_target(CLScheduler::get().target()); k->configure(compile_context, src, dst, info, indices); _pooling = std::move(k); @@ -85,12 +85,12 @@ void ClPooling::configure(const ClCompileContext &compile_context, ITensorInfo * CLScheduler::get().tune_kernel_static(*_pooling); } -Status ClPooling::validate(const ITensorInfo *src, const ITensorInfo *dst, const PoolingLayerInfo &info, const ITensorInfo *indices) +Status ClPool2d::validate(const ITensorInfo *src, const ITensorInfo *dst, const PoolingLayerInfo &info, const ITensorInfo *indices) { - return kernels::ClPoolingKernel::validate(src, dst, info, indices); + return kernels::ClPool2dKernel::validate(src, dst, info, indices); } -void ClPooling::run(ITensorPack &tensors) +void ClPool2d::run(ITensorPack &tensors) { ARM_COMPUTE_ERROR_ON_MSG(tensors.empty(), "No inputs provided"); diff --git a/src/runtime/gpu/cl/operators/ClPooling.h b/src/runtime/gpu/cl/operators/ClPool2d.h index 99de6d0dcf..8ac386a64b 100644 --- a/src/runtime/gpu/cl/operators/ClPooling.h +++ b/src/runtime/gpu/cl/operators/ClPool2d.h @@ -21,8 +21,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifndef ARM_COMPUTE_CL_POOLING_H -#define ARM_COMPUTE_CL_POOLING_H +#ifndef ARM_COMPUTE_CL_POOL2D_H +#define ARM_COMPUTE_CL_POOL2D_H #include "src/core/gpu/cl/ClCompileContext.h" #include "src/runtime/gpu/cl/IClOperator.h" @@ -36,13 +36,13 @@ namespace opencl /** Basic function to simulate a pooling layer with the specified pooling operation. This function calls the following OpenCL kernels: * * -# @ref CLFillBorderKernel (executed if padding size is different from zero) - * -# @ref opencl::ClPooling + * -# @ref opencl::ClPool2d */ -class ClPooling : public IClOperator +class ClPool2d : public IClOperator { public: /** Constructor */ - ClPooling() = default; + ClPool2d() = default; /** Configure operator for a given list of arguments * * @param[in] compile_context The compile context to be used. @@ -52,12 +52,9 @@ public: * @param[out] indices (optional) The indices info of the maximal values. Data type supported: U32. */ void configure(const ClCompileContext &compile_context, ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &info, ITensorInfo *indices = nullptr); - /** Static function to check if given info will lead to a valid configuration of @ref ClPooling + /** Static function to check if given info will lead to a valid configuration * - * @param[in] src Source tensor info. Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32. - * @param[out] dst Destination tensor info. Data type supported: same as @p src - * @param[in] info Pooling layer parameters. - * @param[out] indices (optional) The indices info of the maximal values. Data type supported: U32. + * Similar to ClPool2d::configure() * * @return a status */ @@ -72,4 +69,4 @@ private: }; } // namespace opencl } // namespace arm_compute -#endif /* ARM_COMPUTE_CL_POOLING_H */ +#endif /* ARM_COMPUTE_CL_POOL2D_H */ |