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-rw-r--r--src/gpu/cl/kernels/ClActivationKernel.cpp3
-rw-r--r--src/gpu/cl/kernels/ClElementwiseKernel.h3
-rw-r--r--src/gpu/cl/kernels/ClMulKernel.h3
-rw-r--r--src/gpu/cl/operators/ClAdd.h3
-rw-r--r--src/gpu/cl/operators/ClDirectConv2d.h5
-rw-r--r--src/gpu/cl/operators/ClElementwiseOperations.h3
-rw-r--r--src/gpu/cl/operators/ClFullyConnected.h1
-rw-r--r--src/gpu/cl/operators/ClGemm.h1
-rw-r--r--src/gpu/cl/operators/ClGemmLowpMatrixMultiplyCore.h5
-rw-r--r--src/gpu/cl/operators/ClIndirectConv2d.h3
-rw-r--r--src/gpu/cl/operators/ClMatMul.h2
-rw-r--r--src/gpu/cl/operators/ClMul.h7
-rw-r--r--src/gpu/cl/operators/ClSub.h3
13 files changed, 29 insertions, 13 deletions
diff --git a/src/gpu/cl/kernels/ClActivationKernel.cpp b/src/gpu/cl/kernels/ClActivationKernel.cpp
index 13d55b3f5a..2e4642c89b 100644
--- a/src/gpu/cl/kernels/ClActivationKernel.cpp
+++ b/src/gpu/cl/kernels/ClActivationKernel.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2021 Arm Limited.
+ * Copyright (c) 2016-2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -23,6 +23,7 @@
*/
#include "src/gpu/cl/kernels/ClActivationKernel.h"
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "arm_compute/core/CL/CLHelpers.h"
#include "arm_compute/core/CL/ICLTensor.h"
#include "arm_compute/core/TensorInfo.h"
diff --git a/src/gpu/cl/kernels/ClElementwiseKernel.h b/src/gpu/cl/kernels/ClElementwiseKernel.h
index 3783e1571c..927b9c7f46 100644
--- a/src/gpu/cl/kernels/ClElementwiseKernel.h
+++ b/src/gpu/cl/kernels/ClElementwiseKernel.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2021 Arm Limited.
+ * Copyright (c) 2018-2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_ELEMENTWISE_KERNEL_H
#define ARM_COMPUTE_CL_ELEMENTWISE_KERNEL_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "src/core/KernelTypes.h"
#include "src/core/common/Macros.h"
#include "src/gpu/cl/ClCompileContext.h"
diff --git a/src/gpu/cl/kernels/ClMulKernel.h b/src/gpu/cl/kernels/ClMulKernel.h
index 41c862eb03..4210a9103d 100644
--- a/src/gpu/cl/kernels/ClMulKernel.h
+++ b/src/gpu/cl/kernels/ClMulKernel.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2021 Arm Limited.
+ * Copyright (c) 2016-2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_MUL_KERNEL_H
#define ARM_COMPUTE_CL_MUL_KERNEL_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "src/core/common/Macros.h"
#include "src/gpu/cl/ClCompileContext.h"
#include "src/gpu/cl/IClKernel.h"
diff --git a/src/gpu/cl/operators/ClAdd.h b/src/gpu/cl/operators/ClAdd.h
index d99f983ed0..67aa8f08fa 100644
--- a/src/gpu/cl/operators/ClAdd.h
+++ b/src/gpu/cl/operators/ClAdd.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited.
+ * Copyright (c) 2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_ADD_H
#define ARM_COMPUTE_CL_ADD_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "src/gpu/cl/ClCompileContext.h"
#include "src/gpu/cl/IClOperator.h"
diff --git a/src/gpu/cl/operators/ClDirectConv2d.h b/src/gpu/cl/operators/ClDirectConv2d.h
index 85365b76ff..fc2568eae2 100644
--- a/src/gpu/cl/operators/ClDirectConv2d.h
+++ b/src/gpu/cl/operators/ClDirectConv2d.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited.
+ * Copyright (c) 2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_DIRECT_CONV2D_H
#define ARM_COMPUTE_CL_DIRECT_CONV2D_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "src/gpu/cl/ClCompileContext.h"
#include "src/gpu/cl/IClKernel.h"
#include "src/gpu/cl/IClOperator.h"
@@ -79,4 +80,4 @@ private:
};
} // namespace opencl
} // namespace arm_compute
-#endif /* ARM_COMPUTE_CL_DIRECT_CONV2D_H */ \ No newline at end of file
+#endif /* ARM_COMPUTE_CL_DIRECT_CONV2D_H */
diff --git a/src/gpu/cl/operators/ClElementwiseOperations.h b/src/gpu/cl/operators/ClElementwiseOperations.h
index 304b250d66..7a8570c94a 100644
--- a/src/gpu/cl/operators/ClElementwiseOperations.h
+++ b/src/gpu/cl/operators/ClElementwiseOperations.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited.
+ * Copyright (c) 2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_ELEMENTWISE_OPERATIONS_H
#define ARM_COMPUTE_CL_ELEMENTWISE_OPERATIONS_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "src/gpu/cl/ClCompileContext.h"
#include "src/gpu/cl/IClOperator.h"
diff --git a/src/gpu/cl/operators/ClFullyConnected.h b/src/gpu/cl/operators/ClFullyConnected.h
index d08d5db8a4..11a59b2359 100644
--- a/src/gpu/cl/operators/ClFullyConnected.h
+++ b/src/gpu/cl/operators/ClFullyConnected.h
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_FULLY_CONNECTED_H
#define ARM_COMPUTE_CL_FULLY_CONNECTED_H
+#include "arm_compute/core/FullyConnectedLayerInfo.h"
#include "arm_compute/core/TensorInfo.h"
#include "src/gpu/cl/ClCompileContext.h"
diff --git a/src/gpu/cl/operators/ClGemm.h b/src/gpu/cl/operators/ClGemm.h
index ea8a058fd5..3d88a9ca84 100644
--- a/src/gpu/cl/operators/ClGemm.h
+++ b/src/gpu/cl/operators/ClGemm.h
@@ -25,6 +25,7 @@
#define ARM_COMPUTE_CL_GEMM_H
#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/GEMMInfo.h"
#include "arm_compute/runtime/CL/CLTensor.h"
#include "arm_compute/runtime/CL/CLTypes.h"
diff --git a/src/gpu/cl/operators/ClGemmLowpMatrixMultiplyCore.h b/src/gpu/cl/operators/ClGemmLowpMatrixMultiplyCore.h
index 6fa4352bf8..3051f3079b 100644
--- a/src/gpu/cl/operators/ClGemmLowpMatrixMultiplyCore.h
+++ b/src/gpu/cl/operators/ClGemmLowpMatrixMultiplyCore.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2022 Arm Limited.
+ * Copyright (c) 2017-2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_GEMMLOWP_MATRIXMULTIPLY_CORE_H
#define ARM_COMPUTE_CL_GEMMLOWP_MATRIXMULTIPLY_CORE_H
+#include "arm_compute/core/GEMMInfo.h"
#include "arm_compute/core/TensorInfo.h"
#include "arm_compute/runtime/CL/CLTypes.h"
@@ -154,4 +155,4 @@ private:
};
} // namespace opencl
} // namespace arm_compute
-#endif /* ARM_COMPUTE_CL_GEMMLOWP_MATRIXMULTIPLY_CORE_H */ \ No newline at end of file
+#endif /* ARM_COMPUTE_CL_GEMMLOWP_MATRIXMULTIPLY_CORE_H */
diff --git a/src/gpu/cl/operators/ClIndirectConv2d.h b/src/gpu/cl/operators/ClIndirectConv2d.h
index 917a67f421..0c121182d4 100644
--- a/src/gpu/cl/operators/ClIndirectConv2d.h
+++ b/src/gpu/cl/operators/ClIndirectConv2d.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_INDIRECT_CONV2D_H
#define ARM_COMPUTE_CL_INDIRECT_CONV2D_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "arm_compute/core/TensorInfo.h"
#include "arm_compute/runtime/CL/CLTensor.h"
#include "arm_compute/runtime/CL/CLTypes.h"
diff --git a/src/gpu/cl/operators/ClMatMul.h b/src/gpu/cl/operators/ClMatMul.h
index 3d9863266e..6aba801301 100644
--- a/src/gpu/cl/operators/ClMatMul.h
+++ b/src/gpu/cl/operators/ClMatMul.h
@@ -24,6 +24,8 @@
#ifndef ACL_ARM_COMPUTE_SRC_GPU_CL_OPERATORS_CLMATMUL
#define ACL_ARM_COMPUTE_SRC_GPU_CL_OPERATORS_CLMATMUL
+#include "arm_compute/core/ActivationLayerInfo.h"
+#include "arm_compute/core/MatMulInfo.h"
#include "src/gpu/cl/IClOperator.h"
#include "src/gpu/cl/kernels/ClMatMulNativeKernel.h"
#include "src/gpu/cl/kernels/ClMatMulLowpNativeKernel.h"
diff --git a/src/gpu/cl/operators/ClMul.h b/src/gpu/cl/operators/ClMul.h
index 6a158c910d..24eeeb8909 100644
--- a/src/gpu/cl/operators/ClMul.h
+++ b/src/gpu/cl/operators/ClMul.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited.
+ * Copyright (c) 2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,9 @@
#ifndef ARM_COMPUTE_CL_MUL_H
#define ARM_COMPUTE_CL_MUL_H
+#include "arm_compute/core/ActivationLayerInfo.h"
+#include "arm_compute/core/Types.h"
+
#include "src/gpu/cl/ClCompileContext.h"
#include "src/gpu/cl/IClOperator.h"
@@ -100,4 +103,4 @@ public:
};
} // namespace opencl
} // namespace arm_compute
-#endif /* ARM_COMPUTE_CL_MUL_H */ \ No newline at end of file
+#endif /* ARM_COMPUTE_CL_MUL_H */
diff --git a/src/gpu/cl/operators/ClSub.h b/src/gpu/cl/operators/ClSub.h
index 902adbf39d..a84c61cdb1 100644
--- a/src/gpu/cl/operators/ClSub.h
+++ b/src/gpu/cl/operators/ClSub.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited.
+ * Copyright (c) 2021, 2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -24,6 +24,7 @@
#ifndef ARM_COMPUTE_CL_SUB_H
#define ARM_COMPUTE_CL_SUB_H
+#include "arm_compute/core/ActivationLayerInfo.h"
#include "src/gpu/cl/ClCompileContext.h"
#include "src/gpu/cl/IClOperator.h"
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-11 16:46:56 +0000