diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_8VL_1x4.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_8VL_1x4.hpp | 92 |
1 files changed, 46 insertions, 46 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_8VL_1x4.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_8VL_1x4.hpp index 45d2e24258..30a9dc3e9c 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_8VL_1x4.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_8VL_1x4.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 Arm Limited. + * Copyright (c) 2023-2024 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -43,62 +43,62 @@ void sme_transpose_interleave_8VL_1x4(uint8_t *out, const uint8_t *in, size_t wi "ptrue p2.b\n" "1:" // Main row loop: Head "mov x26, %x[in]\n" - "add x25, x26, %x[in_stride]\n" - "add x24, x25, %x[in_stride]\n" - "add x23, x24, %x[in_stride]\n" "cmp %x[height], #0x3\n" - "add %x[in], x23, %x[in_stride]\n" - "csel x23, x23, %x[pad_row], GT\n" - "csel x24, x24, %x[pad_row], GE\n" + "add x25, x26, %x[in_stride]\n" + "mov x24, %x[out]\n" + "add x23, x25, %x[in_stride]\n" + "mov x22, %x[width]\n" + "add x21, x23, %x[in_stride]\n" + "csel x23, x23, %x[pad_row], GE\n" + "add %x[in], x21, %x[in_stride]\n" + "csel x21, x21, %x[pad_row], GT\n" "cmp %x[height], #0x1\n" - "mov x22, %x[out]\n" - "csel x25, x25, %x[pad_row], GT\n" "sub %x[height], %x[height], #0x4\n" - "mov x21, %x[width]\n" + "csel x25, x25, %x[pad_row], GT\n" "2:" // Main row loop: Column loop - "mov x20, x21\n" + "mov x20, x22\n" + "decw x22, ALL, MUL #8\n" "whilelt p1.b, XZR, x20\n" - "ld1b { z19.b }, p1/Z, [x26]\n" "decb x20\n" "whilelt p0.b, XZR, x20\n" - "ld1b { z17.b }, p0/Z, [x26, #1, MUL VL]\n" - "ld1b { z18.b }, p1/Z, [x25]\n" - "decw x21, ALL, MUL #8\n" - "cmp x21, #0x0\n" - "ld1b { z21.b }, p0/Z, [x25, #1, MUL VL]\n" + "ld1b { z20.b }, p1/Z, [x26]\n" + "cmp x22, #0x0\n" + "ld1b { z24.b }, p0/Z, [x26, #1, MUL VL]\n" "addvl x26, x26, #2\n" + "ld1b { z23.b }, p1/Z, [x25]\n" + "ld1b { z22.b }, p0/Z, [x25, #1, MUL VL]\n" "addvl x25, x25, #2\n" - "ld1b { z16.b }, p1/Z, [x24]\n" - "zip1 z24.b, z19.b, z16.b\n" - "zip2 z20.b, z19.b, z16.b\n" - "ld1b { z16.b }, p0/Z, [x24, #1, MUL VL]\n" - "zip1 z23.b, z17.b, z16.b\n" - "zip2 z22.b, z17.b, z16.b\n" - "addvl x24, x24, #2\n" - "ld1b { z16.b }, p1/Z, [x23]\n" - "zip1 z17.b, z18.b, z16.b\n" - "zip2 z19.b, z18.b, z16.b\n" - "ld1b { z16.b }, p0/Z, [x23, #1, MUL VL]\n" - "zip1 z18.b, z21.b, z16.b\n" - "zip2 z21.b, z21.b, z16.b\n" + "ld1b { z19.b }, p1/Z, [x23]\n" + "ld1b { z18.b }, p0/Z, [x23, #1, MUL VL]\n" "addvl x23, x23, #2\n" - "zip1 z16.b, z24.b, z17.b\n" - "zip2 z17.b, z24.b, z17.b\n" - "st1b { z16.b }, p2, [x22]\n" - "zip1 z16.b, z20.b, z19.b\n" + "ld1b { z17.b }, p1/Z, [x21]\n" + "ld1b { z16.b }, p0/Z, [x21, #1, MUL VL]\n" + "zip1 z21.b, z20.b, z19.b\n" "zip2 z20.b, z20.b, z19.b\n" - "st1b { z17.b }, p2, [x22, #1, MUL VL]\n" - "zip1 z19.b, z23.b, z18.b\n" - "zip2 z18.b, z23.b, z18.b\n" - "st1b { z16.b }, p2, [x22, #2, MUL VL]\n" - "zip1 z17.b, z22.b, z21.b\n" - "zip2 z16.b, z22.b, z21.b\n" - "st1b { z20.b }, p2, [x22, #3, MUL VL]\n" - "st1b { z19.b }, p2, [x22, #4, MUL VL]\n" - "st1b { z18.b }, p2, [x22, #5, MUL VL]\n" - "st1b { z17.b }, p2, [x22, #6, MUL VL]\n" - "st1b { z16.b }, p2, [x22, #7, MUL VL]\n" - "add x22, x22, %x[out_stride]\n" + "addvl x21, x21, #2\n" + "zip1 z25.b, z24.b, z18.b\n" + "zip2 z24.b, z24.b, z18.b\n" + "zip1 z19.b, z23.b, z17.b\n" + "zip2 z18.b, z23.b, z17.b\n" + "zip1 z17.b, z22.b, z16.b\n" + "zip2 z16.b, z22.b, z16.b\n" + "zip1 z23.b, z21.b, z19.b\n" + "zip2 z22.b, z21.b, z19.b\n" + "zip1 z21.b, z20.b, z18.b\n" + "zip2 z20.b, z20.b, z18.b\n" + "zip1 z19.b, z25.b, z17.b\n" + "zip2 z18.b, z25.b, z17.b\n" + "zip1 z17.b, z24.b, z16.b\n" + "zip2 z16.b, z24.b, z16.b\n" + "st1b { z23.b }, p2, [x24]\n" + "st1b { z22.b }, p2, [x24, #1, MUL VL]\n" + "st1b { z21.b }, p2, [x24, #2, MUL VL]\n" + "st1b { z20.b }, p2, [x24, #3, MUL VL]\n" + "st1b { z19.b }, p2, [x24, #4, MUL VL]\n" + "st1b { z18.b }, p2, [x24, #5, MUL VL]\n" + "st1b { z17.b }, p2, [x24, #6, MUL VL]\n" + "st1b { z16.b }, p2, [x24, #7, MUL VL]\n" + "add x24, x24, %x[out_stride]\n" "bgt 2b\n" "3:" // Main row loop: Column loop skip "cmp %x[height], #0x1\n" |