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Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_2x2.hpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_2x2.hpp114
1 files changed, 57 insertions, 57 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_2x2.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_2x2.hpp
index 651ae5f061..35d74e727b 100644
--- a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_2x2.hpp
+++ b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_2x2.hpp
@@ -45,69 +45,69 @@ void sme_transpose_interleave_2VL_2x2(uint16_t *out, const uint16_t *in, size_t
"blt 6f\n"
"1:" // Main row loop: Head
"mov x26, %x[in]\n"
- "mov x25, %x[width]\n"
- "add x24, x26, %x[in_stride]\n"
- "cnth x23, ALL, MUL #2\n"
- "add x21, x24, %x[in_stride]\n"
- "cmp x25, x23\n"
- "add x20, x21, %x[in_stride]\n"
- "mov x22, %x[out]\n"
+ "add x25, x26, %x[in_stride]\n"
+ "add x24, x25, %x[in_stride]\n"
+ "mov x23, %x[width]\n"
+ "cnth x21, ALL, MUL #2\n"
+ "add x20, x24, %x[in_stride]\n"
+ "cmp x23, x21\n"
"add %x[in], x20, %x[in_stride]\n"
+ "mov x22, %x[out]\n"
"sub %x[height], %x[height], #0x4\n"
"blt 3f\n"
"2:" // Main row loop: Unroll column loop
- "ld1h { z18.h }, p1/Z, [x26]\n"
- "sub x25, x25, x23\n"
+ "ld1h { z17.h }, p1/Z, [x26]\n"
+ "sub x23, x23, x21\n"
+ "cmp x23, x21\n"
+ "ld1h { z16.h }, p1/Z, [x25]\n"
+ "zip1 z24.h, z17.h, z16.h\n"
+ "zip2 z23.h, z17.h, z16.h\n"
"ld1h { z17.h }, p1/Z, [x24]\n"
- "cmp x25, x23\n"
- "ld1h { z20.h }, p1/Z, [x21]\n"
"ld1h { z16.h }, p1/Z, [x20]\n"
- "ld1h { z23.h }, p1/Z, [x26, #1, MUL VL]\n"
- "zip1 z19.h, z18.h, z17.h\n"
- "zip2 z22.h, z18.h, z17.h\n"
+ "zip1 z22.h, z17.h, z16.h\n"
+ "zip2 z21.h, z17.h, z16.h\n"
+ "ld1h { z17.h }, p1/Z, [x26, #1, MUL VL]\n"
"addvl x26, x26, #2\n"
+ "ld1h { z16.h }, p1/Z, [x25, #1, MUL VL]\n"
+ "addvl x25, x25, #2\n"
+ "zip1 z20.h, z17.h, z16.h\n"
+ "zip2 z19.h, z17.h, z16.h\n"
"ld1h { z18.h }, p1/Z, [x24, #1, MUL VL]\n"
"addvl x24, x24, #2\n"
- "ld1h { z21.h }, p1/Z, [x21, #1, MUL VL]\n"
- "zip1 z17.h, z20.h, z16.h\n"
- "zip2 z20.h, z20.h, z16.h\n"
- "addvl x21, x21, #2\n"
"ld1h { z16.h }, p1/Z, [x20, #1, MUL VL]\n"
+ "st1h { z24.h }, p1, [x22]\n"
"addvl x20, x20, #2\n"
- "st1h { z19.h }, p1, [x22]\n"
- "zip1 z19.h, z23.h, z18.h\n"
- "zip2 z18.h, z23.h, z18.h\n"
- "st1h { z22.h }, p1, [x22, #1, MUL VL]\n"
- "st1h { z17.h }, p1, [x22, #2, MUL VL]\n"
- "zip1 z17.h, z21.h, z16.h\n"
- "zip2 z16.h, z21.h, z16.h\n"
- "st1h { z20.h }, p1, [x22, #3, MUL VL]\n"
+ "zip1 z17.h, z18.h, z16.h\n"
+ "st1h { z23.h }, p1, [x22, #1, MUL VL]\n"
+ "zip2 z16.h, z18.h, z16.h\n"
+ "st1h { z22.h }, p1, [x22, #2, MUL VL]\n"
+ "st1h { z21.h }, p1, [x22, #3, MUL VL]\n"
"add x22, x22, %x[out_stride]\n"
- "st1h { z19.h }, p1, [x22]\n"
- "st1h { z18.h }, p1, [x22, #1, MUL VL]\n"
+ "st1h { z20.h }, p1, [x22]\n"
+ "st1h { z19.h }, p1, [x22, #1, MUL VL]\n"
"st1h { z17.h }, p1, [x22, #2, MUL VL]\n"
"st1h { z16.h }, p1, [x22, #3, MUL VL]\n"
"add x22, x22, %x[out_stride]\n"
"bge 2b\n"
"3:" // Main row loop: Unroll column loop skip
- "cbz x25, 5f\n"
+ "cbz x23, 5f\n"
"4:" // Main row loop: Column loop
- "whilelt p0.h, XZR, x25\n"
- "decw x25, ALL, MUL #2\n"
- "ld1h { z18.h }, p0/Z, [x26]\n"
- "cmp x25, #0x0\n"
+ "whilelt p0.h, XZR, x23\n"
+ "ld1h { z17.h }, p0/Z, [x26]\n"
+ "decw x23, ALL, MUL #2\n"
+ "ld1h { z16.h }, p0/Z, [x25]\n"
+ "cmp x23, #0x0\n"
"addvl x26, x26, #1\n"
- "ld1h { z17.h }, p0/Z, [x24]\n"
+ "zip1 z20.h, z17.h, z16.h\n"
+ "ld1h { z19.h }, p0/Z, [x24]\n"
+ "addvl x25, x25, #1\n"
"addvl x24, x24, #1\n"
- "ld1h { z20.h }, p0/Z, [x21]\n"
- "addvl x21, x21, #1\n"
+ "zip2 z18.h, z17.h, z16.h\n"
"ld1h { z16.h }, p0/Z, [x20]\n"
"addvl x20, x20, #1\n"
- "zip1 z19.h, z18.h, z17.h\n"
- "zip2 z18.h, z18.h, z17.h\n"
- "zip1 z17.h, z20.h, z16.h\n"
- "zip2 z16.h, z20.h, z16.h\n"
- "st1h { z19.h }, p1, [x22]\n"
+ "zip1 z17.h, z19.h, z16.h\n"
+ "zip2 z16.h, z19.h, z16.h\n"
+ "st1h { z20.h }, p1, [x22]\n"
"st1h { z18.h }, p1, [x22, #1, MUL VL]\n"
"st1h { z17.h }, p1, [x22, #2, MUL VL]\n"
"st1h { z16.h }, p1, [x22, #3, MUL VL]\n"
@@ -121,12 +121,12 @@ void sme_transpose_interleave_2VL_2x2(uint16_t *out, const uint16_t *in, size_t
"6:" // Main loop skip
"7:" // Tail row loop: Head
"mov x26, %x[in]\n"
+ "add x25, x26, %x[in_stride]\n"
"cmp %x[height], #0x1\n"
- "add x24, x26, %x[in_stride]\n"
"mov x21, %x[width]\n"
"cnth x20, ALL, MUL #2\n"
- "add %x[in], x24, %x[in_stride]\n"
- "csel x24, x24, %x[pad_row], GT\n"
+ "add %x[in], x25, %x[in_stride]\n"
+ "csel x25, x25, %x[pad_row], GT\n"
"cmp x21, x20\n"
"mov x22, %x[out]\n"
"sub %x[height], %x[height], #0x2\n"
@@ -134,19 +134,19 @@ void sme_transpose_interleave_2VL_2x2(uint16_t *out, const uint16_t *in, size_t
"8:" // Tail row loop: Unroll column loop
"ld1h { z18.h }, p1/Z, [x26]\n"
"sub x21, x21, x20\n"
- "ld1h { z17.h }, p1/Z, [x24]\n"
"cmp x21, x20\n"
- "ld1h { z20.h }, p1/Z, [x26, #1, MUL VL]\n"
+ "ld1h { z16.h }, p1/Z, [x25]\n"
+ "zip1 z17.h, z18.h, z16.h\n"
+ "zip2 z19.h, z18.h, z16.h\n"
+ "ld1h { z18.h }, p1/Z, [x26, #1, MUL VL]\n"
"addvl x26, x26, #2\n"
- "ld1h { z16.h }, p1/Z, [x24, #1, MUL VL]\n"
- "addvl x24, x24, #2\n"
- "zip1 z19.h, z18.h, z17.h\n"
- "zip2 z18.h, z18.h, z17.h\n"
- "zip1 z17.h, z20.h, z16.h\n"
- "zip2 z16.h, z20.h, z16.h\n"
- "st1h { z19.h }, p1, [x22]\n"
- "st1h { z18.h }, p1, [x22, #1, MUL VL]\n"
+ "ld1h { z16.h }, p1/Z, [x25, #1, MUL VL]\n"
+ "st1h { z17.h }, p1, [x22]\n"
+ "addvl x25, x25, #2\n"
+ "zip1 z17.h, z18.h, z16.h\n"
+ "st1h { z19.h }, p1, [x22, #1, MUL VL]\n"
"add x22, x22, %x[out_stride]\n"
+ "zip2 z16.h, z18.h, z16.h\n"
"st1h { z17.h }, p1, [x22]\n"
"st1h { z16.h }, p1, [x22, #1, MUL VL]\n"
"add x22, x22, %x[out_stride]\n"
@@ -155,13 +155,13 @@ void sme_transpose_interleave_2VL_2x2(uint16_t *out, const uint16_t *in, size_t
"cbz x21, 11f\n"
"10:" // Tail row loop: Column loop
"whilelt p0.h, XZR, x21\n"
- "decw x21, ALL, MUL #2\n"
"ld1h { z18.h }, p0/Z, [x26]\n"
+ "decw x21, ALL, MUL #2\n"
+ "ld1h { z16.h }, p0/Z, [x25]\n"
"cmp x21, #0x0\n"
"addvl x26, x26, #1\n"
- "ld1h { z16.h }, p0/Z, [x24]\n"
- "addvl x24, x24, #1\n"
"zip1 z17.h, z18.h, z16.h\n"
+ "addvl x25, x25, #1\n"
"zip2 z16.h, z18.h, z16.h\n"
"st1h { z17.h }, p1, [x22]\n"
"st1h { z16.h }, p1, [x22, #1, MUL VL]\n"
generated by cgit v1.2.1 (git 2.23.0) at 2024-07-07 15:12:46 +0000