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Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_1x4.hpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_1x4.hpp70
1 files changed, 35 insertions, 35 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_1x4.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_1x4.hpp
index c471d66e17..a7a384c85f 100644
--- a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_1x4.hpp
+++ b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL_1x4.hpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022-2023 Arm Limited.
+ * Copyright (c) 2022-2024 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -43,63 +43,63 @@ void sme_transpose_interleave_2VL_1x4(uint8_t *out, const uint8_t *in, size_t wi
"ptrue p1.b\n"
"1:" // Main row loop: Head
"mov x26, %x[in]\n"
- "add x25, x26, %x[in_stride]\n"
- "add x24, x25, %x[in_stride]\n"
- "add x23, x24, %x[in_stride]\n"
"cmp %x[height], #0x3\n"
- "add %x[in], x23, %x[in_stride]\n"
- "csel x23, x23, %x[pad_row], GT\n"
- "csel x24, x24, %x[pad_row], GE\n"
+ "add x25, x26, %x[in_stride]\n"
+ "mov x24, %x[width]\n"
+ "add x23, x25, %x[in_stride]\n"
+ "cntb x22\n"
+ "add x21, x23, %x[in_stride]\n"
+ "csel x23, x23, %x[pad_row], GE\n"
+ "add %x[in], x21, %x[in_stride]\n"
+ "csel x21, x21, %x[pad_row], GT\n"
"cmp %x[height], #0x1\n"
- "mov x22, %x[width]\n"
- "cntb x21\n"
- "csel x25, x25, %x[pad_row], GT\n"
- "cmp x22, x21\n"
"mov x20, %x[out]\n"
+ "csel x25, x25, %x[pad_row], GT\n"
+ "cmp x24, x22\n"
"sub %x[height], %x[height], #0x4\n"
"blt 3f\n"
"2:" // Main row loop: Unroll column loop
- "ld1b { z17.b }, p1/Z, [x26]\n"
- "sub x22, x22, x21\n"
- "cmp x22, x21\n"
- "ld1b { z18.b }, p1/Z, [x25]\n"
+ "ld1b { z20.b }, p1/Z, [x26]\n"
+ "sub x24, x24, x22\n"
"addvl x26, x26, #1\n"
+ "ld1b { z19.b }, p1/Z, [x25]\n"
+ "cmp x24, x22\n"
"addvl x25, x25, #1\n"
- "ld1b { z16.b }, p1/Z, [x24]\n"
- "zip1 z20.b, z17.b, z16.b\n"
- "zip2 z19.b, z17.b, z16.b\n"
- "addvl x24, x24, #1\n"
"ld1b { z17.b }, p1/Z, [x23]\n"
- "zip1 z16.b, z18.b, z17.b\n"
- "zip2 z18.b, z18.b, z17.b\n"
"addvl x23, x23, #1\n"
+ "ld1b { z16.b }, p1/Z, [x21]\n"
+ "addvl x21, x21, #1\n"
+ "zip1 z18.b, z20.b, z17.b\n"
+ "zip2 z20.b, z20.b, z17.b\n"
+ "zip1 z17.b, z19.b, z16.b\n"
+ "zip2 z16.b, z19.b, z16.b\n"
+ "zip1 z19.b, z18.b, z17.b\n"
+ "zip2 z18.b, z18.b, z17.b\n"
"zip1 z17.b, z20.b, z16.b\n"
"zip2 z16.b, z20.b, z16.b\n"
- "st1b { z17.b }, p1, [x20]\n"
- "st1b { z16.b }, p1, [x20, #1, MUL VL]\n"
+ "st1b { z19.b }, p1, [x20]\n"
+ "st1b { z18.b }, p1, [x20, #1, MUL VL]\n"
"add x20, x20, %x[out_stride]\n"
- "zip1 z17.b, z19.b, z18.b\n"
- "zip2 z16.b, z19.b, z18.b\n"
"st1b { z17.b }, p1, [x20]\n"
"st1b { z16.b }, p1, [x20, #1, MUL VL]\n"
"add x20, x20, %x[out_stride]\n"
"bge 2b\n"
"3:" // Main row loop: Unroll column loop skip
- "cbz x22, 5f\n"
+ "cbz x24, 5f\n"
"4:" // Main row loop: Column loop
- "whilelt p0.b, XZR, x22\n"
+ "whilelt p0.b, XZR, x24\n"
+ "decw x24, ALL, MUL #2\n"
"ld1b { z18.b }, p0/Z, [x26]\n"
- "decw x22, ALL, MUL #2\n"
- "ld1b { z17.b }, p0/Z, [x25]\n"
- "cmp x22, #0x0\n"
+ "cmp x24, #0x0\n"
"incd x26, ALL, MUL #4\n"
- "ld1b { z16.b }, p0/Z, [x24]\n"
- "zip1 z18.b, z18.b, z16.b\n"
+ "ld1b { z19.b }, p0/Z, [x25]\n"
"incd x25, ALL, MUL #4\n"
- "incd x24, ALL, MUL #4\n"
- "ld1b { z16.b }, p0/Z, [x23]\n"
- "zip1 z16.b, z17.b, z16.b\n"
+ "ld1b { z17.b }, p0/Z, [x23]\n"
"incd x23, ALL, MUL #4\n"
+ "ld1b { z16.b }, p0/Z, [x21]\n"
+ "incd x21, ALL, MUL #4\n"
+ "zip1 z18.b, z18.b, z17.b\n"
+ "zip1 z16.b, z19.b, z16.b\n"
"zip1 z17.b, z18.b, z16.b\n"
"zip2 z16.b, z18.b, z16.b\n"
"st1b { z17.b }, p1, [x20]\n"