diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp | 130 |
1 files changed, 65 insertions, 65 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp index 104d5f918e..b8f1864af3 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, 2023 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -33,28 +33,28 @@ void sve_interleaved_s8s32_mmla_8x3VL( int32_t *Cpanel, int ablocks, int bblocks, int K) { struct KernelArgs { + size_t bblocks = {}; size_t K = {}; const int8_t *Bpanel = {}; - size_t bblocks = {}; } ka; + ka.bblocks = bblocks; ka.K = (K/8) - 1; ka.Bpanel = Bpanel; - ka.bblocks = bblocks; __asm__ __volatile__( "ptrue p0.b\n" "1:" // Height loop - "ldr x23, [%x[args_ptr], %[offsetof_bblocks]]\n" - "ldr x22, [%x[args_ptr], %[offsetof_Bpanel]]\n" + "ldr x22, [%x[args_ptr], %[offsetof_bblocks]]\n" "mov x21, %x[Apanel]\n" + "ldr x20, [%x[args_ptr], %[offsetof_Bpanel]]\n" "2:" // Width loop - "ldr x20, [%x[args_ptr], %[offsetof_K]]\n" + "ldr x19, [%x[args_ptr], %[offsetof_K]]\n" "mov %x[Apanel], x21\n" - "cmp x20, #0x2\n" + "cmp x19, #0x2\n" "mov z8.s, #0x0\n" "mov z9.s, #0x0\n" - "ld1b { z4.b }, p0/Z, [x22]\n" + "ld1b { z4.b }, p0/Z, [x20]\n" "mov z10.s, #0x0\n" "mov z11.s, #0x0\n" "ld1rqb { z0.b }, p0/Z, [%x[Apanel]]\n" @@ -63,13 +63,13 @@ void sve_interleaved_s8s32_mmla_8x3VL( "ld1rqb { z1.b }, p0/Z, [%x[Apanel], #16]\n" "mov z14.s, #0x0\n" "mov z15.s, #0x0\n" - "ld1b { z5.b }, p0/Z, [x22, #1, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x20, #1, MUL VL]\n" "mov z16.s, #0x0\n" "mov z17.s, #0x0\n" "ld1rqb { z2.b }, p0/Z, [%x[Apanel], #32]\n" "mov z18.s, #0x0\n" "mov z19.s, #0x0\n" - "addvl x22, x22, #2\n" + "addvl x20, x20, #2\n" "mov z20.s, #0x0\n" "mov z21.s, #0x0\n" "add %x[Apanel], %x[Apanel], #0x30\n" @@ -87,143 +87,143 @@ void sve_interleaved_s8s32_mmla_8x3VL( "3:" // main loop head "ld1rqb { z3.b }, p0/Z, [%x[Apanel]]\n" ".inst 0x45049808 // smmla z8.s, z0.b, z4.b\n" - ".inst 0x4505980b // smmla z11.s, z0.b, z5.b\n" ".inst 0x4504982e // smmla z14.s, z1.b, z4.b\n" + ".inst 0x4505980b // smmla z11.s, z0.b, z5.b\n" ".inst 0x45059831 // smmla z17.s, z1.b, z5.b\n" - "ld1b { z6.b }, p0/Z, [x22]\n" + "ld1b { z6.b }, p0/Z, [x20]\n" ".inst 0x45049854 // smmla z20.s, z2.b, z4.b\n" ".inst 0x45059857 // smmla z23.s, z2.b, z5.b\n" - "ld1b { z7.b }, p0/Z, [x22, #1, MUL VL]\n" + "ld1b { z7.b }, p0/Z, [x20, #1, MUL VL]\n" ".inst 0x4504987a // smmla z26.s, z3.b, z4.b\n" ".inst 0x4505987d // smmla z29.s, z3.b, z5.b\n" - "ld1b { z4.b }, p0/Z, [x22, #2, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #3, MUL VL]\n" + "ld1b { z4.b }, p0/Z, [x20, #2, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x20, #3, MUL VL]\n" ".inst 0x45069809 // smmla z9.s, z0.b, z6.b\n" - ".inst 0x4507980c // smmla z12.s, z0.b, z7.b\n" ".inst 0x4506982f // smmla z15.s, z1.b, z6.b\n" - ".inst 0x45079832 // smmla z18.s, z1.b, z7.b\n" - "sub x20, x20, #0x2\n" ".inst 0x45069855 // smmla z21.s, z2.b, z6.b\n" - ".inst 0x45079858 // smmla z24.s, z2.b, z7.b\n" - "cmp x20, #0x2\n" ".inst 0x4506987b // smmla z27.s, z3.b, z6.b\n" - ".inst 0x4507987e // smmla z30.s, z3.b, z7.b\n" - "ld1b { z6.b }, p0/Z, [x22, #4, MUL VL]\n" + "ld1b { z6.b }, p0/Z, [x20, #4, MUL VL]\n" + ".inst 0x4507980c // smmla z12.s, z0.b, z7.b\n" ".inst 0x4504980a // smmla z10.s, z0.b, z4.b\n" + "sub x19, x19, #0x2\n" ".inst 0x4505980d // smmla z13.s, z0.b, z5.b\n" + ".inst 0x45079832 // smmla z18.s, z1.b, z7.b\n" "ld1rqb { z0.b }, p0/Z, [%x[Apanel], #16]\n" ".inst 0x45049830 // smmla z16.s, z1.b, z4.b\n" ".inst 0x45059833 // smmla z19.s, z1.b, z5.b\n" "ld1rqb { z1.b }, p0/Z, [%x[Apanel], #32]\n" + ".inst 0x45079858 // smmla z24.s, z2.b, z7.b\n" + ".inst 0x4507987e // smmla z30.s, z3.b, z7.b\n" + "ld1b { z7.b }, p0/Z, [x20, #5, MUL VL]\n" ".inst 0x45049856 // smmla z22.s, z2.b, z4.b\n" ".inst 0x45059859 // smmla z25.s, z2.b, z5.b\n" - "ld1b { z7.b }, p0/Z, [x22, #5, MUL VL]\n" + "ld1rqb { z2.b }, p0/Z, [%x[Apanel], #48]\n" ".inst 0x4504987c // smmla z28.s, z3.b, z4.b\n" ".inst 0x4505987f // smmla z31.s, z3.b, z5.b\n" - "ld1rqb { z2.b }, p0/Z, [%x[Apanel], #48]\n" "ld1rqb { z3.b }, p0/Z, [%x[Apanel], #64]\n" - "ld1b { z4.b }, p0/Z, [x22, #6, MUL VL]\n" + "ld1b { z4.b }, p0/Z, [x20, #6, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x20, #7, MUL VL]\n" + "addvl x20, x20, #16\n" ".inst 0x45069808 // smmla z8.s, z0.b, z6.b\n" - "ld1b { z5.b }, p0/Z, [x22, #7, MUL VL]\n" - "addvl x22, x22, #16\n" - ".inst 0x4507980b // smmla z11.s, z0.b, z7.b\n" ".inst 0x4506982e // smmla z14.s, z1.b, z6.b\n" + "cmp x19, #0x2\n" + ".inst 0x4507980b // smmla z11.s, z0.b, z7.b\n" ".inst 0x45079831 // smmla z17.s, z1.b, z7.b\n" ".inst 0x45069854 // smmla z20.s, z2.b, z6.b\n" ".inst 0x45079857 // smmla z23.s, z2.b, z7.b\n" ".inst 0x4506987a // smmla z26.s, z3.b, z6.b\n" ".inst 0x4507987d // smmla z29.s, z3.b, z7.b\n" - "ld1b { z6.b }, p0/Z, [x22, #-8, MUL VL]\n" - "ld1b { z7.b }, p0/Z, [x22, #-7, MUL VL]\n" + "ld1b { z6.b }, p0/Z, [x20, #-8, MUL VL]\n" + "ld1b { z7.b }, p0/Z, [x20, #-7, MUL VL]\n" ".inst 0x45049809 // smmla z9.s, z0.b, z4.b\n" - ".inst 0x4505980c // smmla z12.s, z0.b, z5.b\n" ".inst 0x4504982f // smmla z15.s, z1.b, z4.b\n" - ".inst 0x45059832 // smmla z18.s, z1.b, z5.b\n" ".inst 0x45049855 // smmla z21.s, z2.b, z4.b\n" - ".inst 0x45059858 // smmla z24.s, z2.b, z5.b\n" ".inst 0x4504987b // smmla z27.s, z3.b, z4.b\n" - ".inst 0x4505987e // smmla z30.s, z3.b, z5.b\n" - "ld1b { z4.b }, p0/Z, [x22, #-6, MUL VL]\n" + "ld1b { z4.b }, p0/Z, [x20, #-6, MUL VL]\n" + ".inst 0x4505980c // smmla z12.s, z0.b, z5.b\n" ".inst 0x4506980a // smmla z10.s, z0.b, z6.b\n" ".inst 0x4507980d // smmla z13.s, z0.b, z7.b\n" + ".inst 0x45059832 // smmla z18.s, z1.b, z5.b\n" "ld1rqb { z0.b }, p0/Z, [%x[Apanel], #80]\n" ".inst 0x45069830 // smmla z16.s, z1.b, z6.b\n" ".inst 0x45079833 // smmla z19.s, z1.b, z7.b\n" "ld1rqb { z1.b }, p0/Z, [%x[Apanel], #96]\n" + ".inst 0x45059858 // smmla z24.s, z2.b, z5.b\n" + ".inst 0x4505987e // smmla z30.s, z3.b, z5.b\n" + "ld1b { z5.b }, p0/Z, [x20, #-5, MUL VL]\n" ".inst 0x45069856 // smmla z22.s, z2.b, z6.b\n" ".inst 0x45079859 // smmla z25.s, z2.b, z7.b\n" - "ld1b { z5.b }, p0/Z, [x22, #-5, MUL VL]\n" + "ld1rqb { z2.b }, p0/Z, [%x[Apanel], #112]\n" ".inst 0x4506987c // smmla z28.s, z3.b, z6.b\n" ".inst 0x4507987f // smmla z31.s, z3.b, z7.b\n" - "ld1rqb { z2.b }, p0/Z, [%x[Apanel], #112]\n" "add %x[Apanel], %x[Apanel], #0x80\n" - "addvl x22, x22, #-4\n" + "addvl x20, x20, #-4\n" "bge 3b\n" "4:" // main loop skip "ld1rqb { z3.b }, p0/Z, [%x[Apanel]]\n" ".inst 0x45049808 // smmla z8.s, z0.b, z4.b\n" - ".inst 0x4505980b // smmla z11.s, z0.b, z5.b\n" ".inst 0x4504982e // smmla z14.s, z1.b, z4.b\n" + ".inst 0x4505980b // smmla z11.s, z0.b, z5.b\n" ".inst 0x45059831 // smmla z17.s, z1.b, z5.b\n" - "ld1b { z6.b }, p0/Z, [x22]\n" + "ld1b { z6.b }, p0/Z, [x20]\n" ".inst 0x45049854 // smmla z20.s, z2.b, z4.b\n" ".inst 0x45059857 // smmla z23.s, z2.b, z5.b\n" - "ld1b { z7.b }, p0/Z, [x22, #1, MUL VL]\n" + "ld1b { z7.b }, p0/Z, [x20, #1, MUL VL]\n" ".inst 0x4504987a // smmla z26.s, z3.b, z4.b\n" ".inst 0x4505987d // smmla z29.s, z3.b, z5.b\n" - "ld1b { z4.b }, p0/Z, [x22, #2, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #3, MUL VL]\n" + "ld1b { z4.b }, p0/Z, [x20, #2, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x20, #3, MUL VL]\n" ".inst 0x45069809 // smmla z9.s, z0.b, z6.b\n" - ".inst 0x4507980c // smmla z12.s, z0.b, z7.b\n" ".inst 0x4506982f // smmla z15.s, z1.b, z6.b\n" - ".inst 0x45079832 // smmla z18.s, z1.b, z7.b\n" - "add %x[Apanel], %x[Apanel], #0x10\n" ".inst 0x45069855 // smmla z21.s, z2.b, z6.b\n" - ".inst 0x45079858 // smmla z24.s, z2.b, z7.b\n" - "addvl x22, x22, #4\n" ".inst 0x4506987b // smmla z27.s, z3.b, z6.b\n" - ".inst 0x4507987e // smmla z30.s, z3.b, z7.b\n" + "add %x[Apanel], %x[Apanel], #0x10\n" + ".inst 0x4507980c // smmla z12.s, z0.b, z7.b\n" ".inst 0x4504980a // smmla z10.s, z0.b, z4.b\n" + "addvl x20, x20, #4\n" ".inst 0x4505980d // smmla z13.s, z0.b, z5.b\n" + ".inst 0x45079832 // smmla z18.s, z1.b, z7.b\n" ".inst 0x45049830 // smmla z16.s, z1.b, z4.b\n" ".inst 0x45059833 // smmla z19.s, z1.b, z5.b\n" + ".inst 0x45079858 // smmla z24.s, z2.b, z7.b\n" + ".inst 0x4507987e // smmla z30.s, z3.b, z7.b\n" ".inst 0x45049856 // smmla z22.s, z2.b, z4.b\n" ".inst 0x45059859 // smmla z25.s, z2.b, z5.b\n" ".inst 0x4504987c // smmla z28.s, z3.b, z4.b\n" ".inst 0x4505987f // smmla z31.s, z3.b, z5.b\n" - "cbz x20, 5f\n" - "ld1b { z6.b }, p0/Z, [x22]\n" + "cbz x19, 5f\n" + "ld1b { z6.b }, p0/Z, [x20]\n" "ld1rqb { z0.b }, p0/Z, [%x[Apanel]]\n" ".inst 0x45069808 // smmla z8.s, z0.b, z6.b\n" "ld1rqb { z1.b }, p0/Z, [%x[Apanel], #16]\n" - "ld1b { z7.b }, p0/Z, [x22, #1, MUL VL]\n" - ".inst 0x4507980b // smmla z11.s, z0.b, z7.b\n" + "ld1b { z7.b }, p0/Z, [x20, #1, MUL VL]\n" + ".inst 0x4506982e // smmla z14.s, z1.b, z6.b\n" "ld1rqb { z2.b }, p0/Z, [%x[Apanel], #32]\n" "ld1rqb { z3.b }, p0/Z, [%x[Apanel], #48]\n" - ".inst 0x4506982e // smmla z14.s, z1.b, z6.b\n" + ".inst 0x4507980b // smmla z11.s, z0.b, z7.b\n" ".inst 0x45079831 // smmla z17.s, z1.b, z7.b\n" ".inst 0x45069854 // smmla z20.s, z2.b, z6.b\n" - "ld1b { z4.b }, p0/Z, [x22, #2, MUL VL]\n" + "ld1b { z4.b }, p0/Z, [x20, #2, MUL VL]\n" ".inst 0x45079857 // smmla z23.s, z2.b, z7.b\n" ".inst 0x4506987a // smmla z26.s, z3.b, z6.b\n" - "ld1b { z5.b }, p0/Z, [x22, #3, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x20, #3, MUL VL]\n" ".inst 0x4507987d // smmla z29.s, z3.b, z7.b\n" - "ld1b { z6.b }, p0/Z, [x22, #4, MUL VL]\n" - "ld1b { z7.b }, p0/Z, [x22, #5, MUL VL]\n" + "ld1b { z6.b }, p0/Z, [x20, #4, MUL VL]\n" + "ld1b { z7.b }, p0/Z, [x20, #5, MUL VL]\n" ".inst 0x45049809 // smmla z9.s, z0.b, z4.b\n" - ".inst 0x4505980c // smmla z12.s, z0.b, z5.b\n" - "addvl x22, x22, #6\n" ".inst 0x4504982f // smmla z15.s, z1.b, z4.b\n" - ".inst 0x45059832 // smmla z18.s, z1.b, z5.b\n" "add %x[Apanel], %x[Apanel], #0x40\n" ".inst 0x45049855 // smmla z21.s, z2.b, z4.b\n" - ".inst 0x45059858 // smmla z24.s, z2.b, z5.b\n" ".inst 0x4504987b // smmla z27.s, z3.b, z4.b\n" - ".inst 0x4505987e // smmla z30.s, z3.b, z5.b\n" + "addvl x20, x20, #6\n" + ".inst 0x4505980c // smmla z12.s, z0.b, z5.b\n" ".inst 0x4506980a // smmla z10.s, z0.b, z6.b\n" ".inst 0x4507980d // smmla z13.s, z0.b, z7.b\n" + ".inst 0x45059832 // smmla z18.s, z1.b, z5.b\n" ".inst 0x45069830 // smmla z16.s, z1.b, z6.b\n" ".inst 0x45079833 // smmla z19.s, z1.b, z7.b\n" + ".inst 0x45059858 // smmla z24.s, z2.b, z5.b\n" + ".inst 0x4505987e // smmla z30.s, z3.b, z5.b\n" ".inst 0x45069856 // smmla z22.s, z2.b, z6.b\n" ".inst 0x45079859 // smmla z25.s, z2.b, z7.b\n" ".inst 0x4506987c // smmla z28.s, z3.b, z6.b\n" @@ -243,7 +243,7 @@ void sve_interleaved_s8s32_mmla_8x3VL( "uzp2 z14.d, z14.d, z17.d\n" "st1w { z9.s }, p0, [%x[Cpanel], #4, MUL VL]\n" "uzp1 z17.d, z15.d, z18.d\n" - "subs x23, x23, #0x1\n" + "subs x22, x22, #0x1\n" "st1w { z10.s }, p0, [%x[Cpanel], #5, MUL VL]\n" "uzp2 z15.d, z15.d, z18.d\n" "uzp1 z18.d, z16.d, z19.d\n" @@ -285,7 +285,7 @@ void sve_interleaved_s8s32_mmla_8x3VL( "bne 1b\n" : [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks) : [args_ptr] "r" (&ka), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_bblocks] "I" (offsetof(KernelArgs, bblocks)) - : "cc", "memory", "p0", "x20", "x21", "x22", "x23", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "x19", "x20", "x21", "x22", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } |