diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_3VLx8/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_3VLx8/generic.cpp | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_3VLx8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_3VLx8/generic.cpp index d26948a0d4..cd178c478a 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_3VLx8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_3VLx8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 Arm Limited. + * Copyright (c) 2019-2020 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -50,20 +50,20 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "mov z9.s, #0\n" "mov z10.s, #0\n" "mov z11.s, #0\n" - "mov z12.s, #0\n" "ld1rqw z0.s, p0/z, [%[a_ptr]]\n" - "mov z13.s, #0\n" + "mov z12.s, #0\n" "ld1w z4.s, p0/z, [%[b_ptr]]\n" - "mov z14.s, #0\n" + "mov z13.s, #0\n" "ld1rqw z1.s, p0/z, [%[a_ptr], #0x10]\n" - "mov z15.s, #0\n" + "mov z14.s, #0\n" "ld1w z5.s, p0/z, [%[b_ptr], #1, MUL VL]\n" - "mov z16.s, #0\n" + "mov z15.s, #0\n" "ld1rqw z2.s, p0/z, [%[a_ptr], #0x20]\n" - "mov z17.s, #0\n" + "mov z16.s, #0\n" "add %[a_ptr], %[a_ptr], #0x40\n" - "mov z18.s, #0\n" + "mov z17.s, #0\n" "addvl %[b_ptr], %[b_ptr], #3\n" + "mov z18.s, #0\n" "mov z19.s, #0\n" "mov z20.s, #0\n" "mov z21.s, #0\n" @@ -207,8 +207,8 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "fmla z9.s, z4.s, z0.s[1]\n" "fmla z10.s, z4.s, z0.s[2]\n" "fmla z11.s, z4.s, z0.s[3]\n" - "fmla z20.s, z4.s, z1.s[0]\n" "st1w z8.s, p0, [%[c_ptr]]\n" + "fmla z20.s, z4.s, z1.s[0]\n" "fmla z21.s, z4.s, z1.s[1]\n" "fmla z22.s, z4.s, z1.s[2]\n" "fmla z23.s, z4.s, z1.s[3]\n" @@ -216,8 +216,8 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "fmla z13.s, z5.s, z0.s[1]\n" "fmla z14.s, z5.s, z0.s[2]\n" "fmla z15.s, z5.s, z0.s[3]\n" - "fmla z24.s, z5.s, z1.s[0]\n" "st1w z12.s, p0, [%[c_ptr], #1, MUL VL]\n" + "fmla z24.s, z5.s, z1.s[0]\n" "fmla z25.s, z5.s, z1.s[1]\n" "fmla z26.s, z5.s, z1.s[2]\n" "fmla z27.s, z5.s, z1.s[3]\n" @@ -225,10 +225,11 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "fmla z17.s, z6.s, z0.s[1]\n" "fmla z18.s, z6.s, z0.s[2]\n" "fmla z19.s, z6.s, z0.s[3]\n" - "fmla z28.s, z6.s, z1.s[0]\n" "st1w z16.s, p0, [%[c_ptr], #2, MUL VL]\n" + "fmla z28.s, z6.s, z1.s[0]\n" "fmla z29.s, z6.s, z1.s[1]\n" "fmla z30.s, z6.s, z1.s[2]\n" + "st1w z9.s, p0, [%[c_ptr], #3, MUL VL]\n" "fmla z31.s, z6.s, z1.s[3]\n" "b 4f\n" "3:\n" @@ -266,8 +267,8 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "fmla z9.s, z4.s, z2.s[1]\n" "fmla z10.s, z4.s, z2.s[2]\n" "fmla z11.s, z4.s, z2.s[3]\n" - "fmla z20.s, z4.s, z3.s[0]\n" "st1w z8.s, p0, [%[c_ptr]]\n" + "fmla z20.s, z4.s, z3.s[0]\n" "fmla z21.s, z4.s, z3.s[1]\n" "fmla z22.s, z4.s, z3.s[2]\n" "fmla z23.s, z4.s, z3.s[3]\n" @@ -275,8 +276,8 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "fmla z13.s, z5.s, z2.s[1]\n" "fmla z14.s, z5.s, z2.s[2]\n" "fmla z15.s, z5.s, z2.s[3]\n" - "fmla z24.s, z5.s, z3.s[0]\n" "st1w z12.s, p0, [%[c_ptr], #1, MUL VL]\n" + "fmla z24.s, z5.s, z3.s[0]\n" "fmla z25.s, z5.s, z3.s[1]\n" "fmla z26.s, z5.s, z3.s[2]\n" "fmla z27.s, z5.s, z3.s[3]\n" @@ -284,13 +285,13 @@ void sve_interleaved_fp32_mla_3VLx8(const float *Apanel, const float *Bpanel, fl "fmla z17.s, z6.s, z2.s[1]\n" "fmla z18.s, z6.s, z2.s[2]\n" "fmla z19.s, z6.s, z2.s[3]\n" - "fmla z28.s, z6.s, z3.s[0]\n" "st1w z16.s, p0, [%[c_ptr], #2, MUL VL]\n" + "fmla z28.s, z6.s, z3.s[0]\n" "fmla z29.s, z6.s, z3.s[1]\n" "fmla z30.s, z6.s, z3.s[2]\n" + "st1w z9.s, p0, [%[c_ptr], #3, MUL VL]\n" "fmla z31.s, z6.s, z3.s[3]\n" "4:\n" - "st1w z9.s, p0, [%[c_ptr], #3, MUL VL]\n" "st1w z13.s, p0, [%[c_ptr], #4, MUL VL]\n" "st1w z17.s, p0, [%[c_ptr], #5, MUL VL]\n" "st1w z10.s, p0, [%[c_ptr], #6, MUL VL]\n" |