diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_3VLx8/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_3VLx8/generic.cpp | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_3VLx8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_3VLx8/generic.cpp index b2d3a6f52e..f2050cbd56 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_3VLx8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_3VLx8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 Arm Limited. + * Copyright (c) 2019-2020 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -50,22 +50,22 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "mov z9.h, #0\n" "mov z10.h, #0\n" "mov z11.h, #0\n" - "mov z12.h, #0\n" "ld1rqh z0.h, p0/z, [%[a_ptr]]\n" - "mov z13.h, #0\n" + "mov z12.h, #0\n" "ld1h z2.h, p0/z, [%[b_ptr]]\n" - "mov z14.h, #0\n" + "mov z13.h, #0\n" "ld1h z3.h, p0/z, [%[b_ptr], #1, MUL VL]\n" - "mov z15.h, #0\n" + "mov z14.h, #0\n" "ld1h z4.h, p0/z, [%[b_ptr], #2, MUL VL]\n" - "mov z16.h, #0\n" + "mov z15.h, #0\n" "ld1h z5.h, p0/z, [%[b_ptr], #3, MUL VL]\n" - "mov z17.h, #0\n" + "mov z16.h, #0\n" "ld1h z6.h, p0/z, [%[b_ptr], #4, MUL VL]\n" - "mov z18.h, #0\n" + "mov z17.h, #0\n" "add %[a_ptr], %[a_ptr], #0x20\n" - "mov z19.h, #0\n" + "mov z18.h, #0\n" "addvl %[b_ptr], %[b_ptr], #6\n" + "mov z19.h, #0\n" "mov z20.h, #0\n" "mov z21.h, #0\n" "mov z22.h, #0\n" @@ -202,8 +202,8 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "fmla z9.h, z2.h, z0.h[1]\n" "fmla z10.h, z2.h, z0.h[2]\n" "fmla z11.h, z2.h, z0.h[3]\n" - "fmla z12.h, z2.h, z0.h[4]\n" "st1h z8.h, p0, [%[c_ptr]]\n" + "fmla z12.h, z2.h, z0.h[4]\n" "fmla z13.h, z2.h, z0.h[5]\n" "fmla z14.h, z2.h, z0.h[6]\n" "fmla z15.h, z2.h, z0.h[7]\n" @@ -211,8 +211,8 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "fmla z17.h, z3.h, z0.h[1]\n" "fmla z18.h, z3.h, z0.h[2]\n" "fmla z19.h, z3.h, z0.h[3]\n" - "fmla z20.h, z3.h, z0.h[4]\n" "st1h z16.h, p0, [%[c_ptr], #1, MUL VL]\n" + "fmla z20.h, z3.h, z0.h[4]\n" "fmla z21.h, z3.h, z0.h[5]\n" "fmla z22.h, z3.h, z0.h[6]\n" "fmla z23.h, z3.h, z0.h[7]\n" @@ -220,10 +220,11 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "fmla z25.h, z4.h, z0.h[1]\n" "fmla z26.h, z4.h, z0.h[2]\n" "fmla z27.h, z4.h, z0.h[3]\n" - "fmla z28.h, z4.h, z0.h[4]\n" "st1h z24.h, p0, [%[c_ptr], #2, MUL VL]\n" + "fmla z28.h, z4.h, z0.h[4]\n" "fmla z29.h, z4.h, z0.h[5]\n" "fmla z30.h, z4.h, z0.h[6]\n" + "st1h z9.h, p0, [%[c_ptr], #3, MUL VL]\n" "fmla z31.h, z4.h, z0.h[7]\n" "b 4f\n" "3:\n" @@ -257,8 +258,8 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "fmla z9.h, z5.h, z1.h[1]\n" "fmla z10.h, z5.h, z1.h[2]\n" "fmla z11.h, z5.h, z1.h[3]\n" - "fmla z12.h, z5.h, z1.h[4]\n" "st1h z8.h, p0, [%[c_ptr]]\n" + "fmla z12.h, z5.h, z1.h[4]\n" "fmla z13.h, z5.h, z1.h[5]\n" "fmla z14.h, z5.h, z1.h[6]\n" "fmla z15.h, z5.h, z1.h[7]\n" @@ -266,8 +267,8 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "fmla z17.h, z6.h, z1.h[1]\n" "fmla z18.h, z6.h, z1.h[2]\n" "fmla z19.h, z6.h, z1.h[3]\n" - "fmla z20.h, z6.h, z1.h[4]\n" "st1h z16.h, p0, [%[c_ptr], #1, MUL VL]\n" + "fmla z20.h, z6.h, z1.h[4]\n" "fmla z21.h, z6.h, z1.h[5]\n" "fmla z22.h, z6.h, z1.h[6]\n" "fmla z23.h, z6.h, z1.h[7]\n" @@ -275,13 +276,13 @@ void sve_interleaved_fp16_mla_3VLx8(const __fp16 *Apanel, const __fp16 *Bpanel, "fmla z25.h, z7.h, z1.h[1]\n" "fmla z26.h, z7.h, z1.h[2]\n" "fmla z27.h, z7.h, z1.h[3]\n" - "fmla z28.h, z7.h, z1.h[4]\n" "st1h z24.h, p0, [%[c_ptr], #2, MUL VL]\n" + "fmla z28.h, z7.h, z1.h[4]\n" "fmla z29.h, z7.h, z1.h[5]\n" "fmla z30.h, z7.h, z1.h[6]\n" + "st1h z9.h, p0, [%[c_ptr], #3, MUL VL]\n" "fmla z31.h, z7.h, z1.h[7]\n" "4:\n" - "st1h z9.h, p0, [%[c_ptr], #3, MUL VL]\n" "st1h z17.h, p0, [%[c_ptr], #4, MUL VL]\n" "st1h z25.h, p0, [%[c_ptr], #5, MUL VL]\n" "st1h z10.h, p0, [%[c_ptr], #6, MUL VL]\n" |