diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp | 258 |
1 files changed, 131 insertions, 127 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp index fe5382db05..ba7185752a 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp @@ -29,8 +29,12 @@ namespace arm_gemm { void sve_interleaved_bf16fp32_mmla_8x3VL( - const bfloat16 *Apanel, const bfloat16 *Bpanel, - float *Cpanel, int ablocks, int bblocks, int K) { + const bfloat16 *Apanel, + const bfloat16 *Bpanel, + float *Cpanel, + int ablocks, + int bblocks, + int K) { struct KernelArgs { size_t K = {}; @@ -85,82 +89,82 @@ void sve_interleaved_bf16fp32_mmla_8x3VL( "mov z31.b, #0x0\n" "blt 4f\n" "3:" // main loop head - "ld1rqh { z3.h }, p0/Z, [%x[Apanel]]\n" + "ld1rqh { z6.h }, p0/Z, [%x[Apanel]]\n" ".inst 0x6464e408 // bfmmla z8.s, z0.h, z4.h\n" ".inst 0x6465e40b // bfmmla z11.s, z0.h, z5.h\n" ".inst 0x6464e42e // bfmmla z14.s, z1.h, z4.h\n" ".inst 0x6465e431 // bfmmla z17.s, z1.h, z5.h\n" - "ld1h { z6.h }, p0/Z, [x22]\n" + "ld1h { z7.h }, p0/Z, [x22]\n" ".inst 0x6464e454 // bfmmla z20.s, z2.h, z4.h\n" ".inst 0x6465e457 // bfmmla z23.s, z2.h, z5.h\n" - "ld1h { z7.h }, p0/Z, [x22, #1, MUL VL]\n" - ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" - ".inst 0x6465e47d // bfmmla z29.s, z3.h, z5.h\n" - "ld1h { z4.h }, p0/Z, [x22, #2, MUL VL]\n" - "ld1h { z5.h }, p0/Z, [x22, #3, MUL VL]\n" - ".inst 0x6466e409 // bfmmla z9.s, z0.h, z6.h\n" - ".inst 0x6467e40c // bfmmla z12.s, z0.h, z7.h\n" - ".inst 0x6466e42f // bfmmla z15.s, z1.h, z6.h\n" - ".inst 0x6467e432 // bfmmla z18.s, z1.h, z7.h\n" + "ld1h { z3.h }, p0/Z, [x22, #1, MUL VL]\n" + ".inst 0x6464e4da // bfmmla z26.s, z6.h, z4.h\n" + ".inst 0x6465e4dd // bfmmla z29.s, z6.h, z5.h\n" + "ld1h { z5.h }, p0/Z, [x22, #2, MUL VL]\n" + "ld1h { z4.h }, p0/Z, [x22, #3, MUL VL]\n" + ".inst 0x6467e409 // bfmmla z9.s, z0.h, z7.h\n" + ".inst 0x6463e40c // bfmmla z12.s, z0.h, z3.h\n" + ".inst 0x6467e42f // bfmmla z15.s, z1.h, z7.h\n" + ".inst 0x6463e432 // bfmmla z18.s, z1.h, z3.h\n" "sub x20, x20, #0x2\n" - ".inst 0x6466e455 // bfmmla z21.s, z2.h, z6.h\n" - ".inst 0x6467e458 // bfmmla z24.s, z2.h, z7.h\n" + ".inst 0x6467e455 // bfmmla z21.s, z2.h, z7.h\n" + ".inst 0x6463e458 // bfmmla z24.s, z2.h, z3.h\n" "cmp x20, #0x2\n" - ".inst 0x6466e47b // bfmmla z27.s, z3.h, z6.h\n" - ".inst 0x6467e47e // bfmmla z30.s, z3.h, z7.h\n" - "ld1h { z6.h }, p0/Z, [x22, #4, MUL VL]\n" - ".inst 0x6464e40a // bfmmla z10.s, z0.h, z4.h\n" - ".inst 0x6465e40d // bfmmla z13.s, z0.h, z5.h\n" + ".inst 0x6467e4db // bfmmla z27.s, z6.h, z7.h\n" + ".inst 0x6463e4de // bfmmla z30.s, z6.h, z3.h\n" + "ld1h { z3.h }, p0/Z, [x22, #4, MUL VL]\n" + ".inst 0x6465e40a // bfmmla z10.s, z0.h, z5.h\n" + ".inst 0x6464e40d // bfmmla z13.s, z0.h, z4.h\n" "ld1rqh { z0.h }, p0/Z, [%x[Apanel], #16]\n" - ".inst 0x6464e430 // bfmmla z16.s, z1.h, z4.h\n" - ".inst 0x6465e433 // bfmmla z19.s, z1.h, z5.h\n" + ".inst 0x6465e430 // bfmmla z16.s, z1.h, z5.h\n" + ".inst 0x6464e433 // bfmmla z19.s, z1.h, z4.h\n" "ld1rqh { z1.h }, p0/Z, [%x[Apanel], #32]\n" - ".inst 0x6464e456 // bfmmla z22.s, z2.h, z4.h\n" - ".inst 0x6465e459 // bfmmla z25.s, z2.h, z5.h\n" + ".inst 0x6465e456 // bfmmla z22.s, z2.h, z5.h\n" + ".inst 0x6464e459 // bfmmla z25.s, z2.h, z4.h\n" "ld1h { z7.h }, p0/Z, [x22, #5, MUL VL]\n" - ".inst 0x6464e47c // bfmmla z28.s, z3.h, z4.h\n" - ".inst 0x6465e47f // bfmmla z31.s, z3.h, z5.h\n" - "ld1rqh { z2.h }, p0/Z, [%x[Apanel], #48]\n" - "ld1rqh { z3.h }, p0/Z, [%x[Apanel], #64]\n" - "ld1h { z4.h }, p0/Z, [x22, #6, MUL VL]\n" - ".inst 0x6466e408 // bfmmla z8.s, z0.h, z6.h\n" - "ld1h { z5.h }, p0/Z, [x22, #7, MUL VL]\n" + ".inst 0x6465e4dc // bfmmla z28.s, z6.h, z5.h\n" + ".inst 0x6464e4df // bfmmla z31.s, z6.h, z4.h\n" + "ld1rqh { z5.h }, p0/Z, [%x[Apanel], #48]\n" + "ld1rqh { z6.h }, p0/Z, [%x[Apanel], #64]\n" + "ld1h { z2.h }, p0/Z, [x22, #6, MUL VL]\n" + ".inst 0x6463e408 // bfmmla z8.s, z0.h, z3.h\n" + "ld1h { z4.h }, p0/Z, [x22, #7, MUL VL]\n" "addvl x22, x22, #16\n" ".inst 0x6467e40b // bfmmla z11.s, z0.h, z7.h\n" - ".inst 0x6466e42e // bfmmla z14.s, z1.h, z6.h\n" + ".inst 0x6463e42e // bfmmla z14.s, z1.h, z3.h\n" ".inst 0x6467e431 // bfmmla z17.s, z1.h, z7.h\n" - ".inst 0x6466e454 // bfmmla z20.s, z2.h, z6.h\n" - ".inst 0x6467e457 // bfmmla z23.s, z2.h, z7.h\n" - ".inst 0x6466e47a // bfmmla z26.s, z3.h, z6.h\n" - ".inst 0x6467e47d // bfmmla z29.s, z3.h, z7.h\n" - "ld1h { z6.h }, p0/Z, [x22, #-8, MUL VL]\n" + ".inst 0x6463e4b4 // bfmmla z20.s, z5.h, z3.h\n" + ".inst 0x6467e4b7 // bfmmla z23.s, z5.h, z7.h\n" + ".inst 0x6463e4da // bfmmla z26.s, z6.h, z3.h\n" + ".inst 0x6467e4dd // bfmmla z29.s, z6.h, z7.h\n" + "ld1h { z3.h }, p0/Z, [x22, #-8, MUL VL]\n" "ld1h { z7.h }, p0/Z, [x22, #-7, MUL VL]\n" - ".inst 0x6464e409 // bfmmla z9.s, z0.h, z4.h\n" - ".inst 0x6465e40c // bfmmla z12.s, z0.h, z5.h\n" - ".inst 0x6464e42f // bfmmla z15.s, z1.h, z4.h\n" - ".inst 0x6465e432 // bfmmla z18.s, z1.h, z5.h\n" - ".inst 0x6464e455 // bfmmla z21.s, z2.h, z4.h\n" - ".inst 0x6465e458 // bfmmla z24.s, z2.h, z5.h\n" - ".inst 0x6464e47b // bfmmla z27.s, z3.h, z4.h\n" - ".inst 0x6465e47e // bfmmla z30.s, z3.h, z5.h\n" + ".inst 0x6462e409 // bfmmla z9.s, z0.h, z2.h\n" + ".inst 0x6464e40c // bfmmla z12.s, z0.h, z4.h\n" + ".inst 0x6462e42f // bfmmla z15.s, z1.h, z2.h\n" + ".inst 0x6464e432 // bfmmla z18.s, z1.h, z4.h\n" + ".inst 0x6462e4b5 // bfmmla z21.s, z5.h, z2.h\n" + ".inst 0x6464e4b8 // bfmmla z24.s, z5.h, z4.h\n" + ".inst 0x6462e4db // bfmmla z27.s, z6.h, z2.h\n" + ".inst 0x6464e4de // bfmmla z30.s, z6.h, z4.h\n" "ld1h { z4.h }, p0/Z, [x22, #-6, MUL VL]\n" - ".inst 0x6466e40a // bfmmla z10.s, z0.h, z6.h\n" + ".inst 0x6463e40a // bfmmla z10.s, z0.h, z3.h\n" ".inst 0x6467e40d // bfmmla z13.s, z0.h, z7.h\n" "ld1rqh { z0.h }, p0/Z, [%x[Apanel], #80]\n" - ".inst 0x6466e430 // bfmmla z16.s, z1.h, z6.h\n" + ".inst 0x6463e430 // bfmmla z16.s, z1.h, z3.h\n" ".inst 0x6467e433 // bfmmla z19.s, z1.h, z7.h\n" "ld1rqh { z1.h }, p0/Z, [%x[Apanel], #96]\n" - ".inst 0x6466e456 // bfmmla z22.s, z2.h, z6.h\n" - ".inst 0x6467e459 // bfmmla z25.s, z2.h, z7.h\n" + ".inst 0x6463e4b6 // bfmmla z22.s, z5.h, z3.h\n" + ".inst 0x6467e4b9 // bfmmla z25.s, z5.h, z7.h\n" "ld1h { z5.h }, p0/Z, [x22, #-5, MUL VL]\n" - ".inst 0x6466e47c // bfmmla z28.s, z3.h, z6.h\n" - ".inst 0x6467e47f // bfmmla z31.s, z3.h, z7.h\n" + ".inst 0x6463e4dc // bfmmla z28.s, z6.h, z3.h\n" + ".inst 0x6467e4df // bfmmla z31.s, z6.h, z7.h\n" "ld1rqh { z2.h }, p0/Z, [%x[Apanel], #112]\n" "add %x[Apanel], %x[Apanel], #0x80\n" "addvl x22, x22, #-4\n" "bge 3b\n" "4:" // main loop skip - "ld1rqh { z3.h }, p0/Z, [%x[Apanel]]\n" + "ld1rqh { z7.h }, p0/Z, [%x[Apanel]]\n" ".inst 0x6464e408 // bfmmla z8.s, z0.h, z4.h\n" ".inst 0x6465e40b // bfmmla z11.s, z0.h, z5.h\n" ".inst 0x6464e42e // bfmmla z14.s, z1.h, z4.h\n" @@ -168,114 +172,114 @@ void sve_interleaved_bf16fp32_mmla_8x3VL( "ld1h { z6.h }, p0/Z, [x22]\n" ".inst 0x6464e454 // bfmmla z20.s, z2.h, z4.h\n" ".inst 0x6465e457 // bfmmla z23.s, z2.h, z5.h\n" - "ld1h { z7.h }, p0/Z, [x22, #1, MUL VL]\n" - ".inst 0x6464e47a // bfmmla z26.s, z3.h, z4.h\n" - ".inst 0x6465e47d // bfmmla z29.s, z3.h, z5.h\n" - "ld1h { z4.h }, p0/Z, [x22, #2, MUL VL]\n" - "ld1h { z5.h }, p0/Z, [x22, #3, MUL VL]\n" + "ld1h { z3.h }, p0/Z, [x22, #1, MUL VL]\n" + ".inst 0x6464e4fa // bfmmla z26.s, z7.h, z4.h\n" + ".inst 0x6465e4fd // bfmmla z29.s, z7.h, z5.h\n" + "ld1h { z5.h }, p0/Z, [x22, #2, MUL VL]\n" + "ld1h { z4.h }, p0/Z, [x22, #3, MUL VL]\n" ".inst 0x6466e409 // bfmmla z9.s, z0.h, z6.h\n" - ".inst 0x6467e40c // bfmmla z12.s, z0.h, z7.h\n" + ".inst 0x6463e40c // bfmmla z12.s, z0.h, z3.h\n" ".inst 0x6466e42f // bfmmla z15.s, z1.h, z6.h\n" - ".inst 0x6467e432 // bfmmla z18.s, z1.h, z7.h\n" + ".inst 0x6463e432 // bfmmla z18.s, z1.h, z3.h\n" "add %x[Apanel], %x[Apanel], #0x10\n" ".inst 0x6466e455 // bfmmla z21.s, z2.h, z6.h\n" - ".inst 0x6467e458 // bfmmla z24.s, z2.h, z7.h\n" + ".inst 0x6463e458 // bfmmla z24.s, z2.h, z3.h\n" "addvl x22, x22, #4\n" - ".inst 0x6466e47b // bfmmla z27.s, z3.h, z6.h\n" - ".inst 0x6467e47e // bfmmla z30.s, z3.h, z7.h\n" - ".inst 0x6464e40a // bfmmla z10.s, z0.h, z4.h\n" - ".inst 0x6465e40d // bfmmla z13.s, z0.h, z5.h\n" - ".inst 0x6464e430 // bfmmla z16.s, z1.h, z4.h\n" - ".inst 0x6465e433 // bfmmla z19.s, z1.h, z5.h\n" - ".inst 0x6464e456 // bfmmla z22.s, z2.h, z4.h\n" - ".inst 0x6465e459 // bfmmla z25.s, z2.h, z5.h\n" - ".inst 0x6464e47c // bfmmla z28.s, z3.h, z4.h\n" - ".inst 0x6465e47f // bfmmla z31.s, z3.h, z5.h\n" + ".inst 0x6466e4fb // bfmmla z27.s, z7.h, z6.h\n" + ".inst 0x6463e4fe // bfmmla z30.s, z7.h, z3.h\n" + ".inst 0x6465e40a // bfmmla z10.s, z0.h, z5.h\n" + ".inst 0x6464e40d // bfmmla z13.s, z0.h, z4.h\n" + ".inst 0x6465e430 // bfmmla z16.s, z1.h, z5.h\n" + ".inst 0x6464e433 // bfmmla z19.s, z1.h, z4.h\n" + ".inst 0x6465e456 // bfmmla z22.s, z2.h, z5.h\n" + ".inst 0x6464e459 // bfmmla z25.s, z2.h, z4.h\n" + ".inst 0x6465e4fc // bfmmla z28.s, z7.h, z5.h\n" + ".inst 0x6464e4ff // bfmmla z31.s, z7.h, z4.h\n" "cbz x20, 5f\n" - "ld1h { z6.h }, p0/Z, [x22]\n" - "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n" - ".inst 0x6466e408 // bfmmla z8.s, z0.h, z6.h\n" - "ld1rqh { z1.h }, p0/Z, [%x[Apanel], #16]\n" - "ld1h { z7.h }, p0/Z, [x22, #1, MUL VL]\n" - ".inst 0x6467e40b // bfmmla z11.s, z0.h, z7.h\n" - "ld1rqh { z2.h }, p0/Z, [%x[Apanel], #32]\n" - "ld1rqh { z3.h }, p0/Z, [%x[Apanel], #48]\n" - ".inst 0x6466e42e // bfmmla z14.s, z1.h, z6.h\n" - ".inst 0x6467e431 // bfmmla z17.s, z1.h, z7.h\n" - ".inst 0x6466e454 // bfmmla z20.s, z2.h, z6.h\n" - "ld1h { z4.h }, p0/Z, [x22, #2, MUL VL]\n" - ".inst 0x6467e457 // bfmmla z23.s, z2.h, z7.h\n" - ".inst 0x6466e47a // bfmmla z26.s, z3.h, z6.h\n" - "ld1h { z5.h }, p0/Z, [x22, #3, MUL VL]\n" - ".inst 0x6467e47d // bfmmla z29.s, z3.h, z7.h\n" - "ld1h { z6.h }, p0/Z, [x22, #4, MUL VL]\n" - "ld1h { z7.h }, p0/Z, [x22, #5, MUL VL]\n" - ".inst 0x6464e409 // bfmmla z9.s, z0.h, z4.h\n" - ".inst 0x6465e40c // bfmmla z12.s, z0.h, z5.h\n" + "ld1h { z1.h }, p0/Z, [x22]\n" + "ld1rqh { z7.h }, p0/Z, [%x[Apanel]]\n" + ".inst 0x6461e4e8 // bfmmla z8.s, z7.h, z1.h\n" + "ld1rqh { z6.h }, p0/Z, [%x[Apanel], #16]\n" + "ld1h { z0.h }, p0/Z, [x22, #1, MUL VL]\n" + ".inst 0x6460e4eb // bfmmla z11.s, z7.h, z0.h\n" + "ld1rqh { z5.h }, p0/Z, [%x[Apanel], #32]\n" + "ld1rqh { z4.h }, p0/Z, [%x[Apanel], #48]\n" + ".inst 0x6461e4ce // bfmmla z14.s, z6.h, z1.h\n" + ".inst 0x6460e4d1 // bfmmla z17.s, z6.h, z0.h\n" + ".inst 0x6461e4b4 // bfmmla z20.s, z5.h, z1.h\n" + "ld1h { z3.h }, p0/Z, [x22, #2, MUL VL]\n" + ".inst 0x6460e4b7 // bfmmla z23.s, z5.h, z0.h\n" + ".inst 0x6461e49a // bfmmla z26.s, z4.h, z1.h\n" + "ld1h { z2.h }, p0/Z, [x22, #3, MUL VL]\n" + ".inst 0x6460e49d // bfmmla z29.s, z4.h, z0.h\n" + "ld1h { z1.h }, p0/Z, [x22, #4, MUL VL]\n" + "ld1h { z0.h }, p0/Z, [x22, #5, MUL VL]\n" + ".inst 0x6463e4e9 // bfmmla z9.s, z7.h, z3.h\n" + ".inst 0x6462e4ec // bfmmla z12.s, z7.h, z2.h\n" "addvl x22, x22, #6\n" - ".inst 0x6464e42f // bfmmla z15.s, z1.h, z4.h\n" - ".inst 0x6465e432 // bfmmla z18.s, z1.h, z5.h\n" + ".inst 0x6463e4cf // bfmmla z15.s, z6.h, z3.h\n" + ".inst 0x6462e4d2 // bfmmla z18.s, z6.h, z2.h\n" "add %x[Apanel], %x[Apanel], #0x40\n" - ".inst 0x6464e455 // bfmmla z21.s, z2.h, z4.h\n" - ".inst 0x6465e458 // bfmmla z24.s, z2.h, z5.h\n" - ".inst 0x6464e47b // bfmmla z27.s, z3.h, z4.h\n" - ".inst 0x6465e47e // bfmmla z30.s, z3.h, z5.h\n" - ".inst 0x6466e40a // bfmmla z10.s, z0.h, z6.h\n" - ".inst 0x6467e40d // bfmmla z13.s, z0.h, z7.h\n" - ".inst 0x6466e430 // bfmmla z16.s, z1.h, z6.h\n" - ".inst 0x6467e433 // bfmmla z19.s, z1.h, z7.h\n" - ".inst 0x6466e456 // bfmmla z22.s, z2.h, z6.h\n" - ".inst 0x6467e459 // bfmmla z25.s, z2.h, z7.h\n" - ".inst 0x6466e47c // bfmmla z28.s, z3.h, z6.h\n" - ".inst 0x6467e47f // bfmmla z31.s, z3.h, z7.h\n" + ".inst 0x6463e4b5 // bfmmla z21.s, z5.h, z3.h\n" + ".inst 0x6462e4b8 // bfmmla z24.s, z5.h, z2.h\n" + ".inst 0x6463e49b // bfmmla z27.s, z4.h, z3.h\n" + ".inst 0x6462e49e // bfmmla z30.s, z4.h, z2.h\n" + ".inst 0x6461e4ea // bfmmla z10.s, z7.h, z1.h\n" + ".inst 0x6460e4ed // bfmmla z13.s, z7.h, z0.h\n" + ".inst 0x6461e4d0 // bfmmla z16.s, z6.h, z1.h\n" + ".inst 0x6460e4d3 // bfmmla z19.s, z6.h, z0.h\n" + ".inst 0x6461e4b6 // bfmmla z22.s, z5.h, z1.h\n" + ".inst 0x6460e4b9 // bfmmla z25.s, z5.h, z0.h\n" + ".inst 0x6461e49c // bfmmla z28.s, z4.h, z1.h\n" + ".inst 0x6460e49f // bfmmla z31.s, z4.h, z0.h\n" "5:" // multiply loop done - "uzp1 z4.d, z8.d, z11.d\n" + "uzp1 z0.d, z8.d, z11.d\n" "uzp2 z8.d, z8.d, z11.d\n" - "st1w { z4.s }, p0, [%x[Cpanel]]\n" - "uzp1 z11.d, z9.d, z12.d\n" + "st1w { z0.s }, p0, [%x[Cpanel]]\n" + "uzp1 z0.d, z9.d, z12.d\n" "uzp2 z9.d, z9.d, z12.d\n" - "st1w { z11.s }, p0, [%x[Cpanel], #1, MUL VL]\n" - "uzp1 z12.d, z10.d, z13.d\n" + "st1w { z0.s }, p0, [%x[Cpanel], #1, MUL VL]\n" + "uzp1 z0.d, z10.d, z13.d\n" "uzp2 z10.d, z10.d, z13.d\n" - "st1w { z12.s }, p0, [%x[Cpanel], #2, MUL VL]\n" + "st1w { z0.s }, p0, [%x[Cpanel], #2, MUL VL]\n" "st1w { z8.s }, p0, [%x[Cpanel], #3, MUL VL]\n" - "uzp1 z13.d, z14.d, z17.d\n" + "uzp1 z0.d, z14.d, z17.d\n" "uzp2 z14.d, z14.d, z17.d\n" "st1w { z9.s }, p0, [%x[Cpanel], #4, MUL VL]\n" - "uzp1 z17.d, z15.d, z18.d\n" + "uzp1 z1.d, z15.d, z18.d\n" "subs x23, x23, #0x1\n" "st1w { z10.s }, p0, [%x[Cpanel], #5, MUL VL]\n" "uzp2 z15.d, z15.d, z18.d\n" - "uzp1 z18.d, z16.d, z19.d\n" - "st1w { z13.s }, p0, [%x[Cpanel], #6, MUL VL]\n" + "uzp1 z17.d, z16.d, z19.d\n" + "st1w { z0.s }, p0, [%x[Cpanel], #6, MUL VL]\n" "uzp2 z16.d, z16.d, z19.d\n" - "uzp1 z19.d, z20.d, z23.d\n" - "st1w { z17.s }, p0, [%x[Cpanel], #7, MUL VL]\n" + "uzp1 z0.d, z20.d, z23.d\n" + "st1w { z1.s }, p0, [%x[Cpanel], #7, MUL VL]\n" "addvl %x[Cpanel], %x[Cpanel], #16\n" "uzp2 z20.d, z20.d, z23.d\n" - "st1w { z18.s }, p0, [%x[Cpanel], #-8, MUL VL]\n" + "st1w { z17.s }, p0, [%x[Cpanel], #-8, MUL VL]\n" "uzp1 z23.d, z21.d, z24.d\n" "uzp2 z21.d, z21.d, z24.d\n" "st1w { z14.s }, p0, [%x[Cpanel], #-7, MUL VL]\n" - "uzp1 z24.d, z22.d, z25.d\n" + "uzp1 z19.d, z22.d, z25.d\n" "uzp2 z22.d, z22.d, z25.d\n" "st1w { z15.s }, p0, [%x[Cpanel], #-6, MUL VL]\n" - "uzp1 z25.d, z26.d, z29.d\n" + "uzp1 z18.d, z26.d, z29.d\n" "uzp2 z26.d, z26.d, z29.d\n" "st1w { z16.s }, p0, [%x[Cpanel], #-5, MUL VL]\n" - "uzp1 z29.d, z27.d, z30.d\n" + "uzp1 z17.d, z27.d, z30.d\n" "uzp2 z27.d, z27.d, z30.d\n" - "st1w { z19.s }, p0, [%x[Cpanel], #-4, MUL VL]\n" - "uzp1 z30.d, z28.d, z31.d\n" + "st1w { z0.s }, p0, [%x[Cpanel], #-4, MUL VL]\n" + "uzp1 z16.d, z28.d, z31.d\n" "uzp2 z28.d, z28.d, z31.d\n" "st1w { z23.s }, p0, [%x[Cpanel], #-3, MUL VL]\n" - "st1w { z24.s }, p0, [%x[Cpanel], #-2, MUL VL]\n" + "st1w { z19.s }, p0, [%x[Cpanel], #-2, MUL VL]\n" "st1w { z20.s }, p0, [%x[Cpanel], #-1, MUL VL]\n" "st1w { z21.s }, p0, [%x[Cpanel]]\n" "st1w { z22.s }, p0, [%x[Cpanel], #1, MUL VL]\n" - "st1w { z25.s }, p0, [%x[Cpanel], #2, MUL VL]\n" - "st1w { z29.s }, p0, [%x[Cpanel], #3, MUL VL]\n" - "st1w { z30.s }, p0, [%x[Cpanel], #4, MUL VL]\n" + "st1w { z18.s }, p0, [%x[Cpanel], #2, MUL VL]\n" + "st1w { z17.s }, p0, [%x[Cpanel], #3, MUL VL]\n" + "st1w { z16.s }, p0, [%x[Cpanel], #4, MUL VL]\n" "st1w { z26.s }, p0, [%x[Cpanel], #5, MUL VL]\n" "st1w { z27.s }, p0, [%x[Cpanel], #6, MUL VL]\n" "st1w { z28.s }, p0, [%x[Cpanel], #7, MUL VL]\n" @@ -290,4 +294,4 @@ void sve_interleaved_bf16fp32_mmla_8x3VL( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE |