diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp32_mla_8x3VL/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp32_mla_8x3VL/generic.cpp | 148 |
1 files changed, 74 insertions, 74 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp32_mla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp32_mla_8x3VL/generic.cpp index 4a0b31daff..4b20be6f01 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp32_mla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp32_mla_8x3VL/generic.cpp @@ -52,26 +52,26 @@ void sve_ffinterleaved_fp32_mla_8x3VL( __asm__ __volatile__( "ptrue p0.b\n" "1:" // Height loop - "ldr x26, [%x[args_ptr], %[offsetof_Bpanel]]\n" - "ldr x25, [%x[args_ptr], %[offsetof_N]]\n" - "str x26, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "mov x24, %x[Apanel]\n" + "ldr x20, [%x[args_ptr], %[offsetof_Bpanel]]\n" + "ldr x26, [%x[args_ptr], %[offsetof_N]]\n" + "str x20, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "mov x25, %x[Apanel]\n" "2:" // Width loop - "ldr x26, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "ldr x24, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" "ldr x20, [%x[args_ptr], %[offsetof_B_stride]]\n" "cntw x23, ALL, MUL #2\n" - "add x22, x26, x20, LSL #2\n" + "add x22, x24, x20, LSL #2\n" "add x21, x22, x20, LSL #2\n" "add x20, x21, x20, LSL #2\n" - "cmp x25, x23\n" + "cmp x26, x23\n" "str x20, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "mov %x[Apanel], x24\n" + "mov %x[Apanel], x25\n" "bgt 3f\n" "decw x23\n" - "cmp x25, x23\n" - "mov x21, x26\n" + "cmp x26, x23\n" + "mov x21, x24\n" "bgt 3f\n" - "mov x22, x26\n" + "mov x22, x24\n" "3:" // B setup done "ldr x20, [%x[args_ptr], %[offsetof_K]]\n" "cmp x20, #0x2\n" @@ -84,7 +84,7 @@ void sve_ffinterleaved_fp32_mla_8x3VL( "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n" "mov z13.b, #0x0\n" "mov z14.b, #0x0\n" - "ld1w { z4.s }, p0/Z, [x26]\n" + "ld1w { z4.s }, p0/Z, [x24]\n" "mov z15.b, #0x0\n" "mov z16.b, #0x0\n" "ld1w { z5.s }, p0/Z, [x22]\n" @@ -108,19 +108,19 @@ void sve_ffinterleaved_fp32_mla_8x3VL( "4:" // main loop head "fmla z8.s, z4.s, z0.s[0]\n" "fmla z11.s, z4.s, z0.s[1]\n" - "ld1rqw { z2.s }, p0/Z, [%x[Apanel], #32]\n" + "ld1rqw { z3.s }, p0/Z, [%x[Apanel], #32]\n" "fmla z14.s, z4.s, z0.s[2]\n" "fmla z17.s, z4.s, z0.s[3]\n" - "ld1rqw { z3.s }, p0/Z, [%x[Apanel], #48]\n" + "ld1rqw { z7.s }, p0/Z, [%x[Apanel], #48]\n" "fmla z20.s, z4.s, z1.s[0]\n" "fmla z23.s, z4.s, z1.s[1]\n" "sub x20, x20, #0x2\n" "fmla z26.s, z4.s, z1.s[2]\n" "fmla z29.s, z4.s, z1.s[3]\n" - "ld1w { z4.s }, p0/Z, [x26, #1, MUL VL]\n" + "ld1w { z4.s }, p0/Z, [x24, #1, MUL VL]\n" "fmla z9.s, z5.s, z0.s[0]\n" "fmla z12.s, z5.s, z0.s[1]\n" - "addvl x26, x26, #2\n" + "addvl x24, x24, #2\n" "fmla z15.s, z5.s, z0.s[2]\n" "fmla z18.s, z5.s, z0.s[3]\n" "cmp x20, #0x2\n" @@ -140,35 +140,35 @@ void sve_ffinterleaved_fp32_mla_8x3VL( "fmla z25.s, z6.s, z1.s[1]\n" "fmla z28.s, z6.s, z1.s[2]\n" "fmla z31.s, z6.s, z1.s[3]\n" - "ld1w { z6.s }, p0/Z, [x21, #1, MUL VL]\n" + "ld1w { z2.s }, p0/Z, [x21, #1, MUL VL]\n" "addvl x21, x21, #2\n" - "fmla z8.s, z4.s, z2.s[0]\n" - "fmla z11.s, z4.s, z2.s[1]\n" - "fmla z14.s, z4.s, z2.s[2]\n" - "fmla z17.s, z4.s, z2.s[3]\n" + "fmla z8.s, z4.s, z3.s[0]\n" + "fmla z11.s, z4.s, z3.s[1]\n" + "fmla z14.s, z4.s, z3.s[2]\n" + "fmla z17.s, z4.s, z3.s[3]\n" "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n" - "fmla z20.s, z4.s, z3.s[0]\n" - "fmla z23.s, z4.s, z3.s[1]\n" - "fmla z26.s, z4.s, z3.s[2]\n" - "fmla z29.s, z4.s, z3.s[3]\n" - "ld1w { z4.s }, p0/Z, [x26]\n" - "fmla z9.s, z5.s, z2.s[0]\n" - "fmla z12.s, z5.s, z2.s[1]\n" - "fmla z15.s, z5.s, z2.s[2]\n" - "fmla z18.s, z5.s, z2.s[3]\n" - "fmla z21.s, z5.s, z3.s[0]\n" - "fmla z24.s, z5.s, z3.s[1]\n" - "fmla z27.s, z5.s, z3.s[2]\n" - "fmla z30.s, z5.s, z3.s[3]\n" + "fmla z20.s, z4.s, z7.s[0]\n" + "fmla z23.s, z4.s, z7.s[1]\n" + "fmla z26.s, z4.s, z7.s[2]\n" + "fmla z29.s, z4.s, z7.s[3]\n" + "ld1w { z4.s }, p0/Z, [x24]\n" + "fmla z9.s, z5.s, z3.s[0]\n" + "fmla z12.s, z5.s, z3.s[1]\n" + "fmla z15.s, z5.s, z3.s[2]\n" + "fmla z18.s, z5.s, z3.s[3]\n" + "fmla z21.s, z5.s, z7.s[0]\n" + "fmla z24.s, z5.s, z7.s[1]\n" + "fmla z27.s, z5.s, z7.s[2]\n" + "fmla z30.s, z5.s, z7.s[3]\n" "ld1w { z5.s }, p0/Z, [x22]\n" - "fmla z10.s, z6.s, z2.s[0]\n" - "fmla z13.s, z6.s, z2.s[1]\n" - "fmla z16.s, z6.s, z2.s[2]\n" - "fmla z19.s, z6.s, z2.s[3]\n" - "fmla z22.s, z6.s, z3.s[0]\n" - "fmla z25.s, z6.s, z3.s[1]\n" - "fmla z28.s, z6.s, z3.s[2]\n" - "fmla z31.s, z6.s, z3.s[3]\n" + "fmla z10.s, z2.s, z3.s[0]\n" + "fmla z13.s, z2.s, z3.s[1]\n" + "fmla z16.s, z2.s, z3.s[2]\n" + "fmla z19.s, z2.s, z3.s[3]\n" + "fmla z22.s, z2.s, z7.s[0]\n" + "fmla z25.s, z2.s, z7.s[1]\n" + "fmla z28.s, z2.s, z7.s[2]\n" + "fmla z31.s, z2.s, z7.s[3]\n" "ld1w { z6.s }, p0/Z, [x21]\n" "bge 4b\n" "5:" // main loop skip @@ -177,7 +177,7 @@ void sve_ffinterleaved_fp32_mla_8x3VL( "add %x[Apanel], %x[Apanel], #0x20\n" "fmla z14.s, z4.s, z0.s[2]\n" "fmla z17.s, z4.s, z0.s[3]\n" - "addvl x26, x26, #1\n" + "addvl x24, x24, #1\n" "fmla z20.s, z4.s, z1.s[0]\n" "fmla z23.s, z4.s, z1.s[1]\n" "addvl x22, x22, #1\n" @@ -201,40 +201,40 @@ void sve_ffinterleaved_fp32_mla_8x3VL( "fmla z28.s, z6.s, z1.s[2]\n" "fmla z31.s, z6.s, z1.s[3]\n" "cbz x20, 6f\n" - "ld1rqw { z0.s }, p0/Z, [%x[Apanel]]\n" - "ld1rqw { z1.s }, p0/Z, [%x[Apanel], #16]\n" + "ld1rqw { z4.s }, p0/Z, [%x[Apanel]]\n" + "ld1rqw { z3.s }, p0/Z, [%x[Apanel], #16]\n" "add %x[Apanel], %x[Apanel], #0x20\n" - "ld1w { z7.s }, p0/Z, [x26]\n" - "ld1w { z4.s }, p0/Z, [x22]\n" - "fmla z8.s, z7.s, z0.s[0]\n" - "ld1w { z5.s }, p0/Z, [x21]\n" - "fmla z11.s, z7.s, z0.s[1]\n" - "fmla z14.s, z7.s, z0.s[2]\n" - "fmla z17.s, z7.s, z0.s[3]\n" - "fmla z20.s, z7.s, z1.s[0]\n" - "fmla z23.s, z7.s, z1.s[1]\n" - "fmla z26.s, z7.s, z1.s[2]\n" - "fmla z29.s, z7.s, z1.s[3]\n" - "fmla z9.s, z4.s, z0.s[0]\n" - "fmla z12.s, z4.s, z0.s[1]\n" - "fmla z15.s, z4.s, z0.s[2]\n" - "fmla z18.s, z4.s, z0.s[3]\n" - "fmla z21.s, z4.s, z1.s[0]\n" - "fmla z24.s, z4.s, z1.s[1]\n" - "fmla z27.s, z4.s, z1.s[2]\n" - "fmla z30.s, z4.s, z1.s[3]\n" - "fmla z10.s, z5.s, z0.s[0]\n" - "fmla z13.s, z5.s, z0.s[1]\n" - "fmla z16.s, z5.s, z0.s[2]\n" - "fmla z19.s, z5.s, z0.s[3]\n" - "fmla z22.s, z5.s, z1.s[0]\n" - "fmla z25.s, z5.s, z1.s[1]\n" - "fmla z28.s, z5.s, z1.s[2]\n" - "fmla z31.s, z5.s, z1.s[3]\n" + "ld1w { z2.s }, p0/Z, [x24]\n" + "ld1w { z1.s }, p0/Z, [x22]\n" + "fmla z8.s, z2.s, z4.s[0]\n" + "ld1w { z0.s }, p0/Z, [x21]\n" + "fmla z11.s, z2.s, z4.s[1]\n" + "fmla z14.s, z2.s, z4.s[2]\n" + "fmla z17.s, z2.s, z4.s[3]\n" + "fmla z20.s, z2.s, z3.s[0]\n" + "fmla z23.s, z2.s, z3.s[1]\n" + "fmla z26.s, z2.s, z3.s[2]\n" + "fmla z29.s, z2.s, z3.s[3]\n" + "fmla z9.s, z1.s, z4.s[0]\n" + "fmla z12.s, z1.s, z4.s[1]\n" + "fmla z15.s, z1.s, z4.s[2]\n" + "fmla z18.s, z1.s, z4.s[3]\n" + "fmla z21.s, z1.s, z3.s[0]\n" + "fmla z24.s, z1.s, z3.s[1]\n" + "fmla z27.s, z1.s, z3.s[2]\n" + "fmla z30.s, z1.s, z3.s[3]\n" + "fmla z10.s, z0.s, z4.s[0]\n" + "fmla z13.s, z0.s, z4.s[1]\n" + "fmla z16.s, z0.s, z4.s[2]\n" + "fmla z19.s, z0.s, z4.s[3]\n" + "fmla z22.s, z0.s, z3.s[0]\n" + "fmla z25.s, z0.s, z3.s[1]\n" + "fmla z28.s, z0.s, z3.s[2]\n" + "fmla z31.s, z0.s, z3.s[3]\n" "6:" // multiply loop done - "decw x25, ALL, MUL #3\n" + "decw x26, ALL, MUL #3\n" "st1w { z8.s }, p0, [%x[Cpanel]]\n" - "cmp x25, XZR\n" + "cmp x26, XZR\n" "st1w { z9.s }, p0, [%x[Cpanel], #1, MUL VL]\n" "st1w { z10.s }, p0, [%x[Cpanel], #2, MUL VL]\n" "st1w { z11.s }, p0, [%x[Cpanel], #3, MUL VL]\n" |