diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_s8s32_mmla_12x8/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_s8s32_mmla_12x8/generic.cpp | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_s8s32_mmla_12x8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_s8s32_mmla_12x8/generic.cpp index 49dbdb866e..7953510aa7 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_s8s32_mmla_12x8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_s8s32_mmla_12x8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 Arm Limited. + * Copyright (c) 2019-2020 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -59,13 +59,11 @@ void a64_interleaved_s8s32_mmla_12x8(const int8_t *Apanel, const int8_t *Bpanel, "movi v13.4s, #0\n" "ldr q6, [%[b_ptr], #0x20]\n" "movi v14.4s, #0\n" - "ldr q3, [%[a_ptr], #0x30]\n" + "add %[a_ptr], %[a_ptr], #0x40\n" "movi v15.4s, #0\n" - "ldr q7, [%[b_ptr], #0x30]\n" + "add %[b_ptr], %[b_ptr], #0x40\n" "movi v16.4s, #0\n" - "add %[a_ptr], %[a_ptr], #0x40\n" "movi v17.4s, #0\n" - "add %[b_ptr], %[b_ptr], #0x40\n" "movi v18.4s, #0\n" "movi v19.4s, #0\n" "movi v20.4s, #0\n" @@ -83,12 +81,14 @@ void a64_interleaved_s8s32_mmla_12x8(const int8_t *Apanel, const int8_t *Bpanel, "cbz %[loops], 1f\n" "2:\n" ".inst 0x4e84a408 // smmla v8.4s, v0.16b, v4.16b\n" - "subs %[loops], %[loops], #0x1\n" + "ldr q7, [%[b_ptr], #-0x10]\n" ".inst 0x4e84a42e // smmla v14.4s, v1.16b, v4.16b\n" + "ldr q3, [%[a_ptr], #-0x10]\n" ".inst 0x4e84a454 // smmla v20.4s, v2.16b, v4.16b\n" + "subs %[loops], %[loops], #0x1\n" + ".inst 0x4e85a409 // smmla v9.4s, v0.16b, v5.16b\n" ".inst 0x4e84a47a // smmla v26.4s, v3.16b, v4.16b\n" "ldr q4, [%[b_ptr]]\n" - ".inst 0x4e85a409 // smmla v9.4s, v0.16b, v5.16b\n" ".inst 0x4e85a42f // smmla v15.4s, v1.16b, v5.16b\n" ".inst 0x4e85a455 // smmla v21.4s, v2.16b, v5.16b\n" ".inst 0x4e85a47b // smmla v27.4s, v3.16b, v5.16b\n" @@ -151,18 +151,18 @@ void a64_interleaved_s8s32_mmla_12x8(const int8_t *Apanel, const int8_t *Bpanel, ".inst 0x4e87a459 // smmla v25.4s, v2.16b, v7.16b\n" "ldr q2, [%[a_ptr], #-0x20]\n" ".inst 0x4e87a47f // smmla v31.4s, v3.16b, v7.16b\n" - "ldr q7, [%[b_ptr], #-0x10]\n" - "ldr q3, [%[a_ptr], #-0x10]\n" "b.ne 2b\n" "1:\n" "cbz %[tails], 3f\n" ".inst 0x4e84a408 // smmla v8.4s, v0.16b, v4.16b\n" + "ldr q7, [%[b_ptr], #-0x10]\n" ".inst 0x4e84a42e // smmla v14.4s, v1.16b, v4.16b\n" + "ldr q3, [%[a_ptr], #-0x10]\n" ".inst 0x4e84a454 // smmla v20.4s, v2.16b, v4.16b\n" - ".inst 0x4e84a47a // smmla v26.4s, v3.16b, v4.16b\n" - "ldr q4, [%[b_ptr]]\n" ".inst 0x4e85a409 // smmla v9.4s, v0.16b, v5.16b\n" ".inst 0x4e85a42f // smmla v15.4s, v1.16b, v5.16b\n" + ".inst 0x4e84a47a // smmla v26.4s, v3.16b, v4.16b\n" + "ldr q4, [%[b_ptr]]\n" ".inst 0x4e85a455 // smmla v21.4s, v2.16b, v5.16b\n" ".inst 0x4e85a47b // smmla v27.4s, v3.16b, v5.16b\n" "ldr q5, [%[b_ptr], #0x10]\n" @@ -268,13 +268,15 @@ void a64_interleaved_s8s32_mmla_12x8(const int8_t *Apanel, const int8_t *Bpanel, "b 4f\n" "3:\n" ".inst 0x4e84a408 // smmla v8.4s, v0.16b, v4.16b\n" - "add %[a_ptr], %[a_ptr], #0x40\n" + "ldr q7, [%[b_ptr], #-0x10]\n" ".inst 0x4e84a42e // smmla v14.4s, v1.16b, v4.16b\n" - "add %[b_ptr], %[b_ptr], #0x80\n" + "ldr q3, [%[a_ptr], #-0x10]\n" ".inst 0x4e84a454 // smmla v20.4s, v2.16b, v4.16b\n" + "add %[a_ptr], %[a_ptr], #0x40\n" + ".inst 0x4e85a409 // smmla v9.4s, v0.16b, v5.16b\n" + "add %[b_ptr], %[b_ptr], #0x80\n" ".inst 0x4e84a47a // smmla v26.4s, v3.16b, v4.16b\n" "ldr q4, [%[b_ptr], #-0x80]\n" - ".inst 0x4e85a409 // smmla v9.4s, v0.16b, v5.16b\n" ".inst 0x4e85a42f // smmla v15.4s, v1.16b, v5.16b\n" ".inst 0x4e85a455 // smmla v21.4s, v2.16b, v5.16b\n" ".inst 0x4e85a47b // smmla v27.4s, v3.16b, v5.16b\n" |