diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_bf16fp32_mmla_8x12.hpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_bf16fp32_mmla_8x12.hpp | 77 |
1 files changed, 59 insertions, 18 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_bf16fp32_mmla_8x12.hpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_bf16fp32_mmla_8x12.hpp index b2c2407b28..9b3517a802 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_bf16fp32_mmla_8x12.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_interleaved_bf16fp32_mmla_8x12.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,63 +10,104 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. */ #pragma once #ifdef __aarch64__ - -#include "../bfloat.hpp" #include "../std_transforms_fixed.hpp" +#include "../bfloat.hpp" +#include "../performance_parameters.hpp" -namespace arm_gemm { +#define ARGLIST \ + const bfloat16 *, const bfloat16 *, \ + float *, int, int, int +namespace arm_gemm +{ // Actual kernel implementations -void a64_interleaved_bf16fp32_mmla_8x12(const bfloat16 *, const bfloat16 *, float *, int, int, int); +void a64_interleaved_bf16fp32_mmla_8x12( ARGLIST ); -class cls_a64_interleaved_bf16fp32_mmla_8x12 { +class cls_a64_interleaved_bf16fp32_mmla_8x12 +{ public: typedef bfloat16 operand_type; typedef float result_type; - typedef void (*kern_type)(const bfloat16 *, const bfloat16 *, float *, int, int, int); + typedef void (*kern_type)( ARGLIST ); /* Kernel blocking parameters */ + static constexpr unsigned int out_height() + { + return 8; + } + static unsigned int out_width() { return 12; } - static unsigned int out_height() + static unsigned int stripe_width() { - return 8; + return 4; } - static unsigned int k_unroll() + static constexpr unsigned int k_unroll() { return 4; } - // Use the standard fixed size transforms. + StdTransformsFixed<operand_type, result_type, 8, 12, 4> transforms = {}; + StdTransformsFixed<operand_type, result_type, 8, 12, 4, true> transforms_quantized = {}; + template<typename T> + static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci) + { + + if (std::is_same<T, bfloat16>::value) { + switch (ci->get_cpu_model()) { + default: + return { 31.54, 4.30, 7.33 }; + case CPUModel::V1: + return { 59.94, 5.08, 9.83 }; + case CPUModel::A510: + return { 7.82, 4.05, 3.07 }; + } + } - kern_type kernel=a64_interleaved_bf16fp32_mmla_8x12; + if (std::is_same<T, float>::value) { + switch (ci->get_cpu_model()) { + default: + return { 31.15, 2.51, 5.25 }; + case CPUModel::V1: + return { 59.44, 3.18, 7.26 }; + case CPUModel::A510: + return { 7.83, 2.53, 2.71 }; + } + } + + return { 1.0 }; + } + + // Default to the generic kernel + kern_type kernel=a64_interleaved_bf16fp32_mmla_8x12; cls_a64_interleaved_bf16fp32_mmla_8x12(const CPUInfo *) { - } }; } // namespace arm_gemm +#undef ARGLIST + #endif // __aarch64__ |