diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_mmla_8x12/generic.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_mmla_8x12/generic.cpp | 116 |
1 files changed, 58 insertions, 58 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_mmla_8x12/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_mmla_8x12/generic.cpp index 509f2afa09..47991114af 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_mmla_8x12/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_mmla_8x12/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,16 +10,16 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. */ #ifdef __aarch64__ @@ -52,37 +52,37 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( __asm__ __volatile__( "1:" // Height loop - "ldr x24, [%x[args_ptr], %[offsetof_Bpanel]]\n" - "ldr x23, [%x[args_ptr], %[offsetof_N]]\n" - "str x24, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "mov x22, %x[Apanel]\n" + "ldr x25, [%x[args_ptr], %[offsetof_Bpanel]]\n" + "ldr x24, [%x[args_ptr], %[offsetof_N]]\n" + "str x25, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "mov x23, %x[Apanel]\n" "2:" // Width loop - "ldr x24, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "ldr x19, [%x[args_ptr], %[offsetof_B_stride]]\n" - "add x21, x24, x19, LSL #1\n" - "add x20, x21, x19, LSL #1\n" - "add x19, x20, x19, LSL #1\n" - "str x19, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "cmp x23, #0x8\n" - "mov %x[Apanel], x22\n" + "ldr x25, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "ldr x20, [%x[args_ptr], %[offsetof_B_stride]]\n" + "add x22, x25, x20, LSL #1\n" + "add x21, x22, x20, LSL #1\n" + "add x20, x21, x20, LSL #1\n" + "str x20, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "cmp x24, #0x8\n" + "mov %x[Apanel], x23\n" "bgt 3f\n" - "cmp x23, #0x4\n" - "mov x20, x24\n" + "cmp x24, #0x4\n" + "mov x21, x25\n" "bgt 3f\n" - "mov x21, x24\n" + "mov x22, x25\n" "3:" // B setup done - "ldr q4, [x24, #0x0]\n" + "ldr q4, [x25, #0x0]\n" "ldr q0, [%x[Apanel], #0x0]\n" "movi v8.16b, #0x0\n" "ldr q1, [%x[Apanel], #0x10]\n" - "ldr q5, [x24, #0x10]\n" + "ldr q5, [x25, #0x10]\n" "movi v9.16b, #0x0\n" "ldr q2, [%x[Apanel], #0x20]\n" - "ldr x19, [%x[args_ptr], %[offsetof_K]]\n" - "cmp x19, #0x2\n" + "ldr x20, [%x[args_ptr], %[offsetof_K]]\n" + "cmp x20, #0x2\n" "movi v10.16b, #0x0\n" "movi v11.16b, #0x0\n" - "add x24, x24, #0x20\n" + "add x25, x25, #0x20\n" "movi v12.16b, #0x0\n" "movi v13.16b, #0x0\n" "add %x[Apanel], %x[Apanel], #0x30\n" @@ -107,30 +107,30 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( "blt 5f\n" "4:" // main loop head "ldr q3, [%x[Apanel], #0x0]\n" - "ldr q6, [x21, #0x0]\n" + "ldr q6, [x22, #0x0]\n" ".inst 0x6e44ec08 // bfmmla v8.4s, v0.8h, v4.8h\n" - "ldr q7, [x21, #0x10]\n" + "ldr q7, [x22, #0x10]\n" ".inst 0x6e45ec0b // bfmmla v11.4s, v0.8h, v5.8h\n" ".inst 0x6e44ec2e // bfmmla v14.4s, v1.8h, v4.8h\n" ".inst 0x6e45ec31 // bfmmla v17.4s, v1.8h, v5.8h\n" ".inst 0x6e44ec54 // bfmmla v20.4s, v2.8h, v4.8h\n" - "sub x19, x19, #0x2\n" + "sub x20, x20, #0x2\n" ".inst 0x6e45ec57 // bfmmla v23.4s, v2.8h, v5.8h\n" ".inst 0x6e44ec7a // bfmmla v26.4s, v3.8h, v4.8h\n" - "ldr q4, [x20, #0x0]\n" + "ldr q4, [x21, #0x0]\n" ".inst 0x6e45ec7d // bfmmla v29.4s, v3.8h, v5.8h\n" - "ldr q5, [x20, #0x10]\n" + "ldr q5, [x21, #0x10]\n" ".inst 0x6e46ec09 // bfmmla v9.4s, v0.8h, v6.8h\n" ".inst 0x6e47ec0c // bfmmla v12.4s, v0.8h, v7.8h\n" ".inst 0x6e46ec2f // bfmmla v15.4s, v1.8h, v6.8h\n" - "cmp x19, #0x2\n" + "cmp x20, #0x2\n" ".inst 0x6e47ec32 // bfmmla v18.4s, v1.8h, v7.8h\n" ".inst 0x6e46ec55 // bfmmla v21.4s, v2.8h, v6.8h\n" ".inst 0x6e47ec58 // bfmmla v24.4s, v2.8h, v7.8h\n" ".inst 0x6e46ec7b // bfmmla v27.4s, v3.8h, v6.8h\n" - "ldr q6, [x24, #0x0]\n" + "ldr q6, [x25, #0x0]\n" ".inst 0x6e47ec7e // bfmmla v30.4s, v3.8h, v7.8h\n" - "ldr q7, [x24, #0x10]\n" + "ldr q7, [x25, #0x10]\n" ".inst 0x6e44ec0a // bfmmla v10.4s, v0.8h, v4.8h\n" ".inst 0x6e45ec0d // bfmmla v13.4s, v0.8h, v5.8h\n" "ldr q0, [%x[Apanel], #0x10]\n" @@ -141,32 +141,32 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( ".inst 0x6e45ec59 // bfmmla v25.4s, v2.8h, v5.8h\n" "ldr q2, [%x[Apanel], #0x30]\n" ".inst 0x6e44ec7c // bfmmla v28.4s, v3.8h, v4.8h\n" - "ldr q4, [x21, #0x20]\n" + "ldr q4, [x22, #0x20]\n" ".inst 0x6e45ec7f // bfmmla v31.4s, v3.8h, v5.8h\n" "ldr q3, [%x[Apanel], #0x40]\n" - "ldr q5, [x21, #0x30]\n" + "ldr q5, [x22, #0x30]\n" ".inst 0x6e46ec08 // bfmmla v8.4s, v0.8h, v6.8h\n" ".inst 0x6e47ec0b // bfmmla v11.4s, v0.8h, v7.8h\n" ".inst 0x6e46ec2e // bfmmla v14.4s, v1.8h, v6.8h\n" ".inst 0x6e47ec31 // bfmmla v17.4s, v1.8h, v7.8h\n" - "add x21, x21, #0x40\n" + "add x22, x22, #0x40\n" ".inst 0x6e46ec54 // bfmmla v20.4s, v2.8h, v6.8h\n" ".inst 0x6e47ec57 // bfmmla v23.4s, v2.8h, v7.8h\n" ".inst 0x6e46ec7a // bfmmla v26.4s, v3.8h, v6.8h\n" - "ldr q6, [x20, #0x20]\n" + "ldr q6, [x21, #0x20]\n" ".inst 0x6e47ec7d // bfmmla v29.4s, v3.8h, v7.8h\n" - "ldr q7, [x20, #0x30]\n" + "ldr q7, [x21, #0x30]\n" ".inst 0x6e44ec09 // bfmmla v9.4s, v0.8h, v4.8h\n" ".inst 0x6e45ec0c // bfmmla v12.4s, v0.8h, v5.8h\n" ".inst 0x6e44ec2f // bfmmla v15.4s, v1.8h, v4.8h\n" ".inst 0x6e45ec32 // bfmmla v18.4s, v1.8h, v5.8h\n" - "add x20, x20, #0x40\n" + "add x21, x21, #0x40\n" ".inst 0x6e44ec55 // bfmmla v21.4s, v2.8h, v4.8h\n" ".inst 0x6e45ec58 // bfmmla v24.4s, v2.8h, v5.8h\n" ".inst 0x6e44ec7b // bfmmla v27.4s, v3.8h, v4.8h\n" - "ldr q4, [x24, #0x20]\n" + "ldr q4, [x25, #0x20]\n" ".inst 0x6e45ec7e // bfmmla v30.4s, v3.8h, v5.8h\n" - "ldr q5, [x24, #0x30]\n" + "ldr q5, [x25, #0x30]\n" ".inst 0x6e46ec0a // bfmmla v10.4s, v0.8h, v6.8h\n" ".inst 0x6e47ec0d // bfmmla v13.4s, v0.8h, v7.8h\n" "ldr q0, [%x[Apanel], #0x50]\n" @@ -179,13 +179,13 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( ".inst 0x6e46ec7c // bfmmla v28.4s, v3.8h, v6.8h\n" ".inst 0x6e47ec7f // bfmmla v31.4s, v3.8h, v7.8h\n" "add %x[Apanel], %x[Apanel], #0x80\n" - "add x24, x24, #0x40\n" + "add x25, x25, #0x40\n" "bge 4b\n" "5:" // main loop skip "ldr q3, [%x[Apanel], #0x0]\n" - "ldr q6, [x21, #0x0]\n" + "ldr q6, [x22, #0x0]\n" ".inst 0x6e44ec08 // bfmmla v8.4s, v0.8h, v4.8h\n" - "ldr q7, [x21, #0x10]\n" + "ldr q7, [x22, #0x10]\n" ".inst 0x6e45ec0b // bfmmla v11.4s, v0.8h, v5.8h\n" ".inst 0x6e44ec2e // bfmmla v14.4s, v1.8h, v4.8h\n" ".inst 0x6e45ec31 // bfmmla v17.4s, v1.8h, v5.8h\n" @@ -193,16 +193,16 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( "add %x[Apanel], %x[Apanel], #0x10\n" ".inst 0x6e45ec57 // bfmmla v23.4s, v2.8h, v5.8h\n" ".inst 0x6e44ec7a // bfmmla v26.4s, v3.8h, v4.8h\n" - "ldr q4, [x20, #0x0]\n" + "ldr q4, [x21, #0x0]\n" ".inst 0x6e45ec7d // bfmmla v29.4s, v3.8h, v5.8h\n" - "ldr q5, [x20, #0x10]\n" + "ldr q5, [x21, #0x10]\n" ".inst 0x6e46ec09 // bfmmla v9.4s, v0.8h, v6.8h\n" ".inst 0x6e47ec0c // bfmmla v12.4s, v0.8h, v7.8h\n" ".inst 0x6e46ec2f // bfmmla v15.4s, v1.8h, v6.8h\n" - "add x21, x21, #0x20\n" + "add x22, x22, #0x20\n" ".inst 0x6e47ec32 // bfmmla v18.4s, v1.8h, v7.8h\n" ".inst 0x6e46ec55 // bfmmla v21.4s, v2.8h, v6.8h\n" - "add x20, x20, #0x20\n" + "add x21, x21, #0x20\n" ".inst 0x6e47ec58 // bfmmla v24.4s, v2.8h, v7.8h\n" ".inst 0x6e46ec7b // bfmmla v27.4s, v3.8h, v6.8h\n" ".inst 0x6e47ec7e // bfmmla v30.4s, v3.8h, v7.8h\n" @@ -214,26 +214,26 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( ".inst 0x6e45ec59 // bfmmla v25.4s, v2.8h, v5.8h\n" ".inst 0x6e44ec7c // bfmmla v28.4s, v3.8h, v4.8h\n" ".inst 0x6e45ec7f // bfmmla v31.4s, v3.8h, v5.8h\n" - "cbz x19, 6f\n" - "ldr q6, [x24, #0x0]\n" + "cbz x20, 6f\n" + "ldr q6, [x25, #0x0]\n" "ldr q0, [%x[Apanel], #0x0]\n" ".inst 0x6e46ec08 // bfmmla v8.4s, v0.8h, v6.8h\n" "ldr q1, [%x[Apanel], #0x10]\n" - "ldr q7, [x24, #0x10]\n" + "ldr q7, [x25, #0x10]\n" ".inst 0x6e47ec0b // bfmmla v11.4s, v0.8h, v7.8h\n" "ldr q2, [%x[Apanel], #0x20]\n" "ldr q3, [%x[Apanel], #0x30]\n" ".inst 0x6e46ec2e // bfmmla v14.4s, v1.8h, v6.8h\n" - "ldr q4, [x21, #0x0]\n" - "ldr q5, [x21, #0x10]\n" + "ldr q4, [x22, #0x0]\n" + "ldr q5, [x22, #0x10]\n" ".inst 0x6e47ec31 // bfmmla v17.4s, v1.8h, v7.8h\n" ".inst 0x6e46ec54 // bfmmla v20.4s, v2.8h, v6.8h\n" ".inst 0x6e47ec57 // bfmmla v23.4s, v2.8h, v7.8h\n" "add %x[Apanel], %x[Apanel], #0x40\n" ".inst 0x6e46ec7a // bfmmla v26.4s, v3.8h, v6.8h\n" - "ldr q6, [x20, #0x0]\n" + "ldr q6, [x21, #0x0]\n" ".inst 0x6e47ec7d // bfmmla v29.4s, v3.8h, v7.8h\n" - "ldr q7, [x20, #0x10]\n" + "ldr q7, [x21, #0x10]\n" ".inst 0x6e44ec09 // bfmmla v9.4s, v0.8h, v4.8h\n" ".inst 0x6e45ec0c // bfmmla v12.4s, v0.8h, v5.8h\n" ".inst 0x6e44ec2f // bfmmla v15.4s, v1.8h, v4.8h\n" @@ -251,7 +251,7 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( ".inst 0x6e46ec7c // bfmmla v28.4s, v3.8h, v6.8h\n" ".inst 0x6e47ec7f // bfmmla v31.4s, v3.8h, v7.8h\n" "6:" // multiply loop done - "subs x23, x23, #0xc\n" + "subs x24, x24, #0xc\n" "uzp1 v4.2d, v8.2d, v11.2d\n" "uzp2 v8.2d, v8.2d, v11.2d\n" "uzp1 v11.2d, v9.2d, v12.2d\n" @@ -306,7 +306,7 @@ void a64_ffinterleaved_bf16fp32_mmla_8x12( "bne 1b\n" : [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks) : [args_ptr] "r" (&ka), [offsetof_B_stride] "I" (offsetof(KernelArgs, B_stride)), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_N] "I" (offsetof(KernelArgs, N)), [offsetof_cur_B_ptr] "I" (offsetof(KernelArgs, cur_B_ptr)) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23", "x24", "x25" ); } |