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path: root/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp
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Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp92
1 files changed, 46 insertions, 46 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp
index 967396c377..2458d6a035 100644
--- a/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp
+++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_ffinterleaved_bf16fp32_dot_8x12/generic.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -10,16 +10,16 @@
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
*/
#ifdef __aarch64__
@@ -52,34 +52,34 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
__asm__ __volatile__(
"1:" // Height loop
- "ldr x24, [%x[args_ptr], %[offsetof_Bpanel]]\n"
- "ldr x23, [%x[args_ptr], %[offsetof_N]]\n"
- "str x24, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
- "mov x22, %x[Apanel]\n"
+ "ldr x25, [%x[args_ptr], %[offsetof_Bpanel]]\n"
+ "ldr x24, [%x[args_ptr], %[offsetof_N]]\n"
+ "str x25, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
+ "mov x23, %x[Apanel]\n"
"2:" // Width loop
- "ldr x24, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
- "ldr x19, [%x[args_ptr], %[offsetof_B_stride]]\n"
- "add x21, x24, x19, LSL #1\n"
- "add x20, x21, x19, LSL #1\n"
- "add x19, x20, x19, LSL #1\n"
- "str x19, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
- "cmp x23, #0x8\n"
- "mov %x[Apanel], x22\n"
+ "ldr x25, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
+ "ldr x20, [%x[args_ptr], %[offsetof_B_stride]]\n"
+ "add x22, x25, x20, LSL #1\n"
+ "add x21, x22, x20, LSL #1\n"
+ "add x20, x21, x20, LSL #1\n"
+ "str x20, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n"
+ "cmp x24, #0x8\n"
+ "mov %x[Apanel], x23\n"
"bgt 3f\n"
- "cmp x23, #0x4\n"
- "mov x20, x24\n"
+ "cmp x24, #0x4\n"
+ "mov x21, x25\n"
"bgt 3f\n"
- "mov x21, x24\n"
+ "mov x22, x25\n"
"3:" // B setup done
"ldr q0, [%x[Apanel], #0x0]\n"
"ldr q1, [%x[Apanel], #0x10]\n"
"movi v8.16b, #0x0\n"
- "ldr q4, [x24, #0x0]\n"
- "ldr q5, [x21, #0x0]\n"
+ "ldr q4, [x25, #0x0]\n"
+ "ldr q5, [x22, #0x0]\n"
"movi v9.16b, #0x0\n"
- "ldr q6, [x20, #0x0]\n"
- "ldr x19, [%x[args_ptr], %[offsetof_K]]\n"
- "cmp x19, #0x2\n"
+ "ldr q6, [x21, #0x0]\n"
+ "ldr x20, [%x[args_ptr], %[offsetof_K]]\n"
+ "cmp x20, #0x2\n"
"movi v10.16b, #0x0\n"
"movi v11.16b, #0x0\n"
"movi v12.16b, #0x0\n"
@@ -109,38 +109,38 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
".inst 0x4f40f088 // bfdot v8.4s, v4.8h, v0.h[0]\n"
".inst 0x4f60f08b // bfdot v11.4s, v4.8h, v0.h[1]\n"
".inst 0x4f40f88e // bfdot v14.4s, v4.8h, v0.h[2]\n"
- "sub x19, x19, #0x2\n"
+ "sub x20, x20, #0x2\n"
".inst 0x4f60f891 // bfdot v17.4s, v4.8h, v0.h[3]\n"
".inst 0x4f41f094 // bfdot v20.4s, v4.8h, v1.h[0]\n"
- "cmp x19, #0x2\n"
+ "cmp x20, #0x2\n"
".inst 0x4f61f097 // bfdot v23.4s, v4.8h, v1.h[1]\n"
".inst 0x4f41f89a // bfdot v26.4s, v4.8h, v1.h[2]\n"
"add %x[Apanel], %x[Apanel], #0x40\n"
".inst 0x4f61f89d // bfdot v29.4s, v4.8h, v1.h[3]\n"
- "ldr q4, [x24, #0x10]\n"
+ "ldr q4, [x25, #0x10]\n"
".inst 0x4f40f0a9 // bfdot v9.4s, v5.8h, v0.h[0]\n"
".inst 0x4f60f0ac // bfdot v12.4s, v5.8h, v0.h[1]\n"
".inst 0x4f40f8af // bfdot v15.4s, v5.8h, v0.h[2]\n"
- "add x24, x24, #0x20\n"
+ "add x25, x25, #0x20\n"
".inst 0x4f60f8b2 // bfdot v18.4s, v5.8h, v0.h[3]\n"
".inst 0x4f41f0b5 // bfdot v21.4s, v5.8h, v1.h[0]\n"
".inst 0x4f61f0b8 // bfdot v24.4s, v5.8h, v1.h[1]\n"
".inst 0x4f41f8bb // bfdot v27.4s, v5.8h, v1.h[2]\n"
".inst 0x4f61f8be // bfdot v30.4s, v5.8h, v1.h[3]\n"
- "ldr q5, [x21, #0x10]\n"
+ "ldr q5, [x22, #0x10]\n"
".inst 0x4f40f0ca // bfdot v10.4s, v6.8h, v0.h[0]\n"
".inst 0x4f60f0cd // bfdot v13.4s, v6.8h, v0.h[1]\n"
".inst 0x4f40f8d0 // bfdot v16.4s, v6.8h, v0.h[2]\n"
- "add x21, x21, #0x20\n"
+ "add x22, x22, #0x20\n"
".inst 0x4f60f8d3 // bfdot v19.4s, v6.8h, v0.h[3]\n"
"ldr q0, [%x[Apanel], #0x0]\n"
".inst 0x4f41f0d6 // bfdot v22.4s, v6.8h, v1.h[0]\n"
".inst 0x4f61f0d9 // bfdot v25.4s, v6.8h, v1.h[1]\n"
".inst 0x4f41f8dc // bfdot v28.4s, v6.8h, v1.h[2]\n"
".inst 0x4f61f8df // bfdot v31.4s, v6.8h, v1.h[3]\n"
- "ldr q6, [x20, #0x10]\n"
+ "ldr q6, [x21, #0x10]\n"
"ldr q1, [%x[Apanel], #0x10]\n"
- "add x20, x20, #0x20\n"
+ "add x21, x21, #0x20\n"
".inst 0x4f42f088 // bfdot v8.4s, v4.8h, v2.h[0]\n"
".inst 0x4f62f08b // bfdot v11.4s, v4.8h, v2.h[1]\n"
".inst 0x4f42f88e // bfdot v14.4s, v4.8h, v2.h[2]\n"
@@ -149,7 +149,7 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
".inst 0x4f63f097 // bfdot v23.4s, v4.8h, v3.h[1]\n"
".inst 0x4f43f89a // bfdot v26.4s, v4.8h, v3.h[2]\n"
".inst 0x4f63f89d // bfdot v29.4s, v4.8h, v3.h[3]\n"
- "ldr q4, [x24, #0x0]\n"
+ "ldr q4, [x25, #0x0]\n"
".inst 0x4f42f0a9 // bfdot v9.4s, v5.8h, v2.h[0]\n"
".inst 0x4f62f0ac // bfdot v12.4s, v5.8h, v2.h[1]\n"
".inst 0x4f42f8af // bfdot v15.4s, v5.8h, v2.h[2]\n"
@@ -158,7 +158,7 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
".inst 0x4f63f0b8 // bfdot v24.4s, v5.8h, v3.h[1]\n"
".inst 0x4f43f8bb // bfdot v27.4s, v5.8h, v3.h[2]\n"
".inst 0x4f63f8be // bfdot v30.4s, v5.8h, v3.h[3]\n"
- "ldr q5, [x21, #0x0]\n"
+ "ldr q5, [x22, #0x0]\n"
".inst 0x4f42f0ca // bfdot v10.4s, v6.8h, v2.h[0]\n"
".inst 0x4f62f0cd // bfdot v13.4s, v6.8h, v2.h[1]\n"
".inst 0x4f42f8d0 // bfdot v16.4s, v6.8h, v2.h[2]\n"
@@ -167,7 +167,7 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
".inst 0x4f63f0d9 // bfdot v25.4s, v6.8h, v3.h[1]\n"
".inst 0x4f43f8dc // bfdot v28.4s, v6.8h, v3.h[2]\n"
".inst 0x4f63f8df // bfdot v31.4s, v6.8h, v3.h[3]\n"
- "ldr q6, [x20, #0x0]\n"
+ "ldr q6, [x21, #0x0]\n"
"bge 4b\n"
"5:" // main loop skip
".inst 0x4f40f088 // bfdot v8.4s, v4.8h, v0.h[0]\n"
@@ -175,13 +175,13 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
"add %x[Apanel], %x[Apanel], #0x20\n"
".inst 0x4f40f88e // bfdot v14.4s, v4.8h, v0.h[2]\n"
".inst 0x4f60f891 // bfdot v17.4s, v4.8h, v0.h[3]\n"
- "add x24, x24, #0x10\n"
+ "add x25, x25, #0x10\n"
".inst 0x4f41f094 // bfdot v20.4s, v4.8h, v1.h[0]\n"
".inst 0x4f61f097 // bfdot v23.4s, v4.8h, v1.h[1]\n"
- "add x21, x21, #0x10\n"
+ "add x22, x22, #0x10\n"
".inst 0x4f41f89a // bfdot v26.4s, v4.8h, v1.h[2]\n"
".inst 0x4f61f89d // bfdot v29.4s, v4.8h, v1.h[3]\n"
- "add x20, x20, #0x10\n"
+ "add x21, x21, #0x10\n"
".inst 0x4f40f0a9 // bfdot v9.4s, v5.8h, v0.h[0]\n"
".inst 0x4f60f0ac // bfdot v12.4s, v5.8h, v0.h[1]\n"
".inst 0x4f40f8af // bfdot v15.4s, v5.8h, v0.h[2]\n"
@@ -198,14 +198,14 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
".inst 0x4f61f0d9 // bfdot v25.4s, v6.8h, v1.h[1]\n"
".inst 0x4f41f8dc // bfdot v28.4s, v6.8h, v1.h[2]\n"
".inst 0x4f61f8df // bfdot v31.4s, v6.8h, v1.h[3]\n"
- "cbz x19, 6f\n"
+ "cbz x20, 6f\n"
"ldr q0, [%x[Apanel], #0x0]\n"
"ldr q1, [%x[Apanel], #0x10]\n"
"add %x[Apanel], %x[Apanel], #0x20\n"
- "ldr q7, [x24, #0x0]\n"
- "ldr q4, [x21, #0x0]\n"
+ "ldr q7, [x25, #0x0]\n"
+ "ldr q4, [x22, #0x0]\n"
".inst 0x4f40f0e8 // bfdot v8.4s, v7.8h, v0.h[0]\n"
- "ldr q5, [x20, #0x0]\n"
+ "ldr q5, [x21, #0x0]\n"
".inst 0x4f60f0eb // bfdot v11.4s, v7.8h, v0.h[1]\n"
".inst 0x4f40f8ee // bfdot v14.4s, v7.8h, v0.h[2]\n"
".inst 0x4f60f8f1 // bfdot v17.4s, v7.8h, v0.h[3]\n"
@@ -230,7 +230,7 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
".inst 0x4f41f8bc // bfdot v28.4s, v5.8h, v1.h[2]\n"
".inst 0x4f61f8bf // bfdot v31.4s, v5.8h, v1.h[3]\n"
"6:" // multiply loop done
- "subs x23, x23, #0xc\n"
+ "subs x24, x24, #0xc\n"
"str q8, [%x[Cpanel], #0x0]\n"
"str q9, [%x[Cpanel], #0x10]\n"
"str q10, [%x[Cpanel], #0x20]\n"
@@ -261,7 +261,7 @@ void a64_ffinterleaved_bf16fp32_dot_8x12(
"bne 1b\n"
: [Apanel] "+&r" (Apanel), [Cpanel] "+&r" (Cpanel), [ablocks] "+&r" (ablocks)
: [args_ptr] "r" (&ka), [offsetof_B_stride] "I" (offsetof(KernelArgs, B_stride)), [offsetof_Bpanel] "I" (offsetof(KernelArgs, Bpanel)), [offsetof_K] "I" (offsetof(KernelArgs, K)), [offsetof_N] "I" (offsetof(KernelArgs, N)), [offsetof_cur_B_ptr] "I" (offsetof(KernelArgs, cur_B_ptr))
- : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24"
+ : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23", "x24", "x25"
);
}