diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp32_fp32.hpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp32_fp32.hpp | 87 |
1 files changed, 43 insertions, 44 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp32_fp32.hpp b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp32_fp32.hpp index 6c009b34b8..80c387db47 100644 --- a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp32_fp32.hpp +++ b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp32_fp32.hpp @@ -79,29 +79,29 @@ void interleave_block<8, 1, VLType::None, false>( "prfm pldl1keep, [x21, #0x40]\n" "blt 3f\n" "2:" // Main loop head - "ldr q28, [x28], #0x10\n" - "ldr q27, [x27], #0x10\n" + "ldr q20, [x28], #0x10\n" + "ldr q18, [x27], #0x10\n" "subs %x[width], %x[width], #0x4\n" "cmp %x[width], #0x4\n" - "ldr q22, [x26], #0x10\n" - "ldr q21, [x25], #0x10\n" - "zip1 v26.4s, v28.4s, v22.4s\n" - "zip1 v25.4s, v27.4s, v21.4s\n" - "ldr q24, [x24], #0x10\n" + "ldr q17, [x26], #0x10\n" + "ldr q16, [x25], #0x10\n" + "zip1 v25.4s, v20.4s, v17.4s\n" + "zip1 v24.4s, v18.4s, v16.4s\n" + "ldr q19, [x24], #0x10\n" "ldr q23, [x23], #0x10\n" - "zip2 v22.4s, v28.4s, v22.4s\n" - "zip2 v21.4s, v27.4s, v21.4s\n" - "ldr q19, [x22], #0x10\n" - "ldr q18, [x21], #0x10\n" - "zip1 v20.4s, v24.4s, v19.4s\n" - "zip1 v17.4s, v23.4s, v18.4s\n" - "zip2 v19.4s, v24.4s, v19.4s\n" - "zip2 v18.4s, v23.4s, v18.4s\n" + "zip2 v22.4s, v20.4s, v17.4s\n" + "zip2 v21.4s, v18.4s, v16.4s\n" + "ldr q18, [x22], #0x10\n" + "ldr q16, [x21], #0x10\n" + "zip1 v20.4s, v19.4s, v18.4s\n" + "zip1 v17.4s, v23.4s, v16.4s\n" + "zip2 v19.4s, v19.4s, v18.4s\n" + "zip2 v18.4s, v23.4s, v16.4s\n" "prfm pldl1keep, [x28, #0x70]\n" "prfm pldl1keep, [x27, #0x70]\n" "prfm pldl1keep, [x26, #0x70]\n" "prfm pldl1keep, [x25, #0x70]\n" - "zip1 v16.4s, v26.4s, v25.4s\n" + "zip1 v16.4s, v25.4s, v24.4s\n" "str q16, [%x[out_ptr], #0x0]\n" "prfm pldl1keep, [x24, #0x70]\n" "prfm pldl1keep, [x23, #0x70]\n" @@ -109,7 +109,7 @@ void interleave_block<8, 1, VLType::None, false>( "str q16, [%x[out_ptr], #0x10]\n" "prfm pldl1keep, [x22, #0x70]\n" "prfm pldl1keep, [x21, #0x70]\n" - "zip2 v16.4s, v26.4s, v25.4s\n" + "zip2 v16.4s, v25.4s, v24.4s\n" "str q16, [%x[out_ptr], #0x20]\n" "zip2 v16.4s, v20.4s, v17.4s\n" "str q16, [%x[out_ptr], #0x30]\n" @@ -129,63 +129,62 @@ void interleave_block<8, 1, VLType::None, false>( "ldr d28, [x28], #0x8\n" "ldr d27, [x27], #0x8\n" "mov x20, #0x2\n" - "ldr d22, [x26], #0x8\n" - "ldr d21, [x25], #0x8\n" + "ldr d26, [x26], #0x8\n" + "ldr d25, [x25], #0x8\n" "ldr d24, [x24], #0x8\n" "ldr d23, [x23], #0x8\n" - "ldr d19, [x22], #0x8\n" - "ldr d18, [x21], #0x8\n" + "ldr d22, [x22], #0x8\n" + "ldr d21, [x21], #0x8\n" "tbz %x[width], #0, 5f\n" "ld1 { v28.s }[2], [x28]\n" "ld1 { v27.s }[2], [x27]\n" "mov x20, #0x3\n" - "ld1 { v22.s }[2], [x26]\n" - "ld1 { v21.s }[2], [x25]\n" + "ld1 { v26.s }[2], [x26]\n" + "ld1 { v25.s }[2], [x25]\n" "ld1 { v24.s }[2], [x24]\n" "ld1 { v23.s }[2], [x23]\n" - "ld1 { v19.s }[2], [x22]\n" - "ld1 { v18.s }[2], [x21]\n" + "ld1 { v22.s }[2], [x22]\n" + "ld1 { v21.s }[2], [x21]\n" "b 5f\n" "4:" // odd_loads_1_0 "ldr s28, [x28, #0x0]\n" "ldr s27, [x27, #0x0]\n" "mov x20, #0x1\n" - "ldr s22, [x26, #0x0]\n" - "ldr s21, [x25, #0x0]\n" + "ldr s26, [x26, #0x0]\n" + "ldr s25, [x25, #0x0]\n" "ldr s24, [x24, #0x0]\n" "ldr s23, [x23, #0x0]\n" - "ldr s19, [x22, #0x0]\n" - "ldr s18, [x21, #0x0]\n" + "ldr s22, [x22, #0x0]\n" + "ldr s21, [x21, #0x0]\n" "5:" // Odd load end - "zip1 v26.4s, v28.4s, v22.4s\n" - "zip1 v25.4s, v27.4s, v21.4s\n" + "zip1 v20.4s, v28.4s, v26.4s\n" + "zip1 v19.4s, v27.4s, v25.4s\n" "subs x20, x20, #0x1\n" - "zip1 v20.4s, v24.4s, v19.4s\n" - "zip1 v17.4s, v23.4s, v18.4s\n" - "zip1 v16.4s, v26.4s, v25.4s\n" + "zip1 v18.4s, v24.4s, v22.4s\n" + "zip1 v17.4s, v23.4s, v21.4s\n" + "zip1 v16.4s, v20.4s, v19.4s\n" "str q16, [%x[out_ptr], #0x0]\n" - "zip1 v16.4s, v20.4s, v17.4s\n" + "zip1 v16.4s, v18.4s, v17.4s\n" "str q16, [%x[out_ptr], #0x10]\n" "add %x[out_ptr], %x[out_ptr], #0x20\n" "beq 6f\n" "subs x20, x20, #0x1\n" - "zip2 v16.4s, v26.4s, v25.4s\n" + "zip2 v16.4s, v20.4s, v19.4s\n" "str q16, [%x[out_ptr], #0x0]\n" - "zip2 v16.4s, v20.4s, v17.4s\n" + "zip2 v16.4s, v18.4s, v17.4s\n" "str q16, [%x[out_ptr], #0x10]\n" "add %x[out_ptr], %x[out_ptr], #0x20\n" "beq 6f\n" - "zip2 v22.4s, v28.4s, v22.4s\n" - "zip2 v21.4s, v27.4s, v21.4s\n" - "zip2 v19.4s, v24.4s, v19.4s\n" - "zip2 v18.4s, v23.4s, v18.4s\n" - "zip1 v16.4s, v22.4s, v21.4s\n" + "zip2 v19.4s, v28.4s, v26.4s\n" + "zip2 v16.4s, v27.4s, v25.4s\n" + "zip2 v18.4s, v24.4s, v22.4s\n" + "zip2 v17.4s, v23.4s, v21.4s\n" + "zip1 v16.4s, v19.4s, v16.4s\n" "str q16, [%x[out_ptr], #0x0]\n" - "zip1 v16.4s, v19.4s, v18.4s\n" + "zip1 v16.4s, v18.4s, v17.4s\n" "str q16, [%x[out_ptr], #0x10]\n" "add %x[out_ptr], %x[out_ptr], #0x20\n" "6:" // Odds skip - : [out_ptr] "+&r" (out_ptr), [width] "+&r" (width) : [height] "r" (height), [in] "r" (in), [row_offset] "r" (row_offset) : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" |