diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp16_fp16.hpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp16_fp16.hpp | 80 |
1 files changed, 40 insertions, 40 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp16_fp16.hpp b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp16_fp16.hpp index e54b3b9f41..1cd6523c76 100644 --- a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp16_fp16.hpp +++ b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_fp16_fp16.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, 2023 Arm Limited. + * Copyright (c) 2019-2021, 2023-2024 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -34,29 +34,29 @@ void interleave_block<8, 1, VLType::None, false>( "ldr x28, [%x[in], #0x0]\n" "ldr x27, [%x[in], #0x8]\n" "cmp %x[height], #0x8\n" - "add x28, x28, %x[row_offset], LSL #1\n" "ldr x26, [%x[in], #0x10]\n" "ldr x25, [%x[in], #0x18]\n" - "add x27, x27, %x[row_offset], LSL #1\n" - "add x26, x26, %x[row_offset], LSL #1\n" "ldr x24, [%x[in], #0x20]\n" "ldr x23, [%x[in], #0x28]\n" - "add x25, x25, %x[row_offset], LSL #1\n" - "add x24, x24, %x[row_offset], LSL #1\n" "ldr x22, [%x[in], #0x30]\n" "ldr x21, [%x[in], #0x38]\n" + "add x28, x28, %x[row_offset], LSL #1\n" + "add x27, x27, %x[row_offset], LSL #1\n" + "add x26, x26, %x[row_offset], LSL #1\n" + "add x25, x25, %x[row_offset], LSL #1\n" + "add x24, x24, %x[row_offset], LSL #1\n" "add x23, x23, %x[row_offset], LSL #1\n" "add x22, x22, %x[row_offset], LSL #1\n" "add x21, x21, %x[row_offset], LSL #1\n" "beq 1f\n" "cmp %x[height], #0x2\n" + "mov x21, x28\n" "csel x27, x27, x28, GE\n" "csel x26, x26, x28, GT\n" "cmp %x[height], #0x4\n" "csel x25, x25, x28, GE\n" "csel x24, x24, x28, GT\n" "cmp %x[height], #0x6\n" - "mov x21, x28\n" "csel x23, x23, x28, GE\n" "csel x22, x22, x28, GT\n" "1:" // no_pointer_adj @@ -79,52 +79,52 @@ void interleave_block<8, 1, VLType::None, false>( "prfm pldl1keep, [x21, #0x40]\n" "blt 3f\n" "2:" // Main loop head - "ldr q25, [x28], #0x10\n" - "ldr q27, [x27], #0x10\n" + "ldr q23, [x28], #0x10\n" + "ldr q25, [x27], #0x10\n" "subs %x[width], %x[width], #0x8\n" + "ldr q22, [x26], #0x10\n" + "ldr q21, [x25], #0x10\n" "cmp %x[width], #0x8\n" - "ldr q26, [x26], #0x10\n" - "ldr q24, [x25], #0x10\n" - "ldr q21, [x24], #0x10\n" - "ldr q20, [x23], #0x10\n" - "zip1 v23.8h, v25.8h, v21.8h\n" - "zip1 v22.8h, v27.8h, v20.8h\n" + "ldr q19, [x24], #0x10\n" + "ldr q18, [x23], #0x10\n" "ldr q17, [x22], #0x10\n" "ldr q16, [x21], #0x10\n" - "zip1 v19.8h, v26.8h, v17.8h\n" - "zip1 v18.8h, v24.8h, v16.8h\n" - "zip2 v25.8h, v25.8h, v21.8h\n" - "zip2 v21.8h, v26.8h, v17.8h\n" "prfm pldl1keep, [x28, #0x70]\n" "prfm pldl1keep, [x27, #0x70]\n" - "zip2 v20.8h, v27.8h, v20.8h\n" - "zip2 v16.8h, v24.8h, v16.8h\n" + "zip1 v20.8h, v23.8h, v19.8h\n" + "zip1 v24.8h, v25.8h, v18.8h\n" + "zip2 v23.8h, v23.8h, v19.8h\n" + "zip2 v25.8h, v25.8h, v18.8h\n" "prfm pldl1keep, [x26, #0x70]\n" "prfm pldl1keep, [x25, #0x70]\n" - "zip1 v24.8h, v23.8h, v19.8h\n" - "zip1 v17.8h, v22.8h, v18.8h\n" + "zip1 v19.8h, v22.8h, v17.8h\n" + "zip1 v18.8h, v21.8h, v16.8h\n" "prfm pldl1keep, [x24, #0x70]\n" "prfm pldl1keep, [x23, #0x70]\n" - "zip2 v23.8h, v23.8h, v19.8h\n" - "zip2 v19.8h, v22.8h, v18.8h\n" + "zip2 v22.8h, v22.8h, v17.8h\n" + "zip2 v17.8h, v21.8h, v16.8h\n" "prfm pldl1keep, [x22, #0x70]\n" "prfm pldl1keep, [x21, #0x70]\n" - "zip1 v22.8h, v25.8h, v21.8h\n" - "zip1 v18.8h, v20.8h, v16.8h\n" - "zip2 v21.8h, v25.8h, v21.8h\n" - "zip2 v20.8h, v20.8h, v16.8h\n" - "zip1 v16.8h, v24.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x0]\n" - "zip2 v16.8h, v24.8h, v17.8h\n" + "zip1 v21.8h, v20.8h, v19.8h\n" + "zip1 v16.8h, v24.8h, v18.8h\n" + "zip2 v20.8h, v20.8h, v19.8h\n" + "zip2 v19.8h, v24.8h, v18.8h\n" + "zip1 v24.8h, v23.8h, v22.8h\n" + "zip1 v18.8h, v25.8h, v17.8h\n" + "zip2 v23.8h, v23.8h, v22.8h\n" + "zip2 v22.8h, v25.8h, v17.8h\n" + "zip1 v17.8h, v21.8h, v16.8h\n" + "zip2 v16.8h, v21.8h, v16.8h\n" + "zip1 v21.8h, v20.8h, v19.8h\n" + "zip2 v20.8h, v20.8h, v19.8h\n" + "zip1 v19.8h, v24.8h, v18.8h\n" + "zip2 v18.8h, v24.8h, v18.8h\n" + "str q17, [%x[out_ptr], #0x0]\n" "str q16, [%x[out_ptr], #0x10]\n" - "zip1 v17.8h, v23.8h, v19.8h\n" - "zip2 v16.8h, v23.8h, v19.8h\n" - "str q17, [%x[out_ptr], #0x20]\n" - "zip1 v19.8h, v22.8h, v18.8h\n" - "zip2 v18.8h, v22.8h, v18.8h\n" - "str q16, [%x[out_ptr], #0x30]\n" - "zip1 v17.8h, v21.8h, v20.8h\n" - "zip2 v16.8h, v21.8h, v20.8h\n" + "zip1 v17.8h, v23.8h, v22.8h\n" + "zip2 v16.8h, v23.8h, v22.8h\n" + "str q21, [%x[out_ptr], #0x20]\n" + "str q20, [%x[out_ptr], #0x30]\n" "str q19, [%x[out_ptr], #0x40]\n" "str q18, [%x[out_ptr], #0x50]\n" "str q17, [%x[out_ptr], #0x60]\n" |