diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp | 153 |
1 files changed, 115 insertions, 38 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp index b6671e8c85..c7adf8e4ac 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020, 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,70 +23,146 @@ */ // This can only be built if the target/compiler supports FP16 arguments. -#ifdef __ARM_FP16_ARGS +#if defined(__aarch64__) && (defined(FP16_KERNELS) || defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)) #include "arm_gemm.hpp" #include "gemm_common.hpp" #include "gemm_hybrid.hpp" +#include "gemm_hybrid_indirect.hpp" #include "gemm_implementation.hpp" #include "gemm_interleaved.hpp" -#include "gemm_native.hpp" +#include "gemv_pretransposed.hpp" #include "kernels/a32_sgemm_8x6.hpp" -#include "kernels/a64_hgemm_24x8.hpp" -#include "kernels/a64_sgemm_12x8.hpp" -#include "kernels/sve_hybrid_fp16_mla_4VLx4.hpp" -#include "kernels/sve_interleaved_fp16_mla_3VLx8.hpp" -#include "kernels/sve_native_fp16_mla_4VLx4.hpp" +#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#include "kernels/a64_ffhybrid_fp16_mla_6x32.hpp" +#include "kernels/a64_ffinterleaved_fp16_mla_8x24.hpp" +#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#include "kernels/a64_hgemm_8x24.hpp" +#include "kernels/a64_hybrid_fp16_mla_6x32.hpp" +#include "kernels/a64_sgemm_8x12.hpp" +#ifdef ARM_COMPUTE_ENABLE_SME2 +#include "kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp" +#include "kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL.hpp" +#include "kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_2VLx2VL.hpp" +#include "kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_4VLx1VL.hpp" +#endif // ARM_COMPUTE_ENABLE_SME2 +#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#include "kernels/sve_ffhybrid_fp16_mla_6x4VL.hpp" +#include "kernels/sve_ffinterleaved_fp16_mla_8x3VL.hpp" +#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#include "kernels/sve_hybrid_fp16_mla_6x4VL.hpp" +#include "kernels/sve_interleaved_fp16_mla_8x3VL.hpp" namespace arm_gemm { static const GemmImplementation<__fp16, __fp16> gemm_fp16_methods[] = { -#if defined(__ARM_FEATURE_SVE) +#ifdef ARM_COMPUTE_ENABLE_SVE +#ifdef ARM_COMPUTE_ENABLE_SME2 { GemmMethod::GEMM_HYBRID, - "hybrid_fp16_mla_4VLx4", - [](const GemmArgs &args) { return (args._Ksize >= 8) && !args._trA && args._pretransposed_hint; }, - [](const GemmArgs &args) { return ((args._Ksize <= 256) && (args._Nsize <= 256)) || ((args._nmulti > 1) && ((args._Msize / args._maxthreads) < 8)); }, - [](const GemmArgs &args) { return new GemmHybrid<hybrid_fp16_mla_4VLx4, __fp16, __fp16>(args); } + "sme2_gemv_fp16fp32fp16_dot_16VL", + [](const GemmArgs &args) { return args._ci->has_sme2() && args._Msize==1 && args._nbatches==1 && !args._indirect_input; }, + nullptr, + [](const GemmArgs &args) { return new GemvPretransposed<cls_sme2_gemv_fp16fp32fp16_dot_16VL, __fp16, __fp16>(args); } }, { - GemmMethod::GEMM_NATIVE, - "native_fp16_mla_4VLx4", - [](const GemmArgs &args) { return (args._Ksize >= 8 && !args._trA && !args._trB); }, - [](const GemmArgs &args) { return ((args._Ksize <= 128) && (args._Nsize <= 128)) || ((args._nmulti > 1) && ((args._Msize / args._maxthreads) < 8)); }, - [](const GemmArgs &args) { return new GemmNative<native_fp16_mla_4VLx4, __fp16, __fp16>(args); } + GemmMethod::GEMM_INTERLEAVED, + "sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL", + [](const GemmArgs &args) { return args._ci->has_sme2(); }, + [](const GemmArgs &args) { const auto VL = sme::get_vector_length<float>(); + return args._Nsize >= 8*VL || args._Msize <= VL || (2*VL < args._Msize && args._Msize <= 3*VL); }, + [](const GemmArgs &args) { return new GemmInterleaved<cls_sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL, __fp16, __fp16, Nothing, false, false, false, true>(args); } }, { GemmMethod::GEMM_INTERLEAVED, - "interleaved_fp16_mla_3VLx8", - [](const GemmArgs &args) { return (args._Ksize > 4); }, - nullptr, - [](const GemmArgs &args) { return new GemmInterleaved<interleaved_fp16_mla_3VLx8, __fp16, __fp16>(args); } + "sme2_interleaved_nomerge_fp16fp32fp16_mopa_4VLx1VL", + [](const GemmArgs &args) { return args._ci->has_sme2(); }, + [](const GemmArgs &args) { const auto VL = sme::get_vector_length<float>(); + return args._Nsize <= VL || (2*VL < args._Nsize && args._Nsize <= 3*VL); }, + [](const GemmArgs &args) { return new GemmInterleaved<cls_sme2_interleaved_nomerge_fp16fp32fp16_mopa_4VLx1VL, __fp16, __fp16, Nothing, false, false, false, true>(args); } }, -#endif - -#if defined(__aarch64__) && (defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) || defined(FP16_KERNELS)) { GemmMethod::GEMM_INTERLEAVED, - "hgemm_24x8", -#ifndef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC - [](const GemmArgs &args) { return args._ci->has_fp16(); }, -#else + "sme2_interleaved_nomerge_fp16fp32fp16_mopa_2VLx2VL", + [](const GemmArgs &args) { return args._ci->has_sme2(); }, nullptr, -#endif - nullptr, - [](const GemmArgs &args) { return new GemmInterleaved<hgemm_24x8, __fp16, __fp16>(args); } + [](const GemmArgs &args) { return new GemmInterleaved<cls_sme2_interleaved_nomerge_fp16fp32fp16_mopa_2VLx2VL, __fp16, __fp16, Nothing, false, false, false, true>(args); } }, -#endif // aarch64 && FP16 -#ifdef __aarch64__ +#endif // ARM_COMPUTE_ENABLE_SME2 +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_HYBRID, + "sve_hybrid_fp16_mla_6x4VL", + [](const GemmArgs &args) { return args._ci->has_sve(); }, + [](const GemmArgs &args) { return GemmHybridIndirect<cls_sve_hybrid_fp16_mla_6x4VL, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmHybridIndirect<cls_sve_hybrid_fp16_mla_6x4VL, __fp16, __fp16>(args); } +), +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_INTERLEAVED, + "sve_interleaved_fp16_mla_8x3VL", + [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize > 4); }, + [](const GemmArgs &args) { return GemmInterleaved<cls_sve_interleaved_fp16_mla_8x3VL, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmInterleaved<cls_sve_interleaved_fp16_mla_8x3VL, __fp16, __fp16>(args); } +), +#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_INTERLEAVED, + "sve_ffinterleaved_fp16_mla_8x3VL", + KernelWeightFormat::VL1VL_BL16, + [](const GemmArgs &args) { return args._ci->has_sve(); }, + [](const GemmArgs &args) { return GemmInterleavedFixedFormat<cls_sve_ffinterleaved_fp16_mla_8x3VL, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmInterleavedFixedFormat<cls_sve_ffinterleaved_fp16_mla_8x3VL, __fp16, __fp16>(args); } +), +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_HYBRID, + "sve_ffhybrid_fp16_mla_6x4VL", + KernelWeightFormat::VL1VL_BL16, + [](const GemmArgs &args) { return args._ci->has_sve(); }, + [](const GemmArgs &args) { return GemmHybridIndirectFixedFormat<cls_sve_ffhybrid_fp16_mla_6x4VL, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmHybridIndirectFixedFormat<cls_sve_ffhybrid_fp16_mla_6x4VL, __fp16, __fp16>(args); } +), +#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +#endif // ARM_COMPUTE_ENABLE_SVE +#if defined(__aarch64__) +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_HYBRID, + "a64_hybrid_fp16_mla_6x32", + [](const GemmArgs &args) { return args._ci->has_fp16(); }, + [](const GemmArgs &args) { return GemmHybridIndirect<cls_a64_hybrid_fp16_mla_6x32, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmHybridIndirect<cls_a64_hybrid_fp16_mla_6x32, __fp16, __fp16>(args); } +), +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_INTERLEAVED, + "a64_hgemm_8x24", + [](const GemmArgs &args) { return args._ci->has_fp16(); }, + [](const GemmArgs &args) { return GemmInterleaved<cls_a64_hgemm_8x24, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmInterleaved<cls_a64_hgemm_8x24, __fp16, __fp16>(args); } +), +#ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_INTERLEAVED, + "a64_ffinterleaved_fp16_mla_8x24", + KernelWeightFormat::VL128_BL16, + [](const GemmArgs &args) { return args._ci->has_fp16(); }, + [](const GemmArgs &args) { return GemmInterleavedFixedFormat<cls_a64_ffinterleaved_fp16_mla_8x24, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmInterleavedFixedFormat<cls_a64_ffinterleaved_fp16_mla_8x24, __fp16, __fp16>(args); } +), +GemmImplementation<__fp16, __fp16>::with_estimate( + GemmMethod::GEMM_HYBRID, + "a64_ffhybrid_fp16_mla_6x32", + KernelWeightFormat::VL128_BL16, + [](const GemmArgs &args) { return args._ci->has_fp16(); }, + [](const GemmArgs &args) { return GemmHybridIndirectFixedFormat<cls_a64_ffhybrid_fp16_mla_6x32, __fp16, __fp16>::estimate_cycles<__fp16>(args); }, + [](const GemmArgs &args) { return new GemmHybridIndirectFixedFormat<cls_a64_ffhybrid_fp16_mla_6x32, __fp16, __fp16>(args); } +), +#endif // ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS { GemmMethod::GEMM_INTERLEAVED, - "sgemm_12x8", - nullptr, + "a64_sgemm_8x12", nullptr, - [](const GemmArgs &args) { return new GemmInterleaved<sgemm_12x8, __fp16, __fp16>(args); } + [](const GemmArgs &args) { return !args._ci->has_fp16(); }, + [](const GemmArgs &args) { return new GemmInterleaved<cls_a64_sgemm_8x12, __fp16, __fp16>(args); } }, #elif defined(__arm__) { @@ -115,9 +191,10 @@ const GemmImplementation<__fp16, __fp16> *gemm_implementation_list<__fp16, __fp1 /* Explicitly instantiate the external functions for these types. */ template UniqueGemmCommon<__fp16, __fp16> gemm<__fp16, __fp16, Nothing>(const GemmArgs &args, const Nothing &); +template bool has_opt_gemm<__fp16, __fp16, Nothing>(WeightFormat &weight_format, const GemmArgs &args, const Nothing &); template KernelDescription get_gemm_method<__fp16, __fp16, Nothing>(const GemmArgs &args, const Nothing &); template std::vector<KernelDescription> get_compatible_kernels<__fp16, __fp16, Nothing>(const GemmArgs &args, const Nothing &); } // namespace arm_gemm -#endif // __ARM_FP16_ARGS +#endif // defined(__aarch64__) && (defined(FP16_KERNELS) || defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)) |