aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp')
-rw-r--r--src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp
index d8134c4bb5..8244523696 100644
--- a/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp
+++ b/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp
@@ -44,26 +44,26 @@ namespace arm_gemm {
static const GemmImplementation<bfloat16, float> gemm_bf16_methods[] =
{
-#ifdef V8P6_BF
-#ifdef __ARM_FEATURE_SVE
+#ifdef ARM_COMPUTE_ENABLE_BF16
+#ifdef ARM_COMPUTE_ENABLE_SVE
{ // gemm_bf16_interleaved
GemmMethod::GEMM_INTERLEAVED,
"sve_interleaved_bf16fp32_mmla_8x3VL",
- [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>4); },
+ [](const GemmArgs &args) { return args._ci->has_svebf16() && (args._Ksize>4); },
[](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; },
[](const GemmArgs &args) { return new GemmInterleaved<cls_sve_interleaved_bf16fp32_mmla_8x3VL, bfloat16, float>(args); }
},
{
GemmMethod::GEMM_HYBRID,
"sve_hybrid_bf16fp32_dot_6x4VL",
- [](const GemmArgs &args) { return args._ci->has_sve(); },
+ [](const GemmArgs &args) { return args._ci->has_svebf16(); },
[](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN && ((args._Ksize <= 128) && (args._Nsize <= 128)); },
[](const GemmArgs &args) { return new GemmHybridIndirect<cls_sve_hybrid_bf16fp32_dot_6x4VL, bfloat16, float>(args); }
},
{ // gemm_bf16_interleaved
GemmMethod::GEMM_INTERLEAVED,
"sve_interleaved_bf16fp32_dot_8x3VL",
- [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>2); },
+ [](const GemmArgs &args) { return args._ci->has_svebf16() && (args._Ksize>2); },
[](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; },
[](const GemmArgs &args) { return new GemmInterleaved<cls_sve_interleaved_bf16fp32_dot_8x3VL, bfloat16, float>(args); }
},
@@ -71,25 +71,25 @@ static const GemmImplementation<bfloat16, float> gemm_bf16_methods[] =
{ // gemm_bf16_interleaved
GemmMethod::GEMM_INTERLEAVED,
"a64_interleaved_bf16fp32_mmla_8x12",
- [](const GemmArgs &args) { return (args._Ksize>4); },
+ [](const GemmArgs &args) { return args._ci->has_bf16() && (args._Ksize>4); },
nullptr,
[](const GemmArgs &args) { return new GemmInterleaved<cls_a64_interleaved_bf16fp32_mmla_8x12, bfloat16, float>(args); }
},
{
GemmMethod::GEMM_HYBRID,
"a64_hybrid_bf16fp32_dot_6x16",
- nullptr,
+ [](const GemmArgs &args) { return args._ci->has_bf16(); },
nullptr,
[](const GemmArgs &args) { return new GemmHybridIndirect<cls_a64_hybrid_bf16fp32_dot_6x16, bfloat16, float>(args); }
},
{ // gemm_bf16_interleaved
GemmMethod::GEMM_INTERLEAVED,
"a64_interleaved_bf16fp32_dot_8x12",
- [](const GemmArgs &args) { return (args._Ksize>2); },
+ [](const GemmArgs &args) { return args._ci->has_bf16() && (args._Ksize>2); },
nullptr,
[](const GemmArgs &args) { return new GemmInterleaved<cls_a64_interleaved_bf16fp32_dot_8x12, bfloat16, float>(args); }
},
-#endif // V8P6_BF
+#endif // ARM_COMPUTE_ENABLE_BF16
#ifdef __aarch64__
{
GemmMethod::GEMM_INTERLEAVED,