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Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp')
-rw-r--r--src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp153
1 files changed, 77 insertions, 76 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
index 03ab9c0a9e..86e7f84542 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
@@ -22,9 +22,10 @@
* SOFTWARE.
*/
-#if defined(ARM_COMPUTE_ENABLE_SME)
-
#include <cstdint>
+#include <cstddef>
+
+#if defined(ARM_COMPUTE_ENABLE_SME)
namespace arm_conv {
namespace pooling {
@@ -57,68 +58,68 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl(
"lsr x25, %x[n_valid_cells], #0x2\n"
"mov z5.b, #0x0\n"
"mov z4.b, #0x0\n"
- "mov x20, %x[inptrs]\n"
+ "mov x24, %x[inptrs]\n"
"mov z3.b, #0x0\n"
"mov z2.b, #0x0\n"
"cbz x25, 4f\n"
- "ldp x24, x23, [x20, #0x0]\n"
+ "ldp x23, x22, [x24, #0x0]\n"
"subs x25, x25, #0x1\n"
- "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
- "ldp x22, x21, [x20, #0x10]\n"
- "add x20, x20, #0x20\n"
- "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
- "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
- "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
- "ld1w { z29.s }, p2/Z, [x24, x28, LSL #2]\n"
- "ld1w { z22.s }, p2/Z, [x23, x28, LSL #2]\n"
- "ld1w { z28.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n"
- "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
- "ld1w { z21.s }, p1/Z, [x23, x27, LSL #2]\n"
- "ld1w { z26.s }, p1/Z, [x22, x27, LSL #2]\n"
- "ld1w { z17.s }, p1/Z, [x21, x27, LSL #2]\n"
- "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
- "ld1w { z20.s }, p0/Z, [x23, x26, LSL #2]\n"
- "ld1w { z24.s }, p0/Z, [x22, x26, LSL #2]\n"
- "ld1w { z16.s }, p0/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
+ "ldp x21, x20, [x24, #0x10]\n"
+ "add x24, x24, #0x20\n"
+ "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n"
+ "ld1w { z29.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "ld1w { z22.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z28.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ld1w { z27.s }, p1/Z, [x23, x27, LSL #2]\n"
+ "ld1w { z21.s }, p1/Z, [x22, x27, LSL #2]\n"
+ "ld1w { z26.s }, p1/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z17.s }, p1/Z, [x20, x27, LSL #2]\n"
+ "ld1w { z25.s }, p0/Z, [x23, x26, LSL #2]\n"
+ "ld1w { z20.s }, p0/Z, [x22, x26, LSL #2]\n"
+ "ld1w { z24.s }, p0/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20, x26, LSL #2]\n"
"beq 3f\n"
"2:" // 4-vectors of channels: 4 inputs loop
"fadd z23.s, z1.s, z0.s\n"
"fadd z19.s, z31.s, z30.s\n"
- "ldp x24, x23, [x20, #0x0]\n"
+ "ldp x23, x22, [x24, #0x0]\n"
"subs x25, x25, #0x1\n"
"fadd z22.s, z29.s, z22.s\n"
"fadd z18.s, z28.s, z18.s\n"
- "ldp x22, x21, [x20, #0x10]\n"
- "add x20, x20, #0x20\n"
+ "ldp x21, x20, [x24, #0x10]\n"
+ "add x24, x24, #0x20\n"
"fadd z21.s, z27.s, z21.s\n"
"fadd z17.s, z26.s, z17.s\n"
- "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+ "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
"fadd z20.s, z25.s, z20.s\n"
"fadd z16.s, z24.s, z16.s\n"
- "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
+ "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
"fadd z19.s, z23.s, z19.s\n"
"fadd z18.s, z22.s, z18.s\n"
- "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
"fadd z17.s, z21.s, z17.s\n"
"fadd z16.s, z20.s, z16.s\n"
- "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n"
"fadd z5.s, z5.s, z19.s\n"
"fadd z4.s, z4.s, z18.s\n"
- "ld1w { z29.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ld1w { z29.s }, p2/Z, [x23, x28, LSL #2]\n"
"fadd z3.s, z3.s, z17.s\n"
"fadd z2.s, z2.s, z16.s\n"
- "ld1w { z22.s }, p2/Z, [x23, x28, LSL #2]\n"
- "ld1w { z28.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n"
- "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
- "ld1w { z21.s }, p1/Z, [x23, x27, LSL #2]\n"
- "ld1w { z26.s }, p1/Z, [x22, x27, LSL #2]\n"
- "ld1w { z17.s }, p1/Z, [x21, x27, LSL #2]\n"
- "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
- "ld1w { z20.s }, p0/Z, [x23, x26, LSL #2]\n"
- "ld1w { z24.s }, p0/Z, [x22, x26, LSL #2]\n"
- "ld1w { z16.s }, p0/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z22.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z28.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ld1w { z27.s }, p1/Z, [x23, x27, LSL #2]\n"
+ "ld1w { z21.s }, p1/Z, [x22, x27, LSL #2]\n"
+ "ld1w { z26.s }, p1/Z, [x21, x27, LSL #2]\n"
+ "ld1w { z17.s }, p1/Z, [x20, x27, LSL #2]\n"
+ "ld1w { z25.s }, p0/Z, [x23, x26, LSL #2]\n"
+ "ld1w { z20.s }, p0/Z, [x22, x26, LSL #2]\n"
+ "ld1w { z24.s }, p0/Z, [x21, x26, LSL #2]\n"
+ "ld1w { z16.s }, p0/Z, [x20, x26, LSL #2]\n"
"bgt 2b\n"
"3:" // 4-vectors of channels: 4 inputs tail
"fadd z23.s, z1.s, z0.s\n"
@@ -141,16 +142,16 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl(
"ands x21, %x[n_valid_cells], #0x3\n"
"beq 6f\n"
"5:" // 4-vectors of channels: Single input loop
- "ldr x24, [x20], #0x8\n"
- "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+ "ldr x20, [x24], #0x8\n"
+ "ld1w { z16.s }, p3/Z, [x20, x9, LSL #2]\n"
"subs x21, x21, #0x1\n"
- "fadd z5.s, z5.s, z1.s\n"
- "ld1w { z29.s }, p2/Z, [x24, x28, LSL #2]\n"
- "fadd z4.s, z4.s, z29.s\n"
- "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
- "fadd z3.s, z3.s, z27.s\n"
- "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
- "fadd z2.s, z2.s, z25.s\n"
+ "fadd z5.s, z5.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "fadd z4.s, z4.s, z16.s\n"
+ "ld1w { z16.s }, p1/Z, [x20, x27, LSL #2]\n"
+ "fadd z3.s, z3.s, z16.s\n"
+ "ld1w { z16.s }, p0/Z, [x20, x26, LSL #2]\n"
+ "fadd z2.s, z2.s, z16.s\n"
"bgt 5b\n"
"6:" // 4-vectors of channels: Single input loop: End
"fmul z5.s, z5.s, z6.s\n"
@@ -173,44 +174,44 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl(
"8:" // Single vector of channels: Loop
"lsr x25, %x[n_valid_cells], #0x2\n"
"mov z5.b, #0x0\n"
- "mov x20, %x[inptrs]\n"
+ "mov x24, %x[inptrs]\n"
"cbz x25, 11f\n"
- "ldp x24, x23, [x20, #0x0]\n"
+ "ldp x20, x22, [x24, #0x0]\n"
"subs x25, x25, #0x1\n"
- "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
- "ldp x22, x21, [x20, #0x10]\n"
- "add x20, x20, #0x20\n"
- "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
- "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
- "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
+ "ld1w { z1.s }, p3/Z, [x20, x9, LSL #2]\n"
+ "ldp x21, x20, [x24, #0x10]\n"
+ "add x24, x24, #0x20\n"
+ "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n"
"beq 10f\n"
"9:" // Single vector of channels: Loop: 4 inputs loop
- "fadd z23.s, z1.s, z0.s\n"
- "fadd z19.s, z31.s, z30.s\n"
- "ldp x24, x23, [x20, #0x0]\n"
+ "fadd z17.s, z1.s, z0.s\n"
+ "fadd z16.s, z31.s, z30.s\n"
+ "ldp x23, x22, [x24, #0x0]\n"
"subs x25, x25, #0x1\n"
- "fadd z19.s, z23.s, z19.s\n"
- "ldp x22, x21, [x20, #0x10]\n"
- "fadd z5.s, z5.s, z19.s\n"
- "add x20, x20, #0x20\n"
- "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
- "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
- "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
- "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
+ "fadd z16.s, z17.s, z16.s\n"
+ "ldp x21, x20, [x24, #0x10]\n"
+ "fadd z5.s, z5.s, z16.s\n"
+ "add x24, x24, #0x20\n"
+ "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
+ "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+ "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
+ "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n"
"bgt 9b\n"
"10:" // Single vector of channels: Loop: 4 inputs tail
- "fadd z23.s, z1.s, z0.s\n"
- "fadd z19.s, z31.s, z30.s\n"
- "fadd z19.s, z23.s, z19.s\n"
- "fadd z5.s, z5.s, z19.s\n"
+ "fadd z17.s, z1.s, z0.s\n"
+ "fadd z16.s, z31.s, z30.s\n"
+ "fadd z16.s, z17.s, z16.s\n"
+ "fadd z5.s, z5.s, z16.s\n"
"11:" // Single vector of channels: Loop: After loop
"ands x21, %x[n_valid_cells], #0x3\n"
"beq 13f\n"
"12:" // Single vector of channels: Loop: Single input loop
- "ldr x24, [x20], #0x8\n"
- "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+ "ldr x20, [x24], #0x8\n"
+ "ld1w { z16.s }, p3/Z, [x20, x9, LSL #2]\n"
"subs x21, x21, #0x1\n"
- "fadd z5.s, z5.s, z1.s\n"
+ "fadd z5.s, z5.s, z16.s\n"
"bgt 12b\n"
"13:" // Single vector of channels: Loop: Single input loop: End
"fmul z5.s, z5.s, z6.s\n"
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-10 15:10:17 +0000