diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp | 98 |
1 files changed, 49 insertions, 49 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp index 86e7f84542..908c66b4d5 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2023 Arm Limited. + * Copyright (c) 2022-2024 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -49,25 +49,25 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl( "cntw x26, ALL, MUL #3\n" "ptrue p0.b\n" "whilelt p3.s, x9, %x[n_channels]\n" - "ld1rw { z6.s }, p0/Z, [%x[rescale_ptr]]\n" "whilelt p2.s, x28, %x[n_channels]\n" + "ld1rw { z5.s }, p0/Z, [%x[rescale_ptr]]\n" "whilelt p1.s, x27, %x[n_channels]\n" "whilelt p0.s, x26, %x[n_channels]\n" "b.none 7f\n" "1:" // 4-vectors of channels "lsr x25, %x[n_valid_cells], #0x2\n" - "mov z5.b, #0x0\n" "mov z4.b, #0x0\n" - "mov x24, %x[inptrs]\n" "mov z3.b, #0x0\n" + "mov x24, %x[inptrs]\n" "mov z2.b, #0x0\n" + "mov z1.b, #0x0\n" "cbz x25, 4f\n" "ldp x23, x22, [x24, #0x0]\n" "subs x25, x25, #0x1\n" - "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n" "ldp x21, x20, [x24, #0x10]\n" "add x24, x24, #0x20\n" - "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n" + "ld1w { z23.s }, p3/Z, [x22, x9, LSL #2]\n" "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n" "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n" "ld1w { z29.s }, p2/Z, [x23, x28, LSL #2]\n" @@ -84,7 +84,7 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl( "ld1w { z16.s }, p0/Z, [x20, x26, LSL #2]\n" "beq 3f\n" "2:" // 4-vectors of channels: 4 inputs loop - "fadd z23.s, z1.s, z0.s\n" + "fadd z23.s, z0.s, z23.s\n" "fadd z19.s, z31.s, z30.s\n" "ldp x23, x22, [x24, #0x0]\n" "subs x25, x25, #0x1\n" @@ -94,24 +94,24 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl( "add x24, x24, #0x20\n" "fadd z21.s, z27.s, z21.s\n" "fadd z17.s, z26.s, z17.s\n" - "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n" "fadd z20.s, z25.s, z20.s\n" "fadd z16.s, z24.s, z16.s\n" - "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n" "fadd z19.s, z23.s, z19.s\n" + "ld1w { z23.s }, p3/Z, [x22, x9, LSL #2]\n" "fadd z18.s, z22.s, z18.s\n" "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n" "fadd z17.s, z21.s, z17.s\n" - "fadd z16.s, z20.s, z16.s\n" "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n" - "fadd z5.s, z5.s, z19.s\n" - "fadd z4.s, z4.s, z18.s\n" + "fadd z16.s, z20.s, z16.s\n" "ld1w { z29.s }, p2/Z, [x23, x28, LSL #2]\n" - "fadd z3.s, z3.s, z17.s\n" - "fadd z2.s, z2.s, z16.s\n" + "fadd z4.s, z4.s, z19.s\n" "ld1w { z22.s }, p2/Z, [x22, x28, LSL #2]\n" + "fadd z3.s, z3.s, z18.s\n" "ld1w { z28.s }, p2/Z, [x21, x28, LSL #2]\n" + "fadd z2.s, z2.s, z17.s\n" "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n" + "fadd z1.s, z1.s, z16.s\n" "ld1w { z27.s }, p1/Z, [x23, x27, LSL #2]\n" "ld1w { z21.s }, p1/Z, [x22, x27, LSL #2]\n" "ld1w { z26.s }, p1/Z, [x21, x27, LSL #2]\n" @@ -122,7 +122,7 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl( "ld1w { z16.s }, p0/Z, [x20, x26, LSL #2]\n" "bgt 2b\n" "3:" // 4-vectors of channels: 4 inputs tail - "fadd z23.s, z1.s, z0.s\n" + "fadd z23.s, z0.s, z23.s\n" "fadd z19.s, z31.s, z30.s\n" "fadd z22.s, z29.s, z22.s\n" "fadd z18.s, z28.s, z18.s\n" @@ -134,37 +134,37 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl( "fadd z18.s, z22.s, z18.s\n" "fadd z17.s, z21.s, z17.s\n" "fadd z16.s, z20.s, z16.s\n" - "fadd z5.s, z5.s, z19.s\n" - "fadd z4.s, z4.s, z18.s\n" - "fadd z3.s, z3.s, z17.s\n" - "fadd z2.s, z2.s, z16.s\n" + "fadd z4.s, z4.s, z19.s\n" + "fadd z3.s, z3.s, z18.s\n" + "fadd z2.s, z2.s, z17.s\n" + "fadd z1.s, z1.s, z16.s\n" "4:" // 4-vectors of channels: After loop "ands x21, %x[n_valid_cells], #0x3\n" "beq 6f\n" "5:" // 4-vectors of channels: Single input loop "ldr x20, [x24], #0x8\n" - "ld1w { z16.s }, p3/Z, [x20, x9, LSL #2]\n" "subs x21, x21, #0x1\n" - "fadd z5.s, z5.s, z16.s\n" - "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n" - "fadd z4.s, z4.s, z16.s\n" - "ld1w { z16.s }, p1/Z, [x20, x27, LSL #2]\n" - "fadd z3.s, z3.s, z16.s\n" + "ld1w { z19.s }, p3/Z, [x20, x9, LSL #2]\n" + "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n" + "ld1w { z17.s }, p1/Z, [x20, x27, LSL #2]\n" "ld1w { z16.s }, p0/Z, [x20, x26, LSL #2]\n" - "fadd z2.s, z2.s, z16.s\n" + "fadd z4.s, z4.s, z19.s\n" + "fadd z3.s, z3.s, z18.s\n" + "fadd z2.s, z2.s, z17.s\n" + "fadd z1.s, z1.s, z16.s\n" "bgt 5b\n" "6:" // 4-vectors of channels: Single input loop: End - "fmul z5.s, z5.s, z6.s\n" - "fmul z4.s, z4.s, z6.s\n" - "st1w { z5.s }, p3, [%x[outptr], x9, LSL #2]\n" + "fmul z4.s, z4.s, z5.s\n" + "fmul z3.s, z3.s, z5.s\n" + "fmul z2.s, z2.s, z5.s\n" + "fmul z1.s, z1.s, z5.s\n" + "st1w { z4.s }, p3, [%x[outptr], x9, LSL #2]\n" "incw x9, ALL, MUL #4\n" - "fmul z3.s, z3.s, z6.s\n" - "fmul z2.s, z2.s, z6.s\n" - "st1w { z4.s }, p2, [%x[outptr], x28, LSL #2]\n" + "st1w { z3.s }, p2, [%x[outptr], x28, LSL #2]\n" "incw x28, ALL, MUL #4\n" - "st1w { z3.s }, p1, [%x[outptr], x27, LSL #2]\n" + "st1w { z2.s }, p1, [%x[outptr], x27, LSL #2]\n" "incw x27, ALL, MUL #4\n" - "st1w { z2.s }, p0, [%x[outptr], x26, LSL #2]\n" + "st1w { z1.s }, p0, [%x[outptr], x26, LSL #2]\n" "incw x26, ALL, MUL #4\n" "whilelt p0.s, x26, %x[n_channels]\n" "b.any 1b\n" @@ -173,49 +173,49 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl( "b.none 14f\n" "8:" // Single vector of channels: Loop "lsr x25, %x[n_valid_cells], #0x2\n" - "mov z5.b, #0x0\n" + "mov z4.b, #0x0\n" "mov x24, %x[inptrs]\n" "cbz x25, 11f\n" - "ldp x20, x22, [x24, #0x0]\n" + "ldp x23, x22, [x24, #0x0]\n" "subs x25, x25, #0x1\n" - "ld1w { z1.s }, p3/Z, [x20, x9, LSL #2]\n" "ldp x21, x20, [x24, #0x10]\n" "add x24, x24, #0x20\n" - "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n" + "ld1w { z23.s }, p3/Z, [x22, x9, LSL #2]\n" "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n" "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n" "beq 10f\n" "9:" // Single vector of channels: Loop: 4 inputs loop - "fadd z17.s, z1.s, z0.s\n" + "fadd z17.s, z0.s, z23.s\n" "fadd z16.s, z31.s, z30.s\n" "ldp x23, x22, [x24, #0x0]\n" "subs x25, x25, #0x1\n" - "fadd z16.s, z17.s, z16.s\n" "ldp x21, x20, [x24, #0x10]\n" - "fadd z5.s, z5.s, z16.s\n" "add x24, x24, #0x20\n" - "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n" - "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n" + "fadd z16.s, z17.s, z16.s\n" + "ld1w { z23.s }, p3/Z, [x22, x9, LSL #2]\n" "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n" "ld1w { z30.s }, p3/Z, [x20, x9, LSL #2]\n" + "fadd z4.s, z4.s, z16.s\n" "bgt 9b\n" "10:" // Single vector of channels: Loop: 4 inputs tail - "fadd z17.s, z1.s, z0.s\n" + "fadd z17.s, z0.s, z23.s\n" "fadd z16.s, z31.s, z30.s\n" "fadd z16.s, z17.s, z16.s\n" - "fadd z5.s, z5.s, z16.s\n" + "fadd z4.s, z4.s, z16.s\n" "11:" // Single vector of channels: Loop: After loop "ands x21, %x[n_valid_cells], #0x3\n" "beq 13f\n" "12:" // Single vector of channels: Loop: Single input loop "ldr x20, [x24], #0x8\n" - "ld1w { z16.s }, p3/Z, [x20, x9, LSL #2]\n" "subs x21, x21, #0x1\n" - "fadd z5.s, z5.s, z16.s\n" + "ld1w { z16.s }, p3/Z, [x20, x9, LSL #2]\n" + "fadd z4.s, z4.s, z16.s\n" "bgt 12b\n" "13:" // Single vector of channels: Loop: Single input loop: End - "fmul z5.s, z5.s, z6.s\n" - "st1w { z5.s }, p3, [%x[outptr], x9, LSL #2]\n" + "fmul z4.s, z4.s, z5.s\n" + "st1w { z4.s }, p3, [%x[outptr], x9, LSL #2]\n" "incw x9\n" "whilelt p3.s, x9, %x[n_channels]\n" "b.any 8b\n" |