diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp | 264 |
1 files changed, 132 insertions, 132 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp index 71a8c7496a..fc0efc76ce 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,6 +23,7 @@ */ #if defined(__aarch64__) + #include <algorithm> #include <cstddef> #include <cstdint> @@ -82,12 +83,12 @@ void a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( __asm__ __volatile__( "ldr x4, [%x[args], %[offsetof_n_channels]]\n" - "mov x5, #0x0\n" "ldr x20, [%x[args], %[offsetof_outptrs]]\n" - "mov x6, #0x0\n" - "ldr x19, [%x[args], %[offsetof_inptrs]]\n" "cmp x4, #0x4\n" - "ldp x7, x8, [x20, #0x0]\n" + "mov x5, #0x0\n" + "ldr x19, [%x[args], %[offsetof_inptrs]]\n" + "ldp x6, x7, [x20, #0x0]\n" + "mov x8, #0x0\n" "ldp x17, x16, [x20, #0x10]\n" "ldp x15, x14, [x19, #0x0]\n" "ldp x13, x12, [x19, #0x10]\n" @@ -97,157 +98,156 @@ void a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "ldp x25, x24, [x19, #0x50]\n" "ldp x23, x22, [x19, #0x60]\n" "ldp x21, x20, [x19, #0x70]\n" - "ldr q8, [%x[args], %[offsetof_rescale]]\n" + "ldr q7, [%x[args], %[offsetof_rescale]]\n" "blt 3f\n" - "ldr q7, [x10, x5]\n" "lsr x19, x4, #0x2\n" - "ldr q6, [x9, x5]\n" "sub x4, x4, x19, LSL #2\n" - "ldr q5, [x26, x5]\n" + "ldr q6, [x10, x5]\n" + "ldr q5, [x9, x5]\n" "subs x19, x19, #0x1\n" - "ldr q4, [x25, x5]\n" - "ldr q3, [x14, x5]\n" - "ldr q2, [x13, x5]\n" - "ldr q1, [x11, x5]\n" - "ldr q0, [x27, x5]\n" - "ldr q31, [x28, x5]\n" - "ldr q30, [x24, x5]\n" - "ldr q29, [x22, x5]\n" - "ldr q28, [x21, x5]\n" - "ldr q27, [x15, x5]\n" - "ldr q26, [x12, x5]\n" - "ldr q25, [x23, x5]\n" - "ldr q24, [x20, x5]\n" + "ldr q4, [x26, x5]\n" + "ldr q3, [x25, x5]\n" + "ldr q2, [x14, x5]\n" + "ldr q1, [x13, x5]\n" + "ldr q0, [x11, x5]\n" + "ldr q31, [x27, x5]\n" + "ldr q30, [x28, x5]\n" + "ldr q29, [x24, x5]\n" + "ldr q28, [x22, x5]\n" + "ldr q27, [x21, x5]\n" + "ldr q26, [x15, x5]\n" + "ldr q25, [x12, x5]\n" + "ldr q24, [x23, x5]\n" + "ldr q23, [x20, x5]\n" "add x5, x5, #0x10\n" "beq 2f\n" "1:" // Vector: Loop - "fadd v17.4s, v7.4s, v6.4s\n" - "ldr q7, [x10, x5]\n" + "fadd v17.4s, v6.4s, v5.4s\n" + "fadd v16.4s, v4.4s, v3.4s\n" "subs x19, x19, #0x1\n" - "fadd v16.4s, v5.4s, v4.4s\n" - "ldr q6, [x9, x5]\n" - "fadd v18.4s, v3.4s, v2.4s\n" - "ldr q5, [x26, x5]\n" - "fadd v23.4s, v1.4s, v0.4s\n" - "ldr q4, [x25, x5]\n" - "fadd v22.4s, v31.4s, v30.4s\n" - "ldr q3, [x14, x5]\n" - "fadd v17.4s, v17.4s, v16.4s\n" - "ldr q2, [x13, x5]\n" - "fadd v16.4s, v29.4s, v28.4s\n" - "ldr q1, [x11, x5]\n" - "fadd v19.4s, v27.4s, v23.4s\n" - "ldr q0, [x27, x5]\n" - "fadd v21.4s, v18.4s, v17.4s\n" - "ldr q31, [x28, x5]\n" - "fadd v20.4s, v16.4s, v17.4s\n" - "ldr q30, [x24, x5]\n" - "fadd v18.4s, v26.4s, v22.4s\n" - "ldr q29, [x22, x5]\n" - "fadd v17.4s, v25.4s, v23.4s\n" - "ldr q28, [x21, x5]\n" - "fadd v16.4s, v24.4s, v22.4s\n" - "ldr q27, [x15, x5]\n" - "fadd v19.4s, v21.4s, v19.4s\n" - "ldr q26, [x12, x5]\n" - "fadd v18.4s, v21.4s, v18.4s\n" - "ldr q25, [x23, x5]\n" + "ldr q6, [x10, x5]\n" + "fadd v19.4s, v17.4s, v16.4s\n" + "fadd v18.4s, v2.4s, v1.4s\n" + "ldr q5, [x9, x5]\n" + "ldr q4, [x26, x5]\n" + "fadd v17.4s, v0.4s, v31.4s\n" + "fadd v22.4s, v30.4s, v29.4s\n" + "ldr q3, [x25, x5]\n" + "ldr q2, [x14, x5]\n" + "fadd v16.4s, v28.4s, v27.4s\n" + "fadd v21.4s, v18.4s, v19.4s\n" + "ldr q1, [x13, x5]\n" + "ldr q0, [x11, x5]\n" + "fadd v20.4s, v16.4s, v19.4s\n" + "fadd v19.4s, v26.4s, v17.4s\n" + "ldr q31, [x27, x5]\n" + "ldr q30, [x28, x5]\n" + "fadd v18.4s, v25.4s, v22.4s\n" + "fadd v17.4s, v24.4s, v17.4s\n" + "ldr q29, [x24, x5]\n" + "ldr q28, [x22, x5]\n" + "fadd v16.4s, v23.4s, v22.4s\n" + "fadd v19.4s, v19.4s, v21.4s\n" + "ldr q27, [x21, x5]\n" + "ldr q26, [x15, x5]\n" + "fadd v18.4s, v18.4s, v21.4s\n" "fadd v17.4s, v17.4s, v20.4s\n" - "ldr q24, [x20, x5]\n" + "ldr q25, [x12, x5]\n" + "ldr q24, [x23, x5]\n" + "fadd v16.4s, v16.4s, v20.4s\n" + "fmul v19.4s, v19.4s, v7.s[0]\n" + "ldr q23, [x20, x5]\n" "add x5, x5, #0x10\n" - "fadd v16.4s, v20.4s, v16.4s\n" - "fmul v19.4s, v19.4s, v8.s[0]\n" - "str q19, [x7, x6]\n" - "fmul v18.4s, v18.4s, v8.s[1]\n" - "fmul v17.4s, v17.4s, v8.s[2]\n" - "str q18, [x8, x6]\n" - "fmul v16.4s, v16.4s, v8.s[3]\n" - "str q17, [x17, x6]\n" - "str q16, [x16, x6]\n" - "add x6, x6, #0x10\n" + "fmul v18.4s, v18.4s, v7.s[1]\n" + "fmul v17.4s, v17.4s, v7.s[2]\n" + "str q19, [x6, x8]\n" + "fmul v16.4s, v16.4s, v7.s[3]\n" + "str q18, [x7, x8]\n" + "str q17, [x17, x8]\n" + "str q16, [x16, x8]\n" + "add x8, x8, #0x10\n" "bgt 1b\n" "2:" // Vector: Tail - "fadd v17.4s, v7.4s, v6.4s\n" - "fadd v16.4s, v5.4s, v4.4s\n" - "fadd v18.4s, v3.4s, v2.4s\n" - "fadd v23.4s, v1.4s, v0.4s\n" - "fadd v17.4s, v17.4s, v16.4s\n" - "fadd v22.4s, v31.4s, v30.4s\n" - "fadd v16.4s, v29.4s, v28.4s\n" - "fadd v21.4s, v18.4s, v17.4s\n" - "fadd v19.4s, v27.4s, v23.4s\n" - "fadd v20.4s, v16.4s, v17.4s\n" - "fadd v18.4s, v26.4s, v22.4s\n" - "fadd v17.4s, v25.4s, v23.4s\n" - "fadd v16.4s, v24.4s, v22.4s\n" - "fadd v19.4s, v21.4s, v19.4s\n" - "fadd v18.4s, v21.4s, v18.4s\n" + "fadd v17.4s, v6.4s, v5.4s\n" + "fadd v16.4s, v4.4s, v3.4s\n" + "fadd v19.4s, v17.4s, v16.4s\n" + "fadd v18.4s, v2.4s, v1.4s\n" + "fadd v17.4s, v0.4s, v31.4s\n" + "fadd v22.4s, v30.4s, v29.4s\n" + "fadd v16.4s, v28.4s, v27.4s\n" + "fadd v21.4s, v18.4s, v19.4s\n" + "fadd v20.4s, v16.4s, v19.4s\n" + "fadd v19.4s, v26.4s, v17.4s\n" + "fadd v18.4s, v25.4s, v22.4s\n" + "fadd v17.4s, v24.4s, v17.4s\n" + "fadd v16.4s, v23.4s, v22.4s\n" + "fadd v19.4s, v19.4s, v21.4s\n" + "fadd v18.4s, v18.4s, v21.4s\n" "fadd v17.4s, v17.4s, v20.4s\n" - "fadd v16.4s, v20.4s, v16.4s\n" - "fmul v19.4s, v19.4s, v8.s[0]\n" - "str q19, [x7, x6]\n" - "fmul v18.4s, v18.4s, v8.s[1]\n" - "fmul v17.4s, v17.4s, v8.s[2]\n" - "str q18, [x8, x6]\n" - "fmul v16.4s, v16.4s, v8.s[3]\n" - "str q17, [x17, x6]\n" - "str q16, [x16, x6]\n" - "add x6, x6, #0x10\n" + "fadd v16.4s, v16.4s, v20.4s\n" + "fmul v19.4s, v19.4s, v7.s[0]\n" + "str q19, [x6, x8]\n" + "fmul v18.4s, v18.4s, v7.s[1]\n" + "fmul v17.4s, v17.4s, v7.s[2]\n" + "str q18, [x7, x8]\n" + "fmul v16.4s, v16.4s, v7.s[3]\n" + "str q17, [x17, x8]\n" + "str q16, [x16, x8]\n" + "add x8, x8, #0x10\n" "cbz x4, 4f\n" "3:" // Oddments - "ldr s7, [x10, x5]\n" + "ldr s6, [x10, x5]\n" + "ldr s5, [x9, x5]\n" + "fadd v17.4s, v6.4s, v5.4s\n" "subs x4, x4, #0x1\n" - "ldr s6, [x9, x5]\n" - "fadd v17.4s, v7.4s, v6.4s\n" - "ldr s5, [x26, x5]\n" - "ldr s4, [x25, x5]\n" - "fadd v16.4s, v5.4s, v4.4s\n" - "ldr s3, [x14, x5]\n" - "ldr s2, [x13, x5]\n" - "fadd v17.4s, v17.4s, v16.4s\n" - "ldr s1, [x11, x5]\n" - "ldr s0, [x27, x5]\n" - "fadd v18.4s, v3.4s, v2.4s\n" - "ldr s31, [x28, x5]\n" - "fadd v23.4s, v1.4s, v0.4s\n" - "ldr s30, [x24, x5]\n" - "fadd v21.4s, v18.4s, v17.4s\n" - "ldr s29, [x22, x5]\n" - "ldr s28, [x21, x5]\n" - "fadd v22.4s, v31.4s, v30.4s\n" - "ldr s27, [x15, x5]\n" - "ldr s26, [x12, x5]\n" - "fadd v16.4s, v29.4s, v28.4s\n" - "ldr s25, [x23, x5]\n" - "fadd v20.4s, v16.4s, v17.4s\n" - "ldr s24, [x20, x5]\n" + "ldr s4, [x26, x5]\n" + "ldr s3, [x25, x5]\n" + "fadd v16.4s, v4.4s, v3.4s\n" + "fadd v19.4s, v17.4s, v16.4s\n" + "ldr s2, [x14, x5]\n" + "ldr s1, [x13, x5]\n" + "fadd v18.4s, v2.4s, v1.4s\n" + "fadd v21.4s, v18.4s, v19.4s\n" + "ldr s0, [x11, x5]\n" + "ldr s31, [x27, x5]\n" + "fadd v17.4s, v0.4s, v31.4s\n" + "ldr s30, [x28, x5]\n" + "ldr s29, [x24, x5]\n" + "fadd v22.4s, v30.4s, v29.4s\n" + "ldr s28, [x22, x5]\n" + "ldr s27, [x21, x5]\n" + "fadd v16.4s, v28.4s, v27.4s\n" + "fadd v20.4s, v16.4s, v19.4s\n" + "ldr s26, [x15, x5]\n" + "ldr s25, [x12, x5]\n" + "fadd v19.4s, v26.4s, v17.4s\n" + "fadd v18.4s, v25.4s, v22.4s\n" + "ldr s24, [x23, x5]\n" + "ldr s23, [x20, x5]\n" + "fadd v17.4s, v24.4s, v17.4s\n" + "fadd v16.4s, v23.4s, v22.4s\n" + "fadd v19.4s, v19.4s, v21.4s\n" + "fadd v18.4s, v18.4s, v21.4s\n" "add x5, x5, #0x4\n" - "fadd v19.4s, v27.4s, v23.4s\n" - "fadd v18.4s, v26.4s, v22.4s\n" - "fadd v17.4s, v25.4s, v23.4s\n" - "fadd v16.4s, v24.4s, v22.4s\n" - "fadd v19.4s, v21.4s, v19.4s\n" - "fadd v18.4s, v21.4s, v18.4s\n" "fadd v17.4s, v17.4s, v20.4s\n" - "fadd v16.4s, v20.4s, v16.4s\n" - "fmul v19.4s, v19.4s, v8.s[0]\n" - "str s19, [x7, x6]\n" - "fmul v18.4s, v18.4s, v8.s[1]\n" - "fmul v17.4s, v17.4s, v8.s[2]\n" - "str s18, [x8, x6]\n" - "fmul v16.4s, v16.4s, v8.s[3]\n" - "str s17, [x17, x6]\n" - "str s16, [x16, x6]\n" - "add x6, x6, #0x4\n" + "fadd v16.4s, v16.4s, v20.4s\n" + "fmul v19.4s, v19.4s, v7.s[0]\n" + "fmul v18.4s, v18.4s, v7.s[1]\n" + "str s19, [x6, x8]\n" + "fmul v17.4s, v17.4s, v7.s[2]\n" + "fmul v16.4s, v16.4s, v7.s[3]\n" + "str s18, [x7, x8]\n" + "str s17, [x17, x8]\n" + "str s16, [x16, x8]\n" + "add x8, x8, #0x4\n" "bgt 3b\n" "4:" // End - : : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals)) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28" ); } } // namespace pooling } // namespace arm_conv -#endif // defined(__aarch64__) +#endif // defined(__aarch64__) |