diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp | 838 |
1 files changed, 419 insertions, 419 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp index cb70bd2b6f..bf65e04d32 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include <cstddef> #include <cstdint> -#if __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -104,448 +104,448 @@ void sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( "mov x13, #0x0\n" "ldp x12, x11, [x20, #0x10]\n" "whilelt p3.s, XZR, %x[n_channels]\n" - "ldp x10, x9, [x16, #0x0]\n" - "cntw x28\n" + "ldp x21, x20, [x16, #0x0]\n" + "cntw x10\n" "ptrue p2.b\n" - "ldr x27, [%x[params_struct], %[offsetof_args_params]]\n" - "ld1w { z5.s }, p3/Z, [x10, x13, LSL #2]\n" - "cmp x28, %x[n_channels]\n" - "ld1w { z6.s }, p3/Z, [x9, x13, LSL #2]\n" - "ldp x26, x25, [x16, #0x10]\n" - "sub x24, XZR, x28\n" - "ldp x23, x22, [x16, #0x20]\n" - "ldp x21, x20, [x16, #0x30]\n" - "ldp x10, x9, [x16, #0x40]\n" - "ld1rw { z18.s }, p2/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "ld1rw { z17.s }, p2/Z, [%x[params_struct], %[offsetof_args_max]]\n" - "ld1w { z16.s }, p2/Z, [x27]\n" - "ld1w { z0.s }, p2/Z, [x27, #1, MUL VL]\n" - "ld1w { z1.s }, p2/Z, [x27, #2, MUL VL]\n" - "ld1w { z2.s }, p2/Z, [x27, #3, MUL VL]\n" - "ld1w { z3.s }, p2/Z, [x27, #4, MUL VL]\n" - "ld1w { z4.s }, p2/Z, [x27, #5, MUL VL]\n" - "ld1w { z7.s }, p3/Z, [x26, x13, LSL #2]\n" - "addvl x27, x27, #6\n" - "ld1w { z8.s }, p3/Z, [x25, x13, LSL #2]\n" - "ld1w { z9.s }, p3/Z, [x23, x13, LSL #2]\n" - "ld1w { z13.s }, p3/Z, [x22, x13, LSL #2]\n" - "ld1w { z11.s }, p3/Z, [x21, x13, LSL #2]\n" - "ld1w { z12.s }, p3/Z, [x20, x13, LSL #2]\n" - "ld1w { z10.s }, p3/Z, [x10, x13, LSL #2]\n" - "ld1w { z14.s }, p3/Z, [x9, x13, LSL #2]\n" + "ldr x9, [%x[params_struct], %[offsetof_args_params]]\n" + "ld1w { z5.s }, p3/Z, [x21, x13, LSL #2]\n" + "cmp x10, %x[n_channels]\n" + "ld1w { z6.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldp x27, x26, [x16, #0x10]\n" + "sub x28, XZR, x10\n" + "ldp x25, x24, [x16, #0x20]\n" + "ldp x23, x22, [x16, #0x30]\n" + "ldp x21, x20, [x16, #0x40]\n" + "ld1rw { z15.s }, p2/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "ld1rw { z28.s }, p2/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "ld1w { z29.s }, p2/Z, [x9]\n" + "ld1w { z0.s }, p2/Z, [x9, #1, MUL VL]\n" + "ld1w { z1.s }, p2/Z, [x9, #2, MUL VL]\n" + "ld1w { z2.s }, p2/Z, [x9, #3, MUL VL]\n" + "ld1w { z3.s }, p2/Z, [x9, #4, MUL VL]\n" + "ld1w { z4.s }, p2/Z, [x9, #5, MUL VL]\n" + "ld1w { z7.s }, p3/Z, [x27, x13, LSL #2]\n" + "addvl x9, x9, #6\n" + "ld1w { z8.s }, p3/Z, [x26, x13, LSL #2]\n" + "ld1w { z9.s }, p3/Z, [x25, x13, LSL #2]\n" + "ld1w { z13.s }, p3/Z, [x24, x13, LSL #2]\n" + "ld1w { z11.s }, p3/Z, [x23, x13, LSL #2]\n" + "ld1w { z12.s }, p3/Z, [x22, x13, LSL #2]\n" + "ld1w { z10.s }, p3/Z, [x21, x13, LSL #2]\n" + "ld1w { z14.s }, p3/Z, [x20, x13, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "movprfx z28, z16\n fmla z28.s, p2/M, z0.s, z5.s\n" - "movprfx z29, z16\n fmla z29.s, p2/M, z0.s, z6.s\n" - "ldr x26, [x16, #0x50]\n" - "ld1w { z5.s }, p3/Z, [x26, x13, LSL #2]\n" - "movprfx z30, z16\n fmla z30.s, p2/M, z0.s, z7.s\n" - "movprfx z31, z16\n fmla z31.s, p2/M, z0.s, z8.s\n" - "ldr x25, [x16, #0x58]\n" - "ldr x23, [x16, #0x60]\n" - "fmla z28.s, p2/M, z1.s, z6.s\n" - "fmla z29.s, p2/M, z1.s, z9.s\n" - "ld1w { z6.s }, p3/Z, [x25, x13, LSL #2]\n" - "ldr x22, [x16, #0x68]\n" - "fmla z30.s, p2/M, z1.s, z8.s\n" - "fmla z31.s, p2/M, z1.s, z13.s\n" - "ld1w { z0.s }, p2/Z, [x27]\n" - "ldr x21, [x16, #0x70]\n" - "fmla z28.s, p2/M, z2.s, z9.s\n" - "fmla z29.s, p2/M, z2.s, z11.s\n" - "ld1w { z9.s }, p3/Z, [x23, x13, LSL #2]\n" - "ld1w { z1.s }, p2/Z, [x27, #1, MUL VL]\n" - "fmla z30.s, p2/M, z2.s, z13.s\n" - "fmla z31.s, p2/M, z2.s, z5.s\n" - "ldr x20, [x16, #0x78]\n" - "ld1w { z2.s }, p2/Z, [x27, #2, MUL VL]\n" - "fmla z28.s, p2/M, z3.s, z11.s\n" - "fmla z29.s, p2/M, z3.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x22, x13, LSL #2]\n" - "ldr x10, [x16, #0x80]\n" - "fmla z30.s, p2/M, z3.s, z5.s\n" - "fmla z31.s, p2/M, z3.s, z6.s\n" - "ld1w { z3.s }, p2/Z, [x27, #3, MUL VL]\n" - "ldr x9, [x16, #0x88]\n" - "fmla z28.s, p2/M, z4.s, z12.s\n" - "fmla z29.s, p2/M, z4.s, z9.s\n" - "ld1w { z12.s }, p3/Z, [x21, x13, LSL #2]\n" - "ld1w { z9.s }, p3/Z, [x20, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z6.s\n" - "fmla z31.s, p2/M, z4.s, z10.s\n" - "ld1w { z4.s }, p2/Z, [x27, #4, MUL VL]\n" - "ldr x26, [x16, #0x90]\n" - "fmla z28.s, p2/M, z0.s, z7.s\n" - "fmla z29.s, p2/M, z0.s, z8.s\n" - "ldr x25, [x16, #0x98]\n" - "ldr x23, [x16, #0xa0]\n" - "fmla z30.s, p2/M, z0.s, z14.s\n" - "fmla z31.s, p2/M, z0.s, z11.s\n" - "ld1w { z0.s }, p2/Z, [x27, #5, MUL VL]\n" - "ldr x22, [x16, #0xa8]\n" - "fmla z28.s, p2/M, z1.s, z8.s\n" - "fmla z29.s, p2/M, z1.s, z13.s\n" - "ld1w { z8.s }, p3/Z, [x9, x13, LSL #2]\n" - "ldr x21, [x16, #0xb0]\n" - "fmla z30.s, p2/M, z1.s, z11.s\n" - "fmla z31.s, p2/M, z1.s, z12.s\n" - "ld1w { z1.s }, p2/Z, [x27, #6, MUL VL]\n" - "ldr x20, [x16, #0xb8]\n" - "fmla z28.s, p2/M, z2.s, z13.s\n" - "fmla z29.s, p2/M, z2.s, z5.s\n" - "ld1w { z13.s }, p3/Z, [x10, x13, LSL #2]\n" - "ldr x10, [x16, #0xc0]\n" - "fmla z30.s, p2/M, z2.s, z12.s\n" - "fmla z31.s, p2/M, z2.s, z9.s\n" - "ld1w { z2.s }, p2/Z, [x27, #7, MUL VL]\n" - "addvl x27, x27, #16\n" - "fmla z28.s, p2/M, z3.s, z5.s\n" - "fmla z29.s, p2/M, z3.s, z6.s\n" - "ld1w { z5.s }, p3/Z, [x26, x13, LSL #2]\n" - "ldr x9, [x16, #0xc8]\n" - "fmla z30.s, p2/M, z3.s, z9.s\n" - "fmla z31.s, p2/M, z3.s, z13.s\n" - "ld1w { z3.s }, p2/Z, [x27, #-8, MUL VL]\n" - "ldr x26, [x16, #0xd0]\n" - "fmla z28.s, p2/M, z4.s, z6.s\n" - "fmla z29.s, p2/M, z4.s, z10.s\n" - "ld1w { z6.s }, p3/Z, [x25, x13, LSL #2]\n" - "ld1w { z10.s }, p3/Z, [x23, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z13.s\n" - "fmla z31.s, p2/M, z4.s, z8.s\n" - "ld1w { z4.s }, p2/Z, [x27, #-7, MUL VL]\n" - "ldr x25, [x16, #0xd8]\n" - "fmla z28.s, p2/M, z0.s, z14.s\n" - "fmla z29.s, p2/M, z0.s, z11.s\n" - "ld1w { z14.s }, p3/Z, [x20, x13, LSL #2]\n" - "ldr x23, [x16, #0xe0]\n" - "fmla z30.s, p2/M, z0.s, z5.s\n" - "fmla z31.s, p2/M, z0.s, z6.s\n" - "ld1w { z0.s }, p2/Z, [x27, #-6, MUL VL]\n" - "ldr x20, [x16, #0xf8]\n" - "fmla z28.s, p2/M, z1.s, z11.s\n" - "fmla z29.s, p2/M, z1.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x22, x13, LSL #2]\n" - "ldr x22, [x16, #0xe8]\n" + "movprfx z30, z29\n fmla z30.s, p2/M, z0.s, z5.s\n" + "movprfx z27, z29\n fmla z27.s, p2/M, z0.s, z6.s\n" + "ldr x20, [x16, #0x50]\n" + "ld1w { z5.s }, p3/Z, [x20, x13, LSL #2]\n" + "movprfx z31, z29\n fmla z31.s, p2/M, z0.s, z7.s\n" + "movprfx z26, z29\n fmla z26.s, p2/M, z0.s, z8.s\n" + "ldr x20, [x16, #0x58]\n" + "ldr x21, [x16, #0x60]\n" "fmla z30.s, p2/M, z1.s, z6.s\n" - "fmla z31.s, p2/M, z1.s, z10.s\n" - "ld1w { z1.s }, p2/Z, [x27, #-5, MUL VL]\n" - "whilelt p1.s, x28, %x[n_channels]\n" - "fmla z28.s, p2/M, z2.s, z12.s\n" - "fmla z29.s, p2/M, z2.s, z9.s\n" - "ld1w { z12.s }, p3/Z, [x21, x13, LSL #2]\n" - "ldr x21, [x16, #0xf0]\n" - "fmla z30.s, p2/M, z2.s, z10.s\n" - "fmla z31.s, p2/M, z2.s, z11.s\n" - "ld1w { z2.s }, p2/Z, [x27, #-4, MUL VL]\n" - "incw x24\n" - "fmla z28.s, p2/M, z3.s, z9.s\n" - "fmla z29.s, p2/M, z3.s, z13.s\n" - "ld1w { z9.s }, p3/Z, [x10, x13, LSL #2]\n" - "ldr x10, [x16, #0x100]\n" - "fmla z30.s, p2/M, z3.s, z11.s\n" - "fmla z31.s, p2/M, z3.s, z12.s\n" - "ld1w { z3.s }, p2/Z, [x27, #-3, MUL VL]\n" - "mov p0.b, p3.b\n" - "fmla z28.s, p2/M, z4.s, z13.s\n" - "fmla z29.s, p2/M, z4.s, z8.s\n" - "ld1w { z13.s }, p3/Z, [x9, x13, LSL #2]\n" - "ld1w { z8.s }, p3/Z, [x23, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z12.s\n" - "fmla z31.s, p2/M, z4.s, z14.s\n" - "ld1w { z4.s }, p2/Z, [x27, #-2, MUL VL]\n" - "ldr x9, [x16, #0x108]\n" - "fmla z28.s, p2/M, z0.s, z5.s\n" - "fmla z29.s, p2/M, z0.s, z6.s\n" - "ld1w { z5.s }, p3/Z, [x26, x13, LSL #2]\n" - "ldr x26, [x16, #0x110]\n" - "fmla z30.s, p2/M, z0.s, z9.s\n" - "fmla z31.s, p2/M, z0.s, z13.s\n" - "ld1w { z0.s }, p2/Z, [x27, #-1, MUL VL]\n" - "ld1w { z16.s }, p2/Z, [x27, #4, MUL VL]\n" - "fmla z28.s, p2/M, z1.s, z6.s\n" - "fmla z29.s, p2/M, z1.s, z10.s\n" - "ld1w { z6.s }, p3/Z, [x25, x13, LSL #2]\n" - "ldr x25, [x16, #0x118]\n" - "fmla z30.s, p2/M, z1.s, z13.s\n" - "fmla z31.s, p2/M, z1.s, z5.s\n" - "ld1w { z1.s }, p2/Z, [x27]\n" - "fmla z28.s, p2/M, z2.s, z10.s\n" - "fmla z29.s, p2/M, z2.s, z11.s\n" - "ld1w { z10.s }, p3/Z, [x22, x13, LSL #2]\n" - "fmla z30.s, p2/M, z2.s, z5.s\n" - "fmla z31.s, p2/M, z2.s, z6.s\n" - "ld1w { z2.s }, p2/Z, [x27, #1, MUL VL]\n" - "fmla z28.s, p2/M, z3.s, z11.s\n" - "fmla z29.s, p2/M, z3.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x21, x13, LSL #2]\n" - "fmla z30.s, p2/M, z3.s, z6.s\n" - "fmla z31.s, p2/M, z3.s, z8.s\n" - "ld1w { z3.s }, p2/Z, [x27, #2, MUL VL]\n" - "fmla z28.s, p2/M, z4.s, z12.s\n" - "fmla z29.s, p2/M, z4.s, z14.s\n" - "ld1w { z12.s }, p3/Z, [x20, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z8.s\n" - "fmla z31.s, p2/M, z4.s, z10.s\n" - "ld1w { z4.s }, p2/Z, [x27, #3, MUL VL]\n" - "fmla z28.s, p2/M, z0.s, z9.s\n" - "fmla z29.s, p2/M, z0.s, z13.s\n" - "ld1w { z9.s }, p3/Z, [x10, x13, LSL #2]\n" - "fmla z30.s, p2/M, z0.s, z11.s\n" - "fmla z31.s, p2/M, z0.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x9, x13, LSL #2]\n" - "ldp x10, x9, [x16, #0x0]\n" - "fmla z28.s, p2/M, z1.s, z13.s\n" - "fmla z29.s, p2/M, z1.s, z5.s\n" - "ld1w { z0.s }, p2/Z, [x27, #5, MUL VL]\n" - "fmla z30.s, p2/M, z1.s, z12.s\n" - "fmla z31.s, p2/M, z1.s, z9.s\n" - "ld1w { z12.s }, p3/Z, [x26, x13, LSL #2]\n" - "ld1w { z1.s }, p2/Z, [x27, #6, MUL VL]\n" - "fmla z28.s, p2/M, z2.s, z5.s\n" - "fmla z29.s, p2/M, z2.s, z6.s\n" - "ld1w { z5.s }, p1/Z, [x10, x28, LSL #2]\n" + "fmla z27.s, p2/M, z1.s, z9.s\n" + "ld1w { z22.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x20, [x16, #0x68]\n" + "fmla z31.s, p2/M, z1.s, z8.s\n" + "fmla z26.s, p2/M, z1.s, z13.s\n" + "ld1w { z21.s }, p2/Z, [x9]\n" + "ldr x23, [x16, #0x70]\n" "fmla z30.s, p2/M, z2.s, z9.s\n" - "fmla z31.s, p2/M, z2.s, z11.s\n" - "ld1w { z9.s }, p3/Z, [x25, x13, LSL #2]\n" - "ldp x26, x25, [x16, #0x10]\n" - "fmla z28.s, p2/M, z3.s, z6.s\n" - "fmla z29.s, p2/M, z3.s, z8.s\n" - "ld1w { z6.s }, p1/Z, [x9, x28, LSL #2]\n" - "ldp x23, x22, [x16, #0x20]\n" + "fmla z27.s, p2/M, z2.s, z11.s\n" + "ld1w { z20.s }, p3/Z, [x21, x13, LSL #2]\n" + "ld1w { z18.s }, p2/Z, [x9, #1, MUL VL]\n" + "fmla z31.s, p2/M, z2.s, z13.s\n" + "fmla z26.s, p2/M, z2.s, z5.s\n" + "ldr x22, [x16, #0x78]\n" + "ld1w { z17.s }, p2/Z, [x9, #2, MUL VL]\n" "fmla z30.s, p2/M, z3.s, z11.s\n" - "fmla z31.s, p2/M, z3.s, z12.s\n" - "ldp x21, x20, [x16, #0x30]\n" - "ldp x10, x9, [x16, #0x40]\n" - "fmla z28.s, p2/M, z4.s, z8.s\n" - "fmla z29.s, p2/M, z4.s, z10.s\n" - "incw x13\n" - "ld1w { z7.s }, p1/Z, [x26, x28, LSL #2]\n" + "fmla z27.s, p2/M, z3.s, z12.s\n" + "ld1w { z11.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x21, [x16, #0x80]\n" + "fmla z31.s, p2/M, z3.s, z5.s\n" + "fmla z26.s, p2/M, z3.s, z22.s\n" + "ld1w { z16.s }, p2/Z, [x9, #3, MUL VL]\n" + "ldr x20, [x16, #0x88]\n" "fmla z30.s, p2/M, z4.s, z12.s\n" - "fmla z31.s, p2/M, z4.s, z9.s\n" - "ld1w { z8.s }, p1/Z, [x25, x28, LSL #2]\n" - "ld1w { z9.s }, p1/Z, [x23, x28, LSL #2]\n" - "ld1w { z13.s }, p1/Z, [x22, x28, LSL #2]\n" - "ld1w { z11.s }, p1/Z, [x21, x28, LSL #2]\n" - "fmax z28.s, p2/M, z28.s, z18.s\n" - "fmax z29.s, p2/M, z29.s, z18.s\n" - "ld1w { z12.s }, p1/Z, [x20, x28, LSL #2]\n" - "ld1w { z10.s }, p1/Z, [x10, x28, LSL #2]\n" - "fmax z30.s, p2/M, z30.s, z18.s\n" - "fmax z31.s, p2/M, z31.s, z18.s\n" - "ld1w { z14.s }, p1/Z, [x9, x28, LSL #2]\n" + "fmla z27.s, p2/M, z4.s, z20.s\n" + "ld1w { z0.s }, p3/Z, [x23, x13, LSL #2]\n" + "ld1w { z29.s }, p3/Z, [x22, x13, LSL #2]\n" + "fmla z31.s, p2/M, z4.s, z22.s\n" + "fmla z26.s, p2/M, z4.s, z10.s\n" + "ld1w { z19.s }, p2/Z, [x9, #4, MUL VL]\n" + "ldr x23, [x16, #0x90]\n" + "fmla z30.s, p2/M, z21.s, z7.s\n" + "fmla z27.s, p2/M, z21.s, z8.s\n" + "ldr x26, [x16, #0x98]\n" + "ldr x22, [x16, #0xa0]\n" + "fmla z31.s, p2/M, z21.s, z14.s\n" + "fmla z26.s, p2/M, z21.s, z11.s\n" + "ld1w { z25.s }, p2/Z, [x9, #5, MUL VL]\n" + "ldr x25, [x16, #0xa8]\n" + "fmla z30.s, p2/M, z18.s, z8.s\n" + "fmla z27.s, p2/M, z18.s, z13.s\n" + "ld1w { z24.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x24, [x16, #0xb0]\n" + "fmla z31.s, p2/M, z18.s, z11.s\n" + "fmla z26.s, p2/M, z18.s, z0.s\n" + "ld1w { z18.s }, p2/Z, [x9, #6, MUL VL]\n" + "ldr x20, [x16, #0xb8]\n" + "fmla z30.s, p2/M, z17.s, z13.s\n" + "fmla z27.s, p2/M, z17.s, z5.s\n" + "ld1w { z3.s }, p3/Z, [x21, x13, LSL #2]\n" + "ldr x21, [x16, #0xc0]\n" + "fmla z31.s, p2/M, z17.s, z0.s\n" + "fmla z26.s, p2/M, z17.s, z29.s\n" + "ld1w { z17.s }, p2/Z, [x9, #7, MUL VL]\n" + "addvl x9, x9, #16\n" + "fmla z30.s, p2/M, z16.s, z5.s\n" + "fmla z27.s, p2/M, z16.s, z22.s\n" + "ld1w { z6.s }, p3/Z, [x23, x13, LSL #2]\n" + "ldr x27, [x16, #0xc8]\n" + "fmla z31.s, p2/M, z16.s, z29.s\n" + "fmla z26.s, p2/M, z16.s, z3.s\n" + "ld1w { z16.s }, p2/Z, [x9, #-8, MUL VL]\n" + "ldr x23, [x16, #0xd0]\n" + "fmla z30.s, p2/M, z19.s, z22.s\n" + "fmla z27.s, p2/M, z19.s, z10.s\n" + "ld1w { z23.s }, p3/Z, [x26, x13, LSL #2]\n" + "ld1w { z22.s }, p3/Z, [x22, x13, LSL #2]\n" + "fmla z31.s, p2/M, z19.s, z3.s\n" + "fmla z26.s, p2/M, z19.s, z24.s\n" + "ld1w { z21.s }, p2/Z, [x9, #-7, MUL VL]\n" + "ldr x22, [x16, #0xd8]\n" + "fmla z30.s, p2/M, z25.s, z14.s\n" + "fmla z27.s, p2/M, z25.s, z11.s\n" + "ld1w { z1.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x20, [x16, #0xe0]\n" + "fmla z31.s, p2/M, z25.s, z6.s\n" + "fmla z26.s, p2/M, z25.s, z23.s\n" + "ld1w { z20.s }, p2/Z, [x9, #-6, MUL VL]\n" + "ldr x26, [x16, #0xf8]\n" + "fmla z30.s, p2/M, z18.s, z11.s\n" + "fmla z27.s, p2/M, z18.s, z0.s\n" + "ld1w { z7.s }, p3/Z, [x25, x13, LSL #2]\n" + "ldr x25, [x16, #0xe8]\n" + "fmla z31.s, p2/M, z18.s, z23.s\n" + "fmla z26.s, p2/M, z18.s, z22.s\n" + "ld1w { z18.s }, p2/Z, [x9, #-5, MUL VL]\n" + "whilelt p1.s, x10, %x[n_channels]\n" + "fmla z30.s, p2/M, z17.s, z0.s\n" + "fmla z27.s, p2/M, z17.s, z29.s\n" + "ld1w { z19.s }, p3/Z, [x24, x13, LSL #2]\n" + "ldr x24, [x16, #0xf0]\n" + "fmla z31.s, p2/M, z17.s, z22.s\n" + "fmla z26.s, p2/M, z17.s, z7.s\n" + "ld1w { z17.s }, p2/Z, [x9, #-4, MUL VL]\n" "incw x28\n" - "ld1w { z2.s }, p2/Z, [x27, #7, MUL VL]\n" - "addvl x27, x27, #16\n" + "fmla z30.s, p2/M, z16.s, z29.s\n" + "fmla z27.s, p2/M, z16.s, z3.s\n" + "ld1w { z0.s }, p3/Z, [x21, x13, LSL #2]\n" + "ldr x21, [x16, #0x100]\n" + "fmla z31.s, p2/M, z16.s, z7.s\n" + "fmla z26.s, p2/M, z16.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x9, #-3, MUL VL]\n" + "mov p0.b, p3.b\n" + "fmla z30.s, p2/M, z21.s, z3.s\n" + "fmla z27.s, p2/M, z21.s, z24.s\n" + "ld1w { z11.s }, p3/Z, [x27, x13, LSL #2]\n" + "ld1w { z13.s }, p3/Z, [x20, x13, LSL #2]\n" + "fmla z31.s, p2/M, z21.s, z19.s\n" + "fmla z26.s, p2/M, z21.s, z1.s\n" + "ld1w { z10.s }, p2/Z, [x9, #-2, MUL VL]\n" + "ldr x20, [x16, #0x108]\n" + "fmla z30.s, p2/M, z20.s, z6.s\n" + "fmla z27.s, p2/M, z20.s, z23.s\n" + "ld1w { z25.s }, p3/Z, [x23, x13, LSL #2]\n" + "ldr x23, [x16, #0x110]\n" + "fmla z31.s, p2/M, z20.s, z0.s\n" + "fmla z26.s, p2/M, z20.s, z11.s\n" + "ld1w { z8.s }, p2/Z, [x9, #-1, MUL VL]\n" + "ld1w { z29.s }, p2/Z, [x9, #4, MUL VL]\n" + "fmla z30.s, p2/M, z18.s, z23.s\n" + "fmla z27.s, p2/M, z18.s, z22.s\n" + "ld1w { z24.s }, p3/Z, [x22, x13, LSL #2]\n" + "ldr x22, [x16, #0x118]\n" + "fmla z31.s, p2/M, z18.s, z11.s\n" + "fmla z26.s, p2/M, z18.s, z25.s\n" + "ld1w { z23.s }, p2/Z, [x9]\n" + "fmla z30.s, p2/M, z17.s, z22.s\n" + "fmla z27.s, p2/M, z17.s, z7.s\n" + "ld1w { z22.s }, p3/Z, [x25, x13, LSL #2]\n" + "fmla z31.s, p2/M, z17.s, z25.s\n" + "fmla z26.s, p2/M, z17.s, z24.s\n" + "ld1w { z21.s }, p2/Z, [x9, #1, MUL VL]\n" + "fmla z30.s, p2/M, z16.s, z7.s\n" + "fmla z27.s, p2/M, z16.s, z19.s\n" + "ld1w { z18.s }, p3/Z, [x24, x13, LSL #2]\n" + "fmla z31.s, p2/M, z16.s, z24.s\n" + "fmla z26.s, p2/M, z16.s, z13.s\n" + "ld1w { z20.s }, p2/Z, [x9, #2, MUL VL]\n" + "fmla z30.s, p2/M, z10.s, z19.s\n" + "fmla z27.s, p2/M, z10.s, z1.s\n" + "ld1w { z17.s }, p3/Z, [x26, x13, LSL #2]\n" + "fmla z31.s, p2/M, z10.s, z13.s\n" + "fmla z26.s, p2/M, z10.s, z22.s\n" + "ld1w { z19.s }, p2/Z, [x9, #3, MUL VL]\n" + "fmla z30.s, p2/M, z8.s, z0.s\n" + "fmla z27.s, p2/M, z8.s, z11.s\n" + "ld1w { z16.s }, p3/Z, [x21, x13, LSL #2]\n" + "fmla z31.s, p2/M, z8.s, z18.s\n" + "fmla z26.s, p2/M, z8.s, z17.s\n" + "ld1w { z18.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldp x21, x20, [x16, #0x0]\n" + "fmla z30.s, p2/M, z23.s, z11.s\n" + "fmla z27.s, p2/M, z23.s, z25.s\n" + "ld1w { z0.s }, p2/Z, [x9, #5, MUL VL]\n" + "fmla z31.s, p2/M, z23.s, z17.s\n" + "fmla z26.s, p2/M, z23.s, z16.s\n" + "ld1w { z17.s }, p3/Z, [x23, x13, LSL #2]\n" + "ld1w { z1.s }, p2/Z, [x9, #6, MUL VL]\n" + "fmla z30.s, p2/M, z21.s, z25.s\n" + "fmla z27.s, p2/M, z21.s, z24.s\n" + "ld1w { z5.s }, p1/Z, [x21, x10, LSL #2]\n" + "fmla z31.s, p2/M, z21.s, z16.s\n" + "fmla z26.s, p2/M, z21.s, z18.s\n" + "ld1w { z16.s }, p3/Z, [x22, x13, LSL #2]\n" + "ldp x27, x26, [x16, #0x10]\n" + "fmla z30.s, p2/M, z20.s, z24.s\n" + "fmla z27.s, p2/M, z20.s, z13.s\n" + "ld1w { z6.s }, p1/Z, [x20, x10, LSL #2]\n" + "ldp x25, x24, [x16, #0x20]\n" + "fmla z31.s, p2/M, z20.s, z18.s\n" + "fmla z26.s, p2/M, z20.s, z17.s\n" + "ldp x23, x22, [x16, #0x30]\n" + "ldp x21, x20, [x16, #0x40]\n" + "fmla z30.s, p2/M, z19.s, z13.s\n" + "fmla z27.s, p2/M, z19.s, z22.s\n" + "incw x13\n" + "ld1w { z7.s }, p1/Z, [x27, x10, LSL #2]\n" + "fmla z31.s, p2/M, z19.s, z17.s\n" + "fmla z26.s, p2/M, z19.s, z16.s\n" + "ld1w { z8.s }, p1/Z, [x26, x10, LSL #2]\n" + "ld1w { z9.s }, p1/Z, [x25, x10, LSL #2]\n" + "ld1w { z13.s }, p1/Z, [x24, x10, LSL #2]\n" + "ld1w { z11.s }, p1/Z, [x23, x10, LSL #2]\n" + "fmax z30.s, p2/M, z30.s, z15.s\n" + "fmax z27.s, p2/M, z27.s, z15.s\n" + "ld1w { z12.s }, p1/Z, [x22, x10, LSL #2]\n" + "ld1w { z10.s }, p1/Z, [x21, x10, LSL #2]\n" + "fmax z31.s, p2/M, z31.s, z15.s\n" + "fmax z26.s, p2/M, z26.s, z15.s\n" + "ld1w { z14.s }, p1/Z, [x20, x10, LSL #2]\n" + "incw x10\n" + "ld1w { z2.s }, p2/Z, [x9, #7, MUL VL]\n" + "addvl x9, x9, #16\n" "whilelt p3.s, x13, %x[n_channels]\n" - "cmp x28, %x[n_channels]\n" - "ld1w { z3.s }, p2/Z, [x27, #-8, MUL VL]\n" - "ld1w { z4.s }, p2/Z, [x27, #-7, MUL VL]\n" - "fmin z28.s, p2/M, z28.s, z17.s\n" - "fmin z29.s, p2/M, z29.s, z17.s\n" - "st1w { z28.s }, p0, [x15, x24, LSL #2]\n" - "fmin z30.s, p2/M, z30.s, z17.s\n" - "fmin z31.s, p2/M, z31.s, z17.s\n" - "st1w { z29.s }, p0, [x14, x24, LSL #2]\n" - "st1w { z30.s }, p0, [x12, x24, LSL #2]\n" - "addvl x27, x27, #-6\n" - "st1w { z31.s }, p0, [x11, x24, LSL #2]\n" + "cmp x10, %x[n_channels]\n" + "ld1w { z3.s }, p2/Z, [x9, #-8, MUL VL]\n" + "ld1w { z4.s }, p2/Z, [x9, #-7, MUL VL]\n" + "fmin z30.s, p2/M, z30.s, z28.s\n" + "fmin z27.s, p2/M, z27.s, z28.s\n" + "st1w { z30.s }, p0, [x15, x28, LSL #2]\n" + "fmin z31.s, p2/M, z31.s, z28.s\n" + "fmin z26.s, p2/M, z26.s, z28.s\n" + "st1w { z27.s }, p0, [x14, x28, LSL #2]\n" + "st1w { z31.s }, p0, [x12, x28, LSL #2]\n" + "addvl x9, x9, #-6\n" + "st1w { z26.s }, p0, [x11, x28, LSL #2]\n" "blt 1b\n" "2:" // Channel tail - "movprfx z28, z16\n fmla z28.s, p2/M, z0.s, z5.s\n" - "movprfx z29, z16\n fmla z29.s, p2/M, z0.s, z6.s\n" - "ldr x26, [x16, #0x50]\n" - "ld1w { z5.s }, p3/Z, [x26, x13, LSL #2]\n" - "movprfx z30, z16\n fmla z30.s, p2/M, z0.s, z7.s\n" - "movprfx z31, z16\n fmla z31.s, p2/M, z0.s, z8.s\n" - "ldr x25, [x16, #0x58]\n" - "ldr x23, [x16, #0x60]\n" - "fmla z28.s, p2/M, z1.s, z6.s\n" - "fmla z29.s, p2/M, z1.s, z9.s\n" - "ld1w { z6.s }, p3/Z, [x25, x13, LSL #2]\n" - "ldr x22, [x16, #0x68]\n" - "fmla z30.s, p2/M, z1.s, z8.s\n" - "fmla z31.s, p2/M, z1.s, z13.s\n" - "ld1w { z0.s }, p2/Z, [x27]\n" - "ldr x21, [x16, #0x70]\n" - "fmla z28.s, p2/M, z2.s, z9.s\n" - "fmla z29.s, p2/M, z2.s, z11.s\n" - "ld1w { z9.s }, p3/Z, [x23, x13, LSL #2]\n" - "ld1w { z1.s }, p2/Z, [x27, #1, MUL VL]\n" - "fmla z30.s, p2/M, z2.s, z13.s\n" - "fmla z31.s, p2/M, z2.s, z5.s\n" - "ldr x20, [x16, #0x78]\n" - "ld1w { z2.s }, p2/Z, [x27, #2, MUL VL]\n" - "fmla z28.s, p2/M, z3.s, z11.s\n" - "fmla z29.s, p2/M, z3.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x22, x13, LSL #2]\n" - "ldr x10, [x16, #0x80]\n" - "fmla z30.s, p2/M, z3.s, z5.s\n" - "fmla z31.s, p2/M, z3.s, z6.s\n" - "ld1w { z3.s }, p2/Z, [x27, #3, MUL VL]\n" - "ldr x9, [x16, #0x88]\n" - "fmla z28.s, p2/M, z4.s, z12.s\n" - "fmla z29.s, p2/M, z4.s, z9.s\n" - "ld1w { z12.s }, p3/Z, [x21, x13, LSL #2]\n" - "ld1w { z9.s }, p3/Z, [x20, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z6.s\n" - "fmla z31.s, p2/M, z4.s, z10.s\n" - "ld1w { z4.s }, p2/Z, [x27, #4, MUL VL]\n" - "ldr x26, [x16, #0x90]\n" - "fmla z28.s, p2/M, z0.s, z7.s\n" + "movprfx z30, z29\n fmla z30.s, p2/M, z0.s, z5.s\n" + "movprfx z31, z29\n fmla z31.s, p2/M, z0.s, z6.s\n" + "ldr x20, [x16, #0x50]\n" + "ld1w { z22.s }, p3/Z, [x20, x13, LSL #2]\n" + "movprfx z5, z29\n fmla z5.s, p2/M, z0.s, z7.s\n" "fmla z29.s, p2/M, z0.s, z8.s\n" - "ldr x25, [x16, #0x98]\n" - "ldr x23, [x16, #0xa0]\n" - "fmla z30.s, p2/M, z0.s, z14.s\n" - "fmla z31.s, p2/M, z0.s, z11.s\n" - "ld1w { z0.s }, p2/Z, [x27, #5, MUL VL]\n" - "ldr x22, [x16, #0xa8]\n" - "fmla z28.s, p2/M, z1.s, z8.s\n" - "fmla z29.s, p2/M, z1.s, z13.s\n" - "ld1w { z8.s }, p3/Z, [x9, x13, LSL #2]\n" - "ldr x21, [x16, #0xb0]\n" - "fmla z30.s, p2/M, z1.s, z11.s\n" - "fmla z31.s, p2/M, z1.s, z12.s\n" - "ld1w { z1.s }, p2/Z, [x27, #6, MUL VL]\n" - "ldr x20, [x16, #0xb8]\n" - "fmla z28.s, p2/M, z2.s, z13.s\n" - "fmla z29.s, p2/M, z2.s, z5.s\n" - "ld1w { z13.s }, p3/Z, [x10, x13, LSL #2]\n" - "ldr x10, [x16, #0xc0]\n" - "fmla z30.s, p2/M, z2.s, z12.s\n" - "fmla z31.s, p2/M, z2.s, z9.s\n" - "ld1w { z2.s }, p2/Z, [x27, #7, MUL VL]\n" - "addvl x27, x27, #16\n" - "fmla z28.s, p2/M, z3.s, z5.s\n" - "fmla z29.s, p2/M, z3.s, z6.s\n" - "ld1w { z5.s }, p3/Z, [x26, x13, LSL #2]\n" - "ldr x9, [x16, #0xc8]\n" - "fmla z30.s, p2/M, z3.s, z9.s\n" - "fmla z31.s, p2/M, z3.s, z13.s\n" - "ld1w { z3.s }, p2/Z, [x27, #-8, MUL VL]\n" - "ldr x26, [x16, #0xd0]\n" - "fmla z28.s, p2/M, z4.s, z6.s\n" - "fmla z29.s, p2/M, z4.s, z10.s\n" - "ld1w { z6.s }, p3/Z, [x25, x13, LSL #2]\n" - "ld1w { z10.s }, p3/Z, [x23, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z13.s\n" - "fmla z31.s, p2/M, z4.s, z8.s\n" - "ld1w { z4.s }, p2/Z, [x27, #-7, MUL VL]\n" - "ldr x25, [x16, #0xd8]\n" - "fmla z28.s, p2/M, z0.s, z14.s\n" - "fmla z29.s, p2/M, z0.s, z11.s\n" - "ld1w { z14.s }, p3/Z, [x20, x13, LSL #2]\n" - "ldr x23, [x16, #0xe0]\n" - "fmla z30.s, p2/M, z0.s, z5.s\n" - "fmla z31.s, p2/M, z0.s, z6.s\n" - "ld1w { z0.s }, p2/Z, [x27, #-6, MUL VL]\n" - "ldr x20, [x16, #0xf8]\n" - "fmla z28.s, p2/M, z1.s, z11.s\n" - "fmla z29.s, p2/M, z1.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x22, x13, LSL #2]\n" - "ldr x22, [x16, #0xe8]\n" + "ldr x20, [x16, #0x58]\n" + "ldr x21, [x16, #0x60]\n" "fmla z30.s, p2/M, z1.s, z6.s\n" - "fmla z31.s, p2/M, z1.s, z10.s\n" - "ld1w { z1.s }, p2/Z, [x27, #-5, MUL VL]\n" - "incw x24\n" - "fmla z28.s, p2/M, z2.s, z12.s\n" - "fmla z29.s, p2/M, z2.s, z9.s\n" - "ld1w { z12.s }, p3/Z, [x21, x13, LSL #2]\n" - "ldr x21, [x16, #0xf0]\n" - "fmla z30.s, p2/M, z2.s, z10.s\n" - "fmla z31.s, p2/M, z2.s, z11.s\n" - "ld1w { z2.s }, p2/Z, [x27, #-4, MUL VL]\n" - "mov p0.b, p3.b\n" - "fmla z28.s, p2/M, z3.s, z9.s\n" - "fmla z29.s, p2/M, z3.s, z13.s\n" - "ld1w { z9.s }, p3/Z, [x10, x13, LSL #2]\n" - "ldr x10, [x16, #0x100]\n" - "fmla z30.s, p2/M, z3.s, z11.s\n" - "fmla z31.s, p2/M, z3.s, z12.s\n" - "ld1w { z3.s }, p2/Z, [x27, #-3, MUL VL]\n" - "fmla z28.s, p2/M, z4.s, z13.s\n" - "fmla z29.s, p2/M, z4.s, z8.s\n" - "ld1w { z13.s }, p3/Z, [x9, x13, LSL #2]\n" - "ld1w { z8.s }, p3/Z, [x23, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z12.s\n" - "fmla z31.s, p2/M, z4.s, z14.s\n" - "ld1w { z4.s }, p2/Z, [x27, #-2, MUL VL]\n" - "ldr x9, [x16, #0x108]\n" - "fmla z28.s, p2/M, z0.s, z5.s\n" - "fmla z29.s, p2/M, z0.s, z6.s\n" - "ld1w { z5.s }, p3/Z, [x26, x13, LSL #2]\n" - "ldr x26, [x16, #0x110]\n" - "fmla z30.s, p2/M, z0.s, z9.s\n" - "fmla z31.s, p2/M, z0.s, z13.s\n" - "ld1w { z0.s }, p2/Z, [x27, #-1, MUL VL]\n" - "fmla z28.s, p2/M, z1.s, z6.s\n" - "fmla z29.s, p2/M, z1.s, z10.s\n" - "ld1w { z6.s }, p3/Z, [x25, x13, LSL #2]\n" - "ldr x25, [x16, #0x118]\n" - "fmla z30.s, p2/M, z1.s, z13.s\n" - "fmla z31.s, p2/M, z1.s, z5.s\n" - "ld1w { z1.s }, p2/Z, [x27]\n" - "fmla z28.s, p2/M, z2.s, z10.s\n" - "fmla z29.s, p2/M, z2.s, z11.s\n" - "ld1w { z10.s }, p3/Z, [x22, x13, LSL #2]\n" - "fmla z30.s, p2/M, z2.s, z5.s\n" - "fmla z31.s, p2/M, z2.s, z6.s\n" - "ld1w { z2.s }, p2/Z, [x27, #1, MUL VL]\n" - "fmla z28.s, p2/M, z3.s, z11.s\n" - "fmla z29.s, p2/M, z3.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x21, x13, LSL #2]\n" - "fmla z30.s, p2/M, z3.s, z6.s\n" - "fmla z31.s, p2/M, z3.s, z8.s\n" - "ld1w { z3.s }, p2/Z, [x27, #2, MUL VL]\n" - "fmla z28.s, p2/M, z4.s, z12.s\n" - "fmla z29.s, p2/M, z4.s, z14.s\n" - "ld1w { z12.s }, p3/Z, [x20, x13, LSL #2]\n" - "fmla z30.s, p2/M, z4.s, z8.s\n" - "fmla z31.s, p2/M, z4.s, z10.s\n" - "ld1w { z4.s }, p2/Z, [x27, #3, MUL VL]\n" - "fmla z28.s, p2/M, z0.s, z9.s\n" - "fmla z29.s, p2/M, z0.s, z13.s\n" - "ld1w { z9.s }, p3/Z, [x10, x13, LSL #2]\n" - "fmla z30.s, p2/M, z0.s, z11.s\n" - "fmla z31.s, p2/M, z0.s, z12.s\n" - "ld1w { z11.s }, p3/Z, [x9, x13, LSL #2]\n" - "fmla z28.s, p2/M, z1.s, z13.s\n" - "fmla z29.s, p2/M, z1.s, z5.s\n" - "fmla z30.s, p2/M, z1.s, z12.s\n" "fmla z31.s, p2/M, z1.s, z9.s\n" - "ld1w { z12.s }, p3/Z, [x26, x13, LSL #2]\n" - "fmla z28.s, p2/M, z2.s, z5.s\n" - "fmla z29.s, p2/M, z2.s, z6.s\n" + "ld1w { z6.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x20, [x16, #0x68]\n" + "fmla z5.s, p2/M, z1.s, z8.s\n" + "fmla z29.s, p2/M, z1.s, z13.s\n" + "ld1w { z20.s }, p2/Z, [x9]\n" + "ldr x23, [x16, #0x70]\n" "fmla z30.s, p2/M, z2.s, z9.s\n" "fmla z31.s, p2/M, z2.s, z11.s\n" - "ld1w { z9.s }, p3/Z, [x25, x13, LSL #2]\n" - "fmla z28.s, p2/M, z3.s, z6.s\n" - "fmla z29.s, p2/M, z3.s, z8.s\n" + "ld1w { z16.s }, p3/Z, [x21, x13, LSL #2]\n" + "ld1w { z19.s }, p2/Z, [x9, #1, MUL VL]\n" + "fmla z5.s, p2/M, z2.s, z13.s\n" + "fmla z29.s, p2/M, z2.s, z22.s\n" + "ldr x21, [x16, #0x78]\n" + "ld1w { z18.s }, p2/Z, [x9, #2, MUL VL]\n" "fmla z30.s, p2/M, z3.s, z11.s\n" "fmla z31.s, p2/M, z3.s, z12.s\n" - "fmla z28.s, p2/M, z4.s, z8.s\n" - "fmla z29.s, p2/M, z4.s, z10.s\n" - "fmax z28.s, p2/M, z28.s, z18.s\n" - "fmax z29.s, p2/M, z29.s, z18.s\n" + "ld1w { z1.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x22, [x16, #0x80]\n" + "fmla z5.s, p2/M, z3.s, z22.s\n" + "fmla z29.s, p2/M, z3.s, z6.s\n" + "ld1w { z17.s }, p2/Z, [x9, #3, MUL VL]\n" + "ldr x20, [x16, #0x88]\n" "fmla z30.s, p2/M, z4.s, z12.s\n" - "fmla z31.s, p2/M, z4.s, z9.s\n" - "fmax z30.s, p2/M, z30.s, z18.s\n" - "fmax z31.s, p2/M, z31.s, z18.s\n" - "fmin z28.s, p2/M, z28.s, z17.s\n" - "fmin z29.s, p2/M, z29.s, z17.s\n" - "st1w { z28.s }, p0, [x15, x24, LSL #2]\n" - "fmin z30.s, p2/M, z30.s, z17.s\n" - "fmin z31.s, p2/M, z31.s, z17.s\n" - "st1w { z29.s }, p0, [x14, x24, LSL #2]\n" - "st1w { z30.s }, p0, [x12, x24, LSL #2]\n" - "st1w { z31.s }, p0, [x11, x24, LSL #2]\n" + "fmla z31.s, p2/M, z4.s, z16.s\n" + "ld1w { z0.s }, p3/Z, [x23, x13, LSL #2]\n" + "ld1w { z27.s }, p3/Z, [x21, x13, LSL #2]\n" + "fmla z5.s, p2/M, z4.s, z6.s\n" + "fmla z29.s, p2/M, z4.s, z10.s\n" + "ld1w { z16.s }, p2/Z, [x9, #4, MUL VL]\n" + "ldr x21, [x16, #0x90]\n" + "fmla z30.s, p2/M, z20.s, z7.s\n" + "fmla z31.s, p2/M, z20.s, z8.s\n" + "ldr x27, [x16, #0x98]\n" + "ldr x26, [x16, #0xa0]\n" + "fmla z5.s, p2/M, z20.s, z14.s\n" + "fmla z29.s, p2/M, z20.s, z1.s\n" + "ld1w { z21.s }, p2/Z, [x9, #5, MUL VL]\n" + "ldr x25, [x16, #0xa8]\n" + "fmla z30.s, p2/M, z19.s, z8.s\n" + "fmla z31.s, p2/M, z19.s, z13.s\n" + "ld1w { z26.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x24, [x16, #0xb0]\n" + "fmla z5.s, p2/M, z19.s, z1.s\n" + "fmla z29.s, p2/M, z19.s, z0.s\n" + "ld1w { z25.s }, p2/Z, [x9, #6, MUL VL]\n" + "ldr x20, [x16, #0xb8]\n" + "fmla z30.s, p2/M, z18.s, z13.s\n" + "fmla z31.s, p2/M, z18.s, z22.s\n" + "ld1w { z24.s }, p3/Z, [x22, x13, LSL #2]\n" + "ldr x23, [x16, #0xc0]\n" + "fmla z5.s, p2/M, z18.s, z0.s\n" + "fmla z29.s, p2/M, z18.s, z27.s\n" + "ld1w { z23.s }, p2/Z, [x9, #7, MUL VL]\n" + "addvl x9, x9, #16\n" + "fmla z30.s, p2/M, z17.s, z22.s\n" + "fmla z31.s, p2/M, z17.s, z6.s\n" + "ld1w { z22.s }, p3/Z, [x21, x13, LSL #2]\n" + "ldr x22, [x16, #0xc8]\n" + "fmla z5.s, p2/M, z17.s, z27.s\n" + "fmla z29.s, p2/M, z17.s, z24.s\n" + "ld1w { z20.s }, p2/Z, [x9, #-8, MUL VL]\n" + "ldr x21, [x16, #0xd0]\n" + "fmla z30.s, p2/M, z16.s, z6.s\n" + "fmla z31.s, p2/M, z16.s, z10.s\n" + "ld1w { z19.s }, p3/Z, [x27, x13, LSL #2]\n" + "ld1w { z18.s }, p3/Z, [x26, x13, LSL #2]\n" + "fmla z5.s, p2/M, z16.s, z24.s\n" + "fmla z29.s, p2/M, z16.s, z26.s\n" + "ld1w { z16.s }, p2/Z, [x9, #-7, MUL VL]\n" + "ldr x27, [x16, #0xd8]\n" + "fmla z30.s, p2/M, z21.s, z14.s\n" + "fmla z31.s, p2/M, z21.s, z1.s\n" + "ld1w { z17.s }, p3/Z, [x20, x13, LSL #2]\n" + "ldr x20, [x16, #0xe0]\n" + "fmla z5.s, p2/M, z21.s, z22.s\n" + "fmla z29.s, p2/M, z21.s, z19.s\n" + "ld1w { z21.s }, p2/Z, [x9, #-6, MUL VL]\n" + "ldr x26, [x16, #0xf8]\n" + "fmla z30.s, p2/M, z25.s, z1.s\n" + "fmla z31.s, p2/M, z25.s, z0.s\n" + "ld1w { z9.s }, p3/Z, [x25, x13, LSL #2]\n" + "ldr x25, [x16, #0xe8]\n" + "fmla z5.s, p2/M, z25.s, z19.s\n" + "fmla z29.s, p2/M, z25.s, z18.s\n" + "ld1w { z4.s }, p2/Z, [x9, #-5, MUL VL]\n" + "incw x28\n" + "fmla z30.s, p2/M, z23.s, z0.s\n" + "fmla z31.s, p2/M, z23.s, z27.s\n" + "ld1w { z8.s }, p3/Z, [x24, x13, LSL #2]\n" + "ldr x24, [x16, #0xf0]\n" + "fmla z5.s, p2/M, z23.s, z18.s\n" + "fmla z29.s, p2/M, z23.s, z9.s\n" + "ld1w { z6.s }, p2/Z, [x9, #-4, MUL VL]\n" + "mov p0.b, p3.b\n" + "fmla z30.s, p2/M, z20.s, z27.s\n" + "fmla z31.s, p2/M, z20.s, z24.s\n" + "ld1w { z10.s }, p3/Z, [x23, x13, LSL #2]\n" + "ldr x23, [x16, #0x100]\n" + "fmla z5.s, p2/M, z20.s, z9.s\n" + "fmla z29.s, p2/M, z20.s, z8.s\n" + "ld1w { z11.s }, p2/Z, [x9, #-3, MUL VL]\n" + "fmla z30.s, p2/M, z16.s, z24.s\n" + "fmla z31.s, p2/M, z16.s, z26.s\n" + "ld1w { z0.s }, p3/Z, [x22, x13, LSL #2]\n" + "ld1w { z27.s }, p3/Z, [x20, x13, LSL #2]\n" + "fmla z5.s, p2/M, z16.s, z8.s\n" + "fmla z29.s, p2/M, z16.s, z17.s\n" + "ld1w { z16.s }, p2/Z, [x9, #-2, MUL VL]\n" + "ldr x22, [x16, #0x108]\n" + "fmla z30.s, p2/M, z21.s, z22.s\n" + "fmla z31.s, p2/M, z21.s, z19.s\n" + "ld1w { z26.s }, p3/Z, [x21, x13, LSL #2]\n" + "ldr x21, [x16, #0x110]\n" + "fmla z5.s, p2/M, z21.s, z10.s\n" + "fmla z29.s, p2/M, z21.s, z0.s\n" + "ld1w { z25.s }, p2/Z, [x9, #-1, MUL VL]\n" + "fmla z30.s, p2/M, z4.s, z19.s\n" + "fmla z31.s, p2/M, z4.s, z18.s\n" + "ld1w { z24.s }, p3/Z, [x27, x13, LSL #2]\n" + "ldr x20, [x16, #0x118]\n" + "fmla z5.s, p2/M, z4.s, z0.s\n" + "fmla z29.s, p2/M, z4.s, z26.s\n" + "ld1w { z23.s }, p2/Z, [x9]\n" + "fmla z30.s, p2/M, z6.s, z18.s\n" + "fmla z31.s, p2/M, z6.s, z9.s\n" + "ld1w { z22.s }, p3/Z, [x25, x13, LSL #2]\n" + "fmla z5.s, p2/M, z6.s, z26.s\n" + "fmla z29.s, p2/M, z6.s, z24.s\n" + "ld1w { z21.s }, p2/Z, [x9, #1, MUL VL]\n" + "fmla z30.s, p2/M, z11.s, z9.s\n" + "fmla z31.s, p2/M, z11.s, z8.s\n" + "ld1w { z18.s }, p3/Z, [x24, x13, LSL #2]\n" + "fmla z5.s, p2/M, z11.s, z24.s\n" + "fmla z29.s, p2/M, z11.s, z27.s\n" + "ld1w { z20.s }, p2/Z, [x9, #2, MUL VL]\n" + "fmla z30.s, p2/M, z16.s, z8.s\n" + "fmla z31.s, p2/M, z16.s, z17.s\n" + "ld1w { z17.s }, p3/Z, [x26, x13, LSL #2]\n" + "fmla z5.s, p2/M, z16.s, z27.s\n" + "fmla z29.s, p2/M, z16.s, z22.s\n" + "ld1w { z19.s }, p2/Z, [x9, #3, MUL VL]\n" + "fmla z30.s, p2/M, z25.s, z10.s\n" + "fmla z31.s, p2/M, z25.s, z0.s\n" + "ld1w { z16.s }, p3/Z, [x23, x13, LSL #2]\n" + "fmla z5.s, p2/M, z25.s, z18.s\n" + "fmla z29.s, p2/M, z25.s, z17.s\n" + "ld1w { z18.s }, p3/Z, [x22, x13, LSL #2]\n" + "fmla z30.s, p2/M, z23.s, z0.s\n" + "fmla z31.s, p2/M, z23.s, z26.s\n" + "fmla z5.s, p2/M, z23.s, z17.s\n" + "fmla z29.s, p2/M, z23.s, z16.s\n" + "ld1w { z17.s }, p3/Z, [x21, x13, LSL #2]\n" + "fmla z30.s, p2/M, z21.s, z26.s\n" + "fmla z31.s, p2/M, z21.s, z24.s\n" + "fmla z5.s, p2/M, z21.s, z16.s\n" + "fmla z29.s, p2/M, z21.s, z18.s\n" + "ld1w { z16.s }, p3/Z, [x20, x13, LSL #2]\n" + "fmla z30.s, p2/M, z20.s, z24.s\n" + "fmla z31.s, p2/M, z20.s, z27.s\n" + "fmla z5.s, p2/M, z20.s, z18.s\n" + "fmla z29.s, p2/M, z20.s, z17.s\n" + "fmla z30.s, p2/M, z19.s, z27.s\n" + "fmla z31.s, p2/M, z19.s, z22.s\n" + "fmax z30.s, p2/M, z30.s, z15.s\n" + "fmax z31.s, p2/M, z31.s, z15.s\n" + "fmla z5.s, p2/M, z19.s, z17.s\n" + "fmla z29.s, p2/M, z19.s, z16.s\n" + "fmax z5.s, p2/M, z5.s, z15.s\n" + "fmax z29.s, p2/M, z29.s, z15.s\n" + "fmin z30.s, p2/M, z30.s, z28.s\n" + "fmin z31.s, p2/M, z31.s, z28.s\n" + "st1w { z30.s }, p0, [x15, x28, LSL #2]\n" + "fmin z5.s, p2/M, z5.s, z28.s\n" + "fmin z29.s, p2/M, z29.s, z28.s\n" + "st1w { z31.s }, p0, [x14, x28, LSL #2]\n" + "st1w { z5.s }, p0, [x12, x28, LSL #2]\n" + "st1w { z29.s }, p0, [x11, x28, LSL #2]\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z16", "z17", "z18", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } } // namespace depthwise } // namespace arm_conv -#endif // __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) |