diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp | 406 |
1 files changed, 168 insertions, 238 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp index 3877ae2f03..72b182679d 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include <cstddef> #include <cstdint> -#if defined(ARM_COMPUTE_ENABLE_SVE) +#if __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -87,413 +87,343 @@ void sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl( activation_min, activation_max); __asm__ __volatile__( - "ldr x17, [%x[params_struct], %[offsetof_args_outptrs]]\n" + "ldr x16, [%x[params_struct], %[offsetof_args_outptrs]]\n" "ptrue p3.b\n" - "ldr x16, [%x[params_struct], %[offsetof_args_params]]\n" - "add x15, %x[params_struct], %[offsetof_Args_inptrs]\n" + "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" + "add x14, %x[params_struct], %[offsetof_Args_inptrs]\n" "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "cntb x14, ALL, MUL #2\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" "mov x13, #0x0\n" - "ld1w { z16.s }, p3/Z, [x16]\n" - "mov z31.d, z16.d\n" - "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" + "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" "cntw x12\n" - "mov z30.d, z16.d\n" - "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" + "ld1w { z16.s }, p3/Z, [x15]\n" "sub x11, XZR, x12\n" - "mov z29.d, z16.d\n" - "ld1w { z2.s }, p3/Z, [x16, #3, MUL VL]\n" + "ld1w { z0.s }, p3/Z, [x15, #1, MUL VL]\n" "whilelt p2.s, XZR, %x[n_channels]\n" - "mov z28.d, z16.d\n" - "ld1w { z3.s }, p3/Z, [x16, #4, MUL VL]\n" + "ld1w { z1.s }, p3/Z, [x15, #2, MUL VL]\n" "cmp x12, %x[n_channels]\n" - "mov z27.d, z16.d\n" - "ld1w { z4.s }, p3/Z, [x16, #5, MUL VL]\n" - "mov z26.d, z16.d\n" - "ld1w { z5.s }, p3/Z, [x16, #6, MUL VL]\n" - "mov z25.d, z16.d\n" - "ld1w { z6.s }, p3/Z, [x16, #7, MUL VL]\n" - "addvl x16, x16, #16\n" - "mov z24.d, z16.d\n" - "ld1w { z7.s }, p3/Z, [x16, #-8, MUL VL]\n" - "mov z23.d, z16.d\n" - "ld1w { z8.s }, p3/Z, [x16, #-7, MUL VL]\n" - "addvl x16, x16, #-6\n" - "ldp x10, x22, [x15, #0x0]\n" - "ldp x9, x28, [x15, #0x10]\n" - "ldr x24, [x15, #0x20]\n" + "ld1w { z2.s }, p3/Z, [x15, #3, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x15, #4, MUL VL]\n" + "ld1w { z4.s }, p3/Z, [x15, #5, MUL VL]\n" + "ld1w { z5.s }, p3/Z, [x15, #6, MUL VL]\n" + "ld1w { z6.s }, p3/Z, [x15, #7, MUL VL]\n" + "addvl x15, x15, #16\n" + "ldp x10, x9, [x14, #0x0]\n" + "ld1w { z7.s }, p3/Z, [x15, #-8, MUL VL]\n" + "ld1w { z8.s }, p3/Z, [x15, #-7, MUL VL]\n" + "addvl x15, x15, #-6\n" "ld1w { z9.s }, p2/Z, [x10, x13, LSL #2]\n" - "prfm pldl1keep, [x10, x14]\n" - "ld1w { z10.s }, p2/Z, [x22, x13, LSL #2]\n" - "prfm pldl1keep, [x22, x14]\n" - "ld1w { z11.s }, p2/Z, [x9, x13, LSL #2]\n" - "prfm pldl1keep, [x9, x14]\n" - "ld1w { z12.s }, p2/Z, [x28, x13, LSL #2]\n" - "prfm pldl1keep, [x28, x14]\n" - "ld1w { z13.s }, p2/Z, [x24, x13, LSL #2]\n" - "prfm pldl1keep, [x24, x14]\n" + "ld1w { z10.s }, p2/Z, [x9, x13, LSL #2]\n" + "ldp x28, x27, [x14, #0x10]\n" + "ldr x26, [x14, #0x20]\n" + "ld1w { z11.s }, p2/Z, [x28, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x27, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x26, x13, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "fmla z31.s, p3/M, z8.s, z9.s\n" - "ldr x27, [x15, #0x28]\n" + "movprfx z31, z16\n fmla z31.s, p3/M, z8.s, z9.s\n" + "ldr x25, [x14, #0x28]\n" "whilelt p1.s, x12, %x[n_channels]\n" - "fmla z30.s, p3/M, z7.s, z9.s\n" - "ldr x23, [x15, #0x30]\n" + "movprfx z30, z16\n fmla z30.s, p3/M, z7.s, z9.s\n" + "ldr x24, [x14, #0x30]\n" "incw x11\n" - "fmla z29.s, p3/M, z6.s, z9.s\n" - "ldr x26, [x15, #0x38]\n" + "movprfx z29, z16\n fmla z29.s, p3/M, z6.s, z9.s\n" + "ldr x23, [x14, #0x38]\n" "mov p0.b, p2.b\n" - "fmla z28.s, p3/M, z5.s, z9.s\n" - "prfm pldl1keep, [x27, x14]\n" - "fmla z27.s, p3/M, z4.s, z9.s\n" - "prfm pldl1keep, [x23, x14]\n" - "fmla z26.s, p3/M, z3.s, z9.s\n" - "prfm pldl1keep, [x26, x14]\n" - "fmla z25.s, p3/M, z2.s, z9.s\n" - "ldr x25, [x15, #0x40]\n" - "fmla z24.s, p3/M, z1.s, z9.s\n" - "ldr x19, [x15, #0x48]\n" - "fmla z23.s, p3/M, z0.s, z9.s\n" - "ldr x24, [x15, #0x50]\n" + "movprfx z28, z16\n fmla z28.s, p3/M, z5.s, z9.s\n" + "ldr x10, [x14, #0x40]\n" + "movprfx z27, z16\n fmla z27.s, p3/M, z4.s, z9.s\n" + "ldr x9, [x14, #0x48]\n" + "movprfx z26, z16\n fmla z26.s, p3/M, z3.s, z9.s\n" + "ldr x28, [x14, #0x50]\n" + "movprfx z25, z16\n fmla z25.s, p3/M, z2.s, z9.s\n" + "ldr x27, [x14, #0x58]\n" + "movprfx z24, z16\n fmla z24.s, p3/M, z1.s, z9.s\n" + "ldr x26, [x14, #0x60]\n" + "movprfx z23, z16\n fmla z23.s, p3/M, z0.s, z9.s\n" + "ldr x22, [x16, #0x0]\n" "fmla z31.s, p3/M, z0.s, z10.s\n" - "prfm pldl1keep, [x25, x14]\n" + "ld1w { z10.s }, p2/Z, [x9, x13, LSL #2]\n" "fmla z29.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z25.s, p3/M, z6.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x27, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z13.s\n" - "ld1w { z10.s }, p2/Z, [x19, x13, LSL #2]\n" + "ldr x25, [x14, #0x68]\n" "fmla z31.s, p3/M, z5.s, z13.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x24, [x14, #0x70]\n" "fmla z29.s, p3/M, z3.s, z13.s\n" - "prfm pldl1keep, [x24, x14]\n" + "ldr x9, [x14, #0x88]\n" "fmla z28.s, p3/M, z2.s, z13.s\n" - "ldr x23, [x15, #0x58]\n" + "ldr x21, [x16, #0x8]\n" "fmla z27.s, p3/M, z1.s, z13.s\n" - "ldr x22, [x15, #0x60]\n" + "ldr x20, [x16, #0x10]\n" "fmla z26.s, p3/M, z0.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x26, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z23.s, p3/M, z8.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x25, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x10, x13, LSL #2]\n" "fmla z31.s, p3/M, z7.s, z11.s\n" - "prfm pldl1keep, [x23, x14]\n" + "ldr x23, [x14, #0x78]\n" "fmla z30.s, p3/M, z6.s, z11.s\n" - "prfm pldl1keep, [x22, x14]\n" + "ldr x10, [x14, #0x80]\n" "fmla z28.s, p3/M, z4.s, z11.s\n" - "ldr x21, [x15, #0x68]\n" + "ldr x19, [x16, #0x18]\n" "fmla z27.s, p3/M, z3.s, z11.s\n" - "ldr x20, [x15, #0x70]\n" + "ld1w { z16.s }, p3/Z, [x15]\n" "fmla z25.s, p3/M, z1.s, z11.s\n" - "ldr x19, [x15, #0x78]\n" "fmla z24.s, p3/M, z0.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x28, x13, LSL #2]\n" "fmla z31.s, p3/M, z1.s, z13.s\n" - "prfm pldl1keep, [x21, x14]\n" + "ldr x28, [x14, #0x90]\n" "fmla z30.s, p3/M, z0.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x27, x13, LSL #2]\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ldr x27, [x14, #0x98]\n" "fmla z27.s, p3/M, z5.s, z10.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z26.s, p3/M, z4.s, z10.s\n" - "ldr x10, [x15, #0x80]\n" "fmla z30.s, p3/M, z2.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z29.s, p3/M, z7.s, z10.s\n" - "ldr x22, [x15, #0x88]\n" + "ldr x26, [x14, #0xa0]\n" "fmla z24.s, p3/M, z2.s, z10.s\n" - "prfm pldl1keep, [x10, x14]\n" "fmla z23.s, p3/M, z1.s, z10.s\n" - "ldr x9, [x15, #0x90]\n" "fmla z30.s, p3/M, z8.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x21, x13, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z31.s, p3/M, z3.s, z11.s\n" - "prfm pldl1keep, [x22, x14]\n" + "ldr x25, [x14, #0xa8]\n" "fmla z28.s, p3/M, z0.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z29.s, p3/M, z5.s, z13.s\n" - "prfm pldl1keep, [x9, x14]\n" + "ldr x24, [x14, #0xb0]\n" "fmla z26.s, p3/M, z2.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z25.s, p3/M, z3.s, z12.s\n" - "ldr x28, [x15, #0x98]\n" + "ldr x23, [x14, #0xb8]\n" "fmla z28.s, p3/M, z6.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x10, x13, LSL #2]\n" "fmla z27.s, p3/M, z7.s, z10.s\n" - "ldr x24, [x15, #0xa0]\n" + "ldr x10, [x14, #0xc0]\n" "fmla z26.s, p3/M, z6.s, z10.s\n" - "prfm pldl1keep, [x28, x14]\n" "fmla z25.s, p3/M, z5.s, z10.s\n" - "ldr x27, [x15, #0xa8]\n" "fmla z28.s, p3/M, z8.s, z10.s\n" - "prfm pldl1keep, [x24, x14]\n" "fmla z24.s, p3/M, z4.s, z10.s\n" - "ldr x23, [x15, #0xb0]\n" "fmla z23.s, p3/M, z3.s, z10.s\n" - "prfm pldl1keep, [x27, x14]\n" "fmla z26.s, p3/M, z8.s, z11.s\n" - "ldr x26, [x15, #0xb8]\n" "fmla z25.s, p3/M, z7.s, z13.s\n" - "prfm pldl1keep, [x23, x14]\n" "fmla z24.s, p3/M, z6.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x9, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x28, x13, LSL #2]\n" "fmla z23.s, p3/M, z5.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x9, x13, LSL #2]\n" "fmla z31.s, p3/M, z4.s, z12.s\n" - "prfm pldl1keep, [x26, x14]\n" "fmla z30.s, p3/M, z3.s, z12.s\n" - "ldr x25, [x15, #0xc0]\n" "fmla z28.s, p3/M, z1.s, z12.s\n" - "ldp x10, x22, [x15, #0x0]\n" "fmla z27.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x28, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x27, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z11.s\n" - "prfm pldl1keep, [x25, x14]\n" - "addvl x14, x14, #1\n" "fmla z30.s, p3/M, z5.s, z11.s\n" - "ld1w { z9.s }, p1/Z, [x10, x12, LSL #2]\n" "fmla z26.s, p3/M, z1.s, z11.s\n" - "prfm pldl1keep, [x10, x14]\n" "fmla z27.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z24.s, p3/M, z8.s, z13.s\n" - "ld1w { z10.s }, p1/Z, [x22, x12, LSL #2]\n" + "ldr x26, [x14, #0x20]\n" "fmla z23.s, p3/M, z7.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x27, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z28.s, p3/M, z7.s, z12.s\n" - "prfm pldl1keep, [x22, x14]\n" "fmla z27.s, p3/M, z6.s, z12.s\n" - "ldp x9, x28, [x15, #0x10]\n" "fmla z25.s, p3/M, z4.s, z12.s\n" - "ldr x24, [x15, #0x20]\n" "fmla z24.s, p3/M, z3.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z31.s, p3/M, z2.s, z11.s\n" - "prfm pldl1keep, [x9, x14]\n" "fmla z30.s, p3/M, z1.s, z11.s\n" - "prfm pldl1keep, [x28, x14]\n" + "ld1w { z1.s }, p3/Z, [x15, #2, MUL VL]\n" "fmla z29.s, p3/M, z0.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x26, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z27.s, p3/M, z8.s, z13.s\n" - "prfm pldl1keep, [x24, x14]\n" "fmla z26.s, p3/M, z7.s, z13.s\n" - "ldr x22, [x17, #0x0]\n" "fmla z24.s, p3/M, z5.s, z13.s\n" - "ldr x21, [x17, #0x8]\n" "fmla z23.s, p3/M, z4.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x10, x13, LSL #2]\n" "incw x13\n" "fmla z31.s, p3/M, z6.s, z12.s\n" - "ldr x20, [x17, #0x10]\n" + "ldp x10, x9, [x14, #0x0]\n" "whilelt p2.s, x13, %x[n_channels]\n" "fmla z28.s, p3/M, z3.s, z12.s\n" - "ldr x19, [x17, #0x18]\n" + "ldp x28, x27, [x14, #0x10]\n" "fmla z25.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p1/Z, [x28, x12, LSL #2]\n" + "ld1w { z0.s }, p3/Z, [x15, #1, MUL VL]\n" "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z16.s }, p3/Z, [x16]\n" + "ld1w { z9.s }, p1/Z, [x10, x12, LSL #2]\n" "fmla z26.s, p3/M, z5.s, z11.s\n" - "ld1w { z0.s }, p3/Z, [x16, #1, MUL VL]\n" + "ld1w { z10.s }, p1/Z, [x9, x12, LSL #2]\n" "fmla z23.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p1/Z, [x9, x12, LSL #2]\n" + "ld1w { z11.s }, p1/Z, [x28, x12, LSL #2]\n" "fmla z25.s, p3/M, z8.s, z13.s\n" - "ld1w { z1.s }, p3/Z, [x16, #2, MUL VL]\n" + "ld1w { z12.s }, p1/Z, [x27, x12, LSL #2]\n" "fmla z24.s, p3/M, z7.s, z13.s\n" - "ld1w { z2.s }, p3/Z, [x16, #3, MUL VL]\n" + "ld1w { z2.s }, p3/Z, [x15, #3, MUL VL]\n" "fmax z31.s, p3/M, z31.s, z18.s\n" - "ld1w { z3.s }, p3/Z, [x16, #4, MUL VL]\n" + "ld1w { z3.s }, p3/Z, [x15, #4, MUL VL]\n" "fmla z23.s, p3/M, z6.s, z13.s\n" - "ld1w { z13.s }, p1/Z, [x24, x12, LSL #2]\n" + "ld1w { z13.s }, p1/Z, [x26, x12, LSL #2]\n" "incw x12\n" "fmax z30.s, p3/M, z30.s, z18.s\n" - "ld1w { z4.s }, p3/Z, [x16, #5, MUL VL]\n" + "ld1w { z4.s }, p3/Z, [x15, #5, MUL VL]\n" "cmp x12, %x[n_channels]\n" "fmin z31.s, p3/M, z31.s, z17.s\n" - "ld1w { z5.s }, p3/Z, [x16, #6, MUL VL]\n" + "ld1w { z5.s }, p3/Z, [x15, #6, MUL VL]\n" "fmax z29.s, p3/M, z29.s, z18.s\n" - "ld1w { z6.s }, p3/Z, [x16, #7, MUL VL]\n" - "addvl x16, x16, #16\n" + "ld1w { z6.s }, p3/Z, [x15, #7, MUL VL]\n" + "addvl x15, x15, #16\n" "fmax z28.s, p3/M, z28.s, z18.s\n" - "ld1w { z7.s }, p3/Z, [x16, #-8, MUL VL]\n" + "ld1w { z7.s }, p3/Z, [x15, #-8, MUL VL]\n" "fmax z27.s, p3/M, z27.s, z18.s\n" - "ld1w { z8.s }, p3/Z, [x16, #-7, MUL VL]\n" - "addvl x16, x16, #-6\n" + "ld1w { z8.s }, p3/Z, [x15, #-7, MUL VL]\n" + "addvl x15, x15, #-6\n" "fmin z30.s, p3/M, z30.s, z17.s\n" "st1w { z31.s }, p0, [x22, x11, LSL #2]\n" - "mov z31.d, z16.d\n" - "ldr x22, [x17, #0x20]\n" "fmin z29.s, p3/M, z29.s, z17.s\n" + "ldr x22, [x16, #0x20]\n" + "fmax z26.s, p3/M, z26.s, z18.s\n" "st1w { z30.s }, p0, [x21, x11, LSL #2]\n" - "mov z30.d, z16.d\n" "fmin z28.s, p3/M, z28.s, z17.s\n" - "st1w { z29.s }, p0, [x20, x11, LSL #2]\n" - "mov z29.d, z16.d\n" - "ldr x21, [x17, #0x28]\n" "fmin z27.s, p3/M, z27.s, z17.s\n" - "ldr x20, [x17, #0x30]\n" - "fmax z26.s, p3/M, z26.s, z18.s\n" - "st1w { z28.s }, p0, [x19, x11, LSL #2]\n" - "mov z28.d, z16.d\n" - "ldr x19, [x17, #0x38]\n" + "st1w { z29.s }, p0, [x20, x11, LSL #2]\n" + "fmin z26.s, p3/M, z26.s, z17.s\n" + "ldr x21, [x16, #0x28]\n" "fmax z25.s, p3/M, z25.s, z18.s\n" + "ldr x20, [x16, #0x30]\n" + "fmax z24.s, p3/M, z24.s, z18.s\n" + "st1w { z28.s }, p0, [x19, x11, LSL #2]\n" + "fmax z23.s, p3/M, z23.s, z18.s\n" "st1w { z27.s }, p0, [x22, x11, LSL #2]\n" - "mov z27.d, z16.d\n" - "ldr x22, [x17, #0x40]\n" - "fmin z26.s, p3/M, z26.s, z17.s\n" "st1w { z26.s }, p0, [x21, x11, LSL #2]\n" - "mov z26.d, z16.d\n" "fmin z25.s, p3/M, z25.s, z17.s\n" - "st1w { z25.s }, p0, [x20, x11, LSL #2]\n" - "mov z25.d, z16.d\n" - "fmax z24.s, p3/M, z24.s, z18.s\n" - "fmax z23.s, p3/M, z23.s, z18.s\n" + "ldr x19, [x16, #0x38]\n" "fmin z24.s, p3/M, z24.s, z17.s\n" - "st1w { z24.s }, p0, [x19, x11, LSL #2]\n" - "mov z24.d, z16.d\n" + "ldr x22, [x16, #0x40]\n" "fmin z23.s, p3/M, z23.s, z17.s\n" + "st1w { z25.s }, p0, [x20, x11, LSL #2]\n" + "st1w { z24.s }, p0, [x19, x11, LSL #2]\n" "st1w { z23.s }, p0, [x22, x11, LSL #2]\n" - "mov z23.d, z16.d\n" "blt 1b\n" "2:" // Channel tail - "fmla z31.s, p3/M, z8.s, z9.s\n" - "ldr x27, [x15, #0x28]\n" + "movprfx z31, z16\n fmla z31.s, p3/M, z8.s, z9.s\n" + "ldr x25, [x14, #0x28]\n" "incw x11\n" - "fmla z30.s, p3/M, z7.s, z9.s\n" - "ldr x23, [x15, #0x30]\n" + "movprfx z30, z16\n fmla z30.s, p3/M, z7.s, z9.s\n" + "ldr x24, [x14, #0x30]\n" "mov p0.b, p2.b\n" - "fmla z29.s, p3/M, z6.s, z9.s\n" - "ldr x26, [x15, #0x38]\n" - "fmla z28.s, p3/M, z5.s, z9.s\n" - "prfm pldl1keep, [x27, x14]\n" - "fmla z27.s, p3/M, z4.s, z9.s\n" - "prfm pldl1keep, [x23, x14]\n" - "fmla z26.s, p3/M, z3.s, z9.s\n" - "prfm pldl1keep, [x26, x14]\n" - "fmla z25.s, p3/M, z2.s, z9.s\n" - "ldr x25, [x15, #0x40]\n" - "fmla z24.s, p3/M, z1.s, z9.s\n" - "ldr x19, [x15, #0x48]\n" - "fmla z23.s, p3/M, z0.s, z9.s\n" - "ldr x24, [x15, #0x50]\n" + "movprfx z29, z16\n fmla z29.s, p3/M, z6.s, z9.s\n" + "ldr x23, [x14, #0x38]\n" + "movprfx z28, z16\n fmla z28.s, p3/M, z5.s, z9.s\n" + "ldr x10, [x14, #0x40]\n" + "movprfx z27, z16\n fmla z27.s, p3/M, z4.s, z9.s\n" + "ldr x9, [x14, #0x48]\n" + "movprfx z26, z16\n fmla z26.s, p3/M, z3.s, z9.s\n" + "ldr x28, [x14, #0x50]\n" + "movprfx z25, z16\n fmla z25.s, p3/M, z2.s, z9.s\n" + "ldr x27, [x14, #0x58]\n" + "movprfx z24, z16\n fmla z24.s, p3/M, z1.s, z9.s\n" + "ldr x26, [x14, #0x60]\n" + "movprfx z23, z16\n fmla z23.s, p3/M, z0.s, z9.s\n" + "ldr x22, [x16, #0x0]\n" "fmla z31.s, p3/M, z0.s, z10.s\n" - "prfm pldl1keep, [x25, x14]\n" + "ld1w { z10.s }, p2/Z, [x9, x13, LSL #2]\n" "fmla z29.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z25.s, p3/M, z6.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x27, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z30.s, p3/M, z4.s, z13.s\n" - "ld1w { z10.s }, p2/Z, [x19, x13, LSL #2]\n" + "ldr x25, [x14, #0x68]\n" "fmla z31.s, p3/M, z5.s, z13.s\n" - "prfm pldl1keep, [x19, x14]\n" + "ldr x24, [x14, #0x70]\n" "fmla z29.s, p3/M, z3.s, z13.s\n" - "prfm pldl1keep, [x24, x14]\n" + "ldr x9, [x14, #0x88]\n" "fmla z28.s, p3/M, z2.s, z13.s\n" - "ldr x23, [x15, #0x58]\n" + "ldr x21, [x16, #0x8]\n" "fmla z27.s, p3/M, z1.s, z13.s\n" - "ldr x22, [x15, #0x60]\n" + "ldr x20, [x16, #0x10]\n" "fmla z26.s, p3/M, z0.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x26, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z23.s, p3/M, z8.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x25, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x10, x13, LSL #2]\n" "fmla z31.s, p3/M, z7.s, z11.s\n" - "prfm pldl1keep, [x23, x14]\n" + "ldr x23, [x14, #0x78]\n" "fmla z30.s, p3/M, z6.s, z11.s\n" - "prfm pldl1keep, [x22, x14]\n" + "ldr x10, [x14, #0x80]\n" "fmla z28.s, p3/M, z4.s, z11.s\n" - "ldr x21, [x15, #0x68]\n" + "ldr x19, [x16, #0x18]\n" "fmla z27.s, p3/M, z3.s, z11.s\n" - "ldr x20, [x15, #0x70]\n" "fmla z25.s, p3/M, z1.s, z11.s\n" - "ldr x19, [x15, #0x78]\n" "fmla z24.s, p3/M, z0.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x28, x13, LSL #2]\n" "fmla z31.s, p3/M, z1.s, z13.s\n" - "prfm pldl1keep, [x21, x14]\n" + "ldr x28, [x14, #0x90]\n" "fmla z30.s, p3/M, z0.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x27, x13, LSL #2]\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "prfm pldl1keep, [x20, x14]\n" + "ldr x27, [x14, #0x98]\n" "fmla z27.s, p3/M, z5.s, z10.s\n" - "prfm pldl1keep, [x19, x14]\n" "fmla z26.s, p3/M, z4.s, z10.s\n" - "ldr x10, [x15, #0x80]\n" "fmla z30.s, p3/M, z2.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z29.s, p3/M, z7.s, z10.s\n" - "ldr x22, [x15, #0x88]\n" + "ldr x26, [x14, #0xa0]\n" "fmla z24.s, p3/M, z2.s, z10.s\n" - "prfm pldl1keep, [x10, x14]\n" "fmla z23.s, p3/M, z1.s, z10.s\n" - "ldr x9, [x15, #0x90]\n" "fmla z30.s, p3/M, z8.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x21, x13, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z31.s, p3/M, z3.s, z11.s\n" - "prfm pldl1keep, [x22, x14]\n" + "ldr x25, [x14, #0xa8]\n" "fmla z28.s, p3/M, z0.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x20, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z29.s, p3/M, z5.s, z13.s\n" - "prfm pldl1keep, [x9, x14]\n" + "ldr x24, [x14, #0xb0]\n" "fmla z26.s, p3/M, z2.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x19, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z25.s, p3/M, z3.s, z12.s\n" - "ldr x28, [x15, #0x98]\n" + "ldr x23, [x14, #0xb8]\n" "fmla z28.s, p3/M, z6.s, z12.s\n" "ld1w { z12.s }, p2/Z, [x10, x13, LSL #2]\n" "fmla z27.s, p3/M, z7.s, z10.s\n" - "ldr x24, [x15, #0xa0]\n" + "ldr x10, [x14, #0xc0]\n" "fmla z26.s, p3/M, z6.s, z10.s\n" - "prfm pldl1keep, [x28, x14]\n" "fmla z25.s, p3/M, z5.s, z10.s\n" - "ldr x27, [x15, #0xa8]\n" "fmla z28.s, p3/M, z8.s, z10.s\n" - "prfm pldl1keep, [x24, x14]\n" "fmla z24.s, p3/M, z4.s, z10.s\n" - "ldr x23, [x15, #0xb0]\n" "fmla z23.s, p3/M, z3.s, z10.s\n" - "prfm pldl1keep, [x27, x14]\n" "fmla z26.s, p3/M, z8.s, z11.s\n" - "ldr x26, [x15, #0xb8]\n" "fmla z25.s, p3/M, z7.s, z13.s\n" - "prfm pldl1keep, [x23, x14]\n" "fmla z24.s, p3/M, z6.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x9, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x28, x13, LSL #2]\n" "fmla z23.s, p3/M, z5.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x22, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x9, x13, LSL #2]\n" "fmla z31.s, p3/M, z4.s, z12.s\n" - "prfm pldl1keep, [x26, x14]\n" "fmla z30.s, p3/M, z3.s, z12.s\n" - "ldr x25, [x15, #0xc0]\n" "fmla z28.s, p3/M, z1.s, z12.s\n" - "ldr x22, [x17, #0x0]\n" "fmla z27.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x28, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x27, x13, LSL #2]\n" "fmla z29.s, p3/M, z4.s, z11.s\n" - "prfm pldl1keep, [x25, x14]\n" "fmla z30.s, p3/M, z5.s, z11.s\n" - "ldr x21, [x17, #0x8]\n" "fmla z26.s, p3/M, z1.s, z11.s\n" - "ldr x20, [x17, #0x10]\n" "fmla z27.s, p3/M, z2.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x24, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x26, x13, LSL #2]\n" "fmla z24.s, p3/M, z8.s, z13.s\n" - "ldr x19, [x17, #0x18]\n" "fmla z23.s, p3/M, z7.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x27, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" "fmla z28.s, p3/M, z7.s, z12.s\n" "fmla z27.s, p3/M, z6.s, z12.s\n" "fmla z25.s, p3/M, z4.s, z12.s\n" "fmla z24.s, p3/M, z3.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x23, x13, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x24, x13, LSL #2]\n" "fmla z31.s, p3/M, z2.s, z11.s\n" "fmla z30.s, p3/M, z1.s, z11.s\n" "fmla z29.s, p3/M, z0.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x26, x13, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x23, x13, LSL #2]\n" "fmla z27.s, p3/M, z8.s, z13.s\n" "fmla z26.s, p3/M, z7.s, z13.s\n" "fmla z24.s, p3/M, z5.s, z13.s\n" "fmla z23.s, p3/M, z4.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x25, x13, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x10, x13, LSL #2]\n" "fmla z31.s, p3/M, z6.s, z12.s\n" "fmla z28.s, p3/M, z3.s, z12.s\n" "fmla z25.s, p3/M, z0.s, z12.s\n" @@ -510,21 +440,21 @@ void sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl( "st1w { z31.s }, p0, [x22, x11, LSL #2]\n" "fmin z30.s, p3/M, z30.s, z17.s\n" "fmin z29.s, p3/M, z29.s, z17.s\n" - "ldr x22, [x17, #0x20]\n" + "ldr x22, [x16, #0x20]\n" "fmax z28.s, p3/M, z28.s, z18.s\n" "st1w { z30.s }, p0, [x21, x11, LSL #2]\n" "fmax z27.s, p3/M, z27.s, z18.s\n" "fmax z26.s, p3/M, z26.s, z18.s\n" "st1w { z29.s }, p0, [x20, x11, LSL #2]\n" "fmin z28.s, p3/M, z28.s, z17.s\n" - "ldr x21, [x17, #0x28]\n" + "ldr x21, [x16, #0x28]\n" "fmax z25.s, p3/M, z25.s, z18.s\n" - "ldr x20, [x17, #0x30]\n" + "ldr x20, [x16, #0x30]\n" "fmax z24.s, p3/M, z24.s, z18.s\n" "st1w { z28.s }, p0, [x19, x11, LSL #2]\n" "fmin z27.s, p3/M, z27.s, z17.s\n" "fmin z26.s, p3/M, z26.s, z17.s\n" - "ldr x19, [x17, #0x38]\n" + "ldr x19, [x16, #0x38]\n" "fmin z25.s, p3/M, z25.s, z17.s\n" "st1w { z27.s }, p0, [x22, x11, LSL #2]\n" "fmin z24.s, p3/M, z24.s, z17.s\n" @@ -533,15 +463,15 @@ void sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl( "st1w { z25.s }, p0, [x20, x11, LSL #2]\n" "fmin z23.s, p3/M, z23.s, z17.s\n" "st1w { z24.s }, p0, [x19, x11, LSL #2]\n" - "ldr x22, [x17, #0x40]\n" + "ldr x22, [x16, #0x40]\n" "st1w { z23.s }, p0, [x22, x11, LSL #2]\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) - : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z16", "z17", "z18", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z16", "z17", "z18", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } } // namespace depthwise } // namespace arm_conv -#endif // defined(ARM_COMPUTE_ENABLE_SVE) +#endif // __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) |