diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp')
-rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp | 286 |
1 files changed, 143 insertions, 143 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp index e2ff9a214e..dc7a40ff54 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp @@ -22,11 +22,11 @@ * SOFTWARE. */ -#if defined(ARM_COMPUTE_ENABLE_SME2) - #include <cstddef> #include <cstdint> +#if defined(ARM_COMPUTE_ENABLE_SME2) + namespace arm_conv { namespace depthwise { @@ -93,7 +93,7 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "ptrue p3.b\n" "ldr x15, [%x[params_struct], %[offsetof_args_params]]\n" ".inst 0x25207810 // ptrue pn8.b\n" - "ld1w { z19.s }, p3/Z, [x15]\n" + "ld1w { z26.s }, p3/Z, [x15]\n" "addvl x15, x15, #1\n" "ldp x14, x13, [x20, #0x0]\n" "cntw x12\n" @@ -103,119 +103,119 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "mov x9, #0x0\n" "whilelt p2.s, XZR, %x[n_channels]\n" ".inst 0xa040c1e4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x15]\n" - "ldp x28, x27, [x16, #0x0]\n" + "ldp x28, x26, [x16, #0x0]\n" "addvl x15, x15, #4\n" "cmp x12, %x[n_channels]\n" - "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "ldp x26, x25, [x16, #0x10]\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" - "sub x24, XZR, x12\n" + "ld1rw { z25.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "ldp x25, x24, [x16, #0x10]\n" + "ld1rw { z24.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "sub x27, XZR, x12\n" "ldp x23, x22, [x16, #0x20]\n" "ld1w { z8.s }, p3/Z, [x15]\n" "addvl x15, x15, #1\n" "ldp x21, x20, [x16, #0x30]\n" "ld1w { z9.s }, p2/Z, [x28, x9, LSL #2]\n" - "ld1w { z10.s }, p2/Z, [x27, x9, LSL #2]\n" - "ld1w { z11.s }, p2/Z, [x26, x9, LSL #2]\n" - "ld1w { z12.s }, p2/Z, [x25, x9, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x26, x9, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x24, x9, LSL #2]\n" "ld1w { z13.s }, p2/Z, [x23, x9, LSL #2]\n" "ld1w { z14.s }, p2/Z, [x22, x9, LSL #2]\n" "ld1w { z15.s }, p2/Z, [x21, x9, LSL #2]\n" "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n" - "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n" - "ldr x28, [x16, #0x40]\n" + "movprfx z28, z26\n fmla z28.s, p3/M, z8.s, z9.s\n" + "movprfx z29, z26\n fmla z29.s, p3/M, z6.s, z9.s\n" + "ldr x21, [x16, #0x40]\n" "whilelt p1.s, x12, %x[n_channels]\n" "fmla z28.s, p3/M, z0.s, z10.s\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "ldr x27, [x16, #0x48]\n" - "ld1w { z12.s }, p2/Z, [x27, x9, LSL #2]\n" + "ldr x20, [x16, #0x48]\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" "fmla z28.s, p3/M, z1.s, z11.s\n" "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x28, x9, LSL #2]\n" - "ldr x26, [x16, #0x50]\n" + "ld1w { z22.s }, p2/Z, [x21, x9, LSL #2]\n" + "ldr x20, [x16, #0x50]\n" "fmla z28.s, p3/M, z3.s, z14.s\n" "fmla z29.s, p3/M, z0.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x26, x9, LSL #2]\n" - "ldr x25, [x16, #0x58]\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x20, [x16, #0x58]\n" "fmla z28.s, p3/M, z4.s, z15.s\n" - "fmla z29.s, p3/M, z4.s, z11.s\n" - "ldr x20, [x16, #0x78]\n" - "ld1w { z14.s }, p2/Z, [x25, x9, LSL #2]\n" + "fmla z29.s, p3/M, z4.s, z22.s\n" + "ldr x21, [x16, #0x78]\n" + "ld1w { z23.s }, p2/Z, [x20, x9, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z16.s\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "ldr x23, [x16, #0x60]\n" - "ld1w { z15.s }, p2/Z, [x23, x9, LSL #2]\n" - "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n" - "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ldr x28, [x16, #0x80]\n" - "ld1w { z12.s }, p2/Z, [x28, x9, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z13.s\n" - "fmla z29.s, p3/M, z3.s, z13.s\n" + "fmla z29.s, p3/M, z5.s, z18.s\n" + "ldr x20, [x16, #0x60]\n" "ld1w { z13.s }, p2/Z, [x20, x9, LSL #2]\n" - "ldr x22, [x16, #0x68]\n" - "fmla z30.s, p3/M, z3.s, z14.s\n" - "fmla z31.s, p3/M, z4.s, z13.s\n" - "ldr x27, [x16, #0x88]\n" - "ld1w { z11.s }, p2/Z, [x22, x9, LSL #2]\n" - "fmla z30.s, p3/M, z0.s, z15.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x27, x9, LSL #2]\n" + "movprfx z30, z26\n fmla z30.s, p3/M, z2.s, z9.s\n" + "movprfx z31, z26\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ldr x20, [x16, #0x80]\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z28.s, p3/M, z5.s, z17.s\n" + "fmla z29.s, p3/M, z3.s, z17.s\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "ldr x21, [x16, #0x68]\n" + "fmla z30.s, p3/M, z3.s, z23.s\n" + "fmla z31.s, p3/M, z4.s, z16.s\n" + "ldr x20, [x16, #0x88]\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "fmla z30.s, p3/M, z0.s, z13.s\n" + "fmla z31.s, p3/M, z1.s, z18.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" "ldr x21, [x16, #0x70]\n" - "ldr x25, [x16, #0x98]\n" - "fmla z30.s, p3/M, z4.s, z11.s\n" - "fmla z31.s, p3/M, z5.s, z14.s\n" + "ldr x20, [x16, #0x98]\n" + "fmla z30.s, p3/M, z4.s, z17.s\n" + "fmla z31.s, p3/M, z5.s, z16.s\n" "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z15.s\n" - "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n" - "ldr x26, [x16, #0x90]\n" + "fmla z28.s, p3/M, z6.s, z13.s\n" + "ld1w { z4.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x16, #0x90]\n" "fmla z30.s, p3/M, z1.s, z16.s\n" - "ldr x22, [x16, #0xa8]\n" - "fmla z31.s, p3/M, z2.s, z11.s\n" + "ldr x20, [x16, #0xa8]\n" + "fmla z31.s, p3/M, z2.s, z4.s\n" "fmla z28.s, p3/M, z7.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x26, x9, LSL #2]\n" - "ld1w { z16.s }, p2/Z, [x22, x9, LSL #2]\n" - "ldr x23, [x16, #0xa0]\n" - "fmla z30.s, p3/M, z6.s, z15.s\n" - "fmla z31.s, p3/M, z3.s, z16.s\n" - "ldr x21, [x16, #0xb0]\n" - "ld1w { z13.s }, p2/Z, [x23, x9, LSL #2]\n" - "fmla z30.s, p3/M, z7.s, z13.s\n" - "fmla z29.s, p3/M, z7.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x16, #0xa0]\n" + "fmla z30.s, p3/M, z6.s, z16.s\n" + "fmla z31.s, p3/M, z3.s, z17.s\n" + "ldr x20, [x16, #0xb0]\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z16.s\n" + "fmla z29.s, p3/M, z7.s, z18.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" "ldr x20, [x16, #0xb8]\n" - "fmla z31.s, p3/M, z7.s, z14.s\n" - "fmla z30.s, p3/M, z5.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x20, x9, LSL #2]\n" - "ldr x28, [x16, #0xc0]\n" - "fmla z31.s, p3/M, z6.s, z15.s\n" - "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x28, x9, LSL #2]\n" - "ldp x28, x27, [x16, #0x0]\n" - "fmla z30.s, p3/M, z8.s, z15.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" - "ldp x26, x25, [x16, #0x10]\n" - "ld1w { z19.s }, p3/Z, [x15]\n" + "fmla z31.s, p3/M, z7.s, z16.s\n" + "fmla z30.s, p3/M, z5.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x20, [x16, #0xc0]\n" + "fmla z31.s, p3/M, z6.s, z17.s\n" + "fmla z29.s, p3/M, z8.s, z4.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldp x20, x26, [x16, #0x0]\n" + "fmla z30.s, p3/M, z8.s, z17.s\n" + "fmla z31.s, p3/M, z8.s, z16.s\n" + "ldp x25, x24, [x16, #0x10]\n" + "ld1w { z26.s }, p3/Z, [x15]\n" "addvl x15, x15, #1\n" "incw x9\n" "ldp x23, x22, [x16, #0x20]\n" - "ld1w { z9.s }, p1/Z, [x28, x12, LSL #2]\n" - "incw x24\n" + "ld1w { z9.s }, p1/Z, [x20, x12, LSL #2]\n" + "incw x27\n" "mov p0.b, p2.b\n" "ldp x21, x20, [x16, #0x30]\n" - "ld1w { z10.s }, p1/Z, [x27, x12, LSL #2]\n" + "ld1w { z10.s }, p1/Z, [x26, x12, LSL #2]\n" "whilelt p2.s, x9, %x[n_channels]\n" - ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n" - "ld1w { z11.s }, p1/Z, [x26, x12, LSL #2]\n" - "st1w { z28.s }, p0, [x14, x24, LSL #2]\n" - "ld1w { z12.s }, p1/Z, [x25, x12, LSL #2]\n" - "st1w { z29.s }, p0, [x13, x24, LSL #2]\n" + ".inst 0xc1b8cb3c // fclamp { z28.s-z31.s }, z25.s, z24.s\n" + "ld1w { z11.s }, p1/Z, [x25, x12, LSL #2]\n" + "st1w { z28.s }, p0, [x14, x27, LSL #2]\n" + "ld1w { z12.s }, p1/Z, [x24, x12, LSL #2]\n" + "st1w { z29.s }, p0, [x13, x27, LSL #2]\n" "ld1w { z13.s }, p1/Z, [x23, x12, LSL #2]\n" - "st1w { z30.s }, p0, [x11, x24, LSL #2]\n" + "st1w { z30.s }, p0, [x11, x27, LSL #2]\n" "ld1w { z14.s }, p1/Z, [x22, x12, LSL #2]\n" - "st1w { z31.s }, p0, [x10, x24, LSL #2]\n" + "st1w { z31.s }, p0, [x10, x27, LSL #2]\n" "ld1w { z15.s }, p1/Z, [x21, x12, LSL #2]\n" "ld1w { z16.s }, p1/Z, [x20, x12, LSL #2]\n" "incw x12\n" @@ -228,83 +228,83 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( "addvl x15, x15, #1\n" "blt 1b\n" "2:" // Channel tail - "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n" - "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n" - "ldr x28, [x16, #0x40]\n" - "incw x24\n" + "movprfx z28, z26\n fmla z28.s, p3/M, z8.s, z9.s\n" + "movprfx z29, z26\n fmla z29.s, p3/M, z6.s, z9.s\n" + "ldr x21, [x16, #0x40]\n" + "incw x27\n" "fmla z28.s, p3/M, z0.s, z10.s\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "ldr x27, [x16, #0x48]\n" - "ld1w { z12.s }, p2/Z, [x27, x9, LSL #2]\n" + "ldr x20, [x16, #0x48]\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" "fmla z28.s, p3/M, z1.s, z11.s\n" "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x28, x9, LSL #2]\n" - "ldr x26, [x16, #0x50]\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "ldr x20, [x16, #0x50]\n" "fmla z28.s, p3/M, z3.s, z14.s\n" "fmla z29.s, p3/M, z0.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x26, x9, LSL #2]\n" - "ldr x25, [x16, #0x58]\n" + "ld1w { z20.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x20, [x16, #0x58]\n" "fmla z28.s, p3/M, z4.s, z15.s\n" - "fmla z29.s, p3/M, z4.s, z11.s\n" - "ldr x20, [x16, #0x78]\n" - "ld1w { z14.s }, p2/Z, [x25, x9, LSL #2]\n" + "fmla z29.s, p3/M, z4.s, z17.s\n" + "ldr x21, [x16, #0x78]\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" "fmla z28.s, p3/M, z2.s, z16.s\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "ldr x23, [x16, #0x60]\n" - "ld1w { z15.s }, p2/Z, [x23, x9, LSL #2]\n" - "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n" - "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ldr x28, [x16, #0x80]\n" - "ld1w { z12.s }, p2/Z, [x28, x9, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z13.s\n" - "fmla z29.s, p3/M, z3.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x20, x9, LSL #2]\n" - "ldr x22, [x16, #0x68]\n" - "fmla z30.s, p3/M, z3.s, z14.s\n" - "fmla z31.s, p3/M, z4.s, z13.s\n" - "ldr x27, [x16, #0x88]\n" - "ld1w { z11.s }, p2/Z, [x22, x9, LSL #2]\n" - "fmla z30.s, p3/M, z0.s, z15.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x27, x9, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z18.s\n" + "ldr x20, [x16, #0x60]\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "movprfx z30, z26\n fmla z30.s, p3/M, z2.s, z9.s\n" + "movprfx z31, z26\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ldr x20, [x16, #0x80]\n" + "ld1w { z19.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z28.s, p3/M, z5.s, z20.s\n" + "fmla z29.s, p3/M, z3.s, z20.s\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "ldr x21, [x16, #0x68]\n" + "fmla z30.s, p3/M, z3.s, z17.s\n" + "fmla z31.s, p3/M, z4.s, z16.s\n" + "ldr x20, [x16, #0x88]\n" + "ld1w { z17.s }, p2/Z, [x21, x9, LSL #2]\n" + "fmla z30.s, p3/M, z0.s, z18.s\n" + "fmla z31.s, p3/M, z1.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" "ldr x21, [x16, #0x70]\n" - "ldr x25, [x16, #0x98]\n" - "fmla z30.s, p3/M, z4.s, z11.s\n" - "fmla z31.s, p3/M, z5.s, z14.s\n" + "ldr x20, [x16, #0x98]\n" + "fmla z30.s, p3/M, z4.s, z17.s\n" + "fmla z31.s, p3/M, z5.s, z16.s\n" "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z15.s\n" - "ld1w { z11.s }, p2/Z, [x25, x9, LSL #2]\n" - "ldr x26, [x16, #0x90]\n" + "fmla z28.s, p3/M, z6.s, z18.s\n" + "ld1w { z18.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x16, #0x90]\n" "fmla z30.s, p3/M, z1.s, z16.s\n" - "ldr x22, [x16, #0xa8]\n" - "fmla z31.s, p3/M, z2.s, z11.s\n" + "ldr x20, [x16, #0xa8]\n" + "fmla z31.s, p3/M, z2.s, z18.s\n" "fmla z28.s, p3/M, z7.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x26, x9, LSL #2]\n" - "ld1w { z16.s }, p2/Z, [x22, x9, LSL #2]\n" - "ldr x23, [x16, #0xa0]\n" - "fmla z30.s, p3/M, z6.s, z15.s\n" - "fmla z31.s, p3/M, z3.s, z16.s\n" - "ldr x21, [x16, #0xb0]\n" - "ld1w { z13.s }, p2/Z, [x23, x9, LSL #2]\n" - "fmla z30.s, p3/M, z7.s, z13.s\n" - "fmla z29.s, p3/M, z7.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x21, [x16, #0xa0]\n" + "fmla z30.s, p3/M, z6.s, z16.s\n" + "fmla z31.s, p3/M, z3.s, z17.s\n" + "ldr x20, [x16, #0xb0]\n" + "ld1w { z16.s }, p2/Z, [x21, x9, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z16.s\n" + "fmla z29.s, p3/M, z7.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" "ldr x20, [x16, #0xb8]\n" - "fmla z31.s, p3/M, z7.s, z14.s\n" - "fmla z30.s, p3/M, z5.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x20, x9, LSL #2]\n" - "ldr x28, [x16, #0xc0]\n" - "fmla z31.s, p3/M, z6.s, z15.s\n" - "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x28, x9, LSL #2]\n" - "fmla z30.s, p3/M, z8.s, z15.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" + "fmla z31.s, p3/M, z7.s, z16.s\n" + "fmla z30.s, p3/M, z5.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x20, x9, LSL #2]\n" + "ldr x20, [x16, #0xc0]\n" + "fmla z31.s, p3/M, z6.s, z17.s\n" + "fmla z29.s, p3/M, z8.s, z18.s\n" + "ld1w { z16.s }, p2/Z, [x20, x9, LSL #2]\n" + "fmla z30.s, p3/M, z8.s, z17.s\n" + "fmla z31.s, p3/M, z8.s, z16.s\n" "mov p0.b, p2.b\n" - ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n" - "st1w { z28.s }, p0, [x14, x24, LSL #2]\n" - "st1w { z29.s }, p0, [x13, x24, LSL #2]\n" - "st1w { z30.s }, p0, [x11, x24, LSL #2]\n" - "st1w { z31.s }, p0, [x10, x24, LSL #2]\n" + ".inst 0xc1b8cb3c // fclamp { z28.s-z31.s }, z25.s, z24.s\n" + "st1w { z28.s }, p0, [x14, x27, LSL #2]\n" + "st1w { z29.s }, p0, [x13, x27, LSL #2]\n" + "st1w { z30.s }, p0, [x11, x27, LSL #2]\n" + "st1w { z31.s }, p0, [x10, x27, LSL #2]\n" ".inst 0xd503467f // SMSTOP\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) |