diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp | 184 |
1 files changed, 92 insertions, 92 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp index f7f67855c1..066b935486 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp @@ -22,11 +22,11 @@ * SOFTWARE. */ -#if defined(ARM_COMPUTE_ENABLE_SME2) - #include <cstddef> #include <cstdint> +#if defined(ARM_COMPUTE_ENABLE_SME2) + namespace arm_conv { namespace depthwise { @@ -170,7 +170,7 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "ldr x22, [%x[params_struct], %[offsetof_args_ld_output_row]]\n" "mul x21, x2, x22\n" // offset = tile_i * ld_output_row "mov x20, #0x2\n" - "ld1w { z19.s }, p3/Z, [x17]\n" + "ld1w { z22.s }, p3/Z, [x17]\n" "ldr x25, [%x[params_struct], %[offsetof_args_ld_output_col]]\n" "madd x21, x3, x25, x21\n" // offset += tile_j * ld_output_col "addvl x17, x17, #1\n" @@ -178,13 +178,13 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "ldr x24, [%x[params_struct], %[offsetof_args_outptr]]\n" "mul x21, x21, x20\n" // offset *= output_tile_size "cntw x23\n" - "ld1rw { z18.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "ld1rw { z26.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" "addvl x17, x17, #4\n" "add x24, x24, x21, LSL #2\n" // outptrs[0] += offset * sizeof(float) ".inst 0xa040c224 // ld1w { z4.s-z7.s }, pn8.b/Z, [x17]\n" "whilelt p2.s, XZR, %x[n_channels]\n" "addvl x17, x17, #4\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "ld1rw { z24.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" "cmp x23, %x[n_channels]\n" "add x22, x24, x22, LSL #2\n" "ld1w { z8.s }, p3/Z, [x17]\n" @@ -201,73 +201,73 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "ld1w { z16.s }, p2/Z, [x5, x8, LSL #2]\n" "bge 4f\n" "3:" // Tile loop: Channel loop - "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n" - "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n" + "movprfx z28, z22\n fmla z28.s, p3/M, z8.s, z9.s\n" + "movprfx z29, z22\n fmla z29.s, p3/M, z6.s, z9.s\n" "whilelt p1.s, x23, %x[n_channels]\n" "incw x21\n" "fmla z28.s, p3/M, z0.s, z10.s\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x6, x13, LSL #2]\n" + "ld1w { z18.s }, p2/Z, [x6, x13, LSL #2]\n" "incw x23\n" "fmla z28.s, p3/M, z1.s, z11.s\n" "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x6, x15, LSL #2]\n" + "ld1w { z27.s }, p2/Z, [x6, x15, LSL #2]\n" "mov p0.b, p2.b\n" "fmla z28.s, p3/M, z3.s, z14.s\n" "fmla z29.s, p3/M, z0.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x6, x8, LSL #2]\n" + "ld1w { z17.s }, p2/Z, [x6, x8, LSL #2]\n" "addvl x5, x5, #1\n" "fmla z28.s, p3/M, z4.s, z15.s\n" - "fmla z29.s, p3/M, z4.s, z11.s\n" - "ld1w { z14.s }, p2/Z, [x16]\n" + "fmla z29.s, p3/M, z4.s, z27.s\n" + "ld1w { z25.s }, p2/Z, [x16]\n" "addvl x6, x6, #1\n" "fmla z28.s, p3/M, z2.s, z16.s\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "ld1w { z15.s }, p2/Z, [x7]\n" + "fmla z29.s, p3/M, z5.s, z18.s\n" + "ld1w { z12.s }, p2/Z, [x7]\n" "incw x20\n" - "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n" - "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z12.s }, p2/Z, [x7, x15, LSL #2]\n" - "fmla z28.s, p3/M, z5.s, z13.s\n" - "fmla z29.s, p3/M, z3.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x16, x15, LSL #2]\n" - "fmla z30.s, p3/M, z3.s, z14.s\n" - "fmla z31.s, p3/M, z4.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x16, x4, LSL #2]\n" - "fmla z30.s, p3/M, z0.s, z15.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x16, x13, LSL #2]\n" - "fmla z30.s, p3/M, z4.s, z11.s\n" - "fmla z31.s, p3/M, z5.s, z14.s\n" + "movprfx z30, z22\n fmla z30.s, p3/M, z2.s, z9.s\n" + "movprfx z31, z22\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z18.s }, p2/Z, [x7, x15, LSL #2]\n" + "fmla z28.s, p3/M, z5.s, z17.s\n" + "fmla z29.s, p3/M, z3.s, z17.s\n" + "ld1w { z16.s }, p2/Z, [x16, x15, LSL #2]\n" + "fmla z30.s, p3/M, z3.s, z25.s\n" + "fmla z31.s, p3/M, z4.s, z16.s\n" + "ld1w { z10.s }, p2/Z, [x16, x4, LSL #2]\n" + "fmla z30.s, p3/M, z0.s, z12.s\n" + "fmla z31.s, p3/M, z1.s, z18.s\n" + "ld1w { z16.s }, p2/Z, [x16, x13, LSL #2]\n" + "fmla z30.s, p3/M, z4.s, z10.s\n" + "fmla z31.s, p3/M, z5.s, z16.s\n" "ld1w { z16.s }, p2/Z, [x7, x4, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z15.s\n" - "ld1w { z11.s }, p2/Z, [x7, x13, LSL #2]\n" + "fmla z28.s, p3/M, z6.s, z12.s\n" + "ld1w { z22.s }, p2/Z, [x7, x13, LSL #2]\n" "fmla z30.s, p3/M, z1.s, z16.s\n" "addvl x7, x7, #1\n" - "fmla z31.s, p3/M, z2.s, z11.s\n" + "fmla z31.s, p3/M, z2.s, z22.s\n" "fmla z28.s, p3/M, z7.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x14]\n" - "ld1w { z16.s }, p2/Z, [x16, x8, LSL #2]\n" - "fmla z30.s, p3/M, z6.s, z15.s\n" - "fmla z31.s, p3/M, z3.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x14]\n" + "ld1w { z17.s }, p2/Z, [x16, x8, LSL #2]\n" + "fmla z30.s, p3/M, z6.s, z16.s\n" + "fmla z31.s, p3/M, z3.s, z17.s\n" "addvl x16, x16, #1\n" - "ld1w { z13.s }, p2/Z, [x14, x4, LSL #2]\n" - "fmla z30.s, p3/M, z7.s, z13.s\n" - "fmla z29.s, p3/M, z7.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x14, x15, LSL #2]\n" - "fmla z31.s, p3/M, z7.s, z14.s\n" - "fmla z30.s, p3/M, z5.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x14, x8, LSL #2]\n" - "fmla z31.s, p3/M, z6.s, z15.s\n" - "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x14, x13, LSL #2]\n" - "fmla z30.s, p3/M, z8.s, z15.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" + "ld1w { z16.s }, p2/Z, [x14, x4, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z16.s\n" + "fmla z29.s, p3/M, z7.s, z18.s\n" + "ld1w { z16.s }, p2/Z, [x14, x15, LSL #2]\n" + "fmla z31.s, p3/M, z7.s, z16.s\n" + "fmla z30.s, p3/M, z5.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x14, x8, LSL #2]\n" + "fmla z31.s, p3/M, z6.s, z17.s\n" + "fmla z29.s, p3/M, z8.s, z22.s\n" + "ld1w { z16.s }, p2/Z, [x14, x13, LSL #2]\n" + "fmla z30.s, p3/M, z8.s, z17.s\n" + "fmla z31.s, p3/M, z8.s, z16.s\n" "whilelt p2.s, x21, %x[n_channels]\n" - "ld1w { z19.s }, p3/Z, [x17]\n" + "ld1w { z22.s }, p3/Z, [x17]\n" "addvl x17, x17, #1\n" "cmp x23, %x[n_channels]\n" - ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n" + ".inst 0xc1b8cb5c // fclamp { z28.s-z31.s }, z26.s, z24.s\n" ".inst 0xa040c220 // ld1w { z0.s-z3.s }, pn8.b/Z, [x17]\n" "addvl x17, x17, #4\n" "addvl x14, x14, #1\n" @@ -291,71 +291,71 @@ void sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( "addvl x17, x17, #1\n" "blt 3b\n" "4:" // Tile loop: Channel tail - "movprfx z28, z19\n fmla z28.s, p3/M, z8.s, z9.s\n" - "movprfx z29, z19\n fmla z29.s, p3/M, z6.s, z9.s\n" + "movprfx z28, z22\n fmla z28.s, p3/M, z8.s, z9.s\n" + "movprfx z29, z22\n fmla z29.s, p3/M, z6.s, z9.s\n" "ldr x3, [%x[params_struct], %[offsetof_args_tile_j]]\n" "add x3, x3, #0x1\n" "fmla z28.s, p3/M, z0.s, z10.s\n" "fmla z29.s, p3/M, z1.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x6, x13, LSL #2]\n" + "ld1w { z18.s }, p2/Z, [x6, x13, LSL #2]\n" "ldr x2, [%x[params_struct], %[offsetof_args_tile_i]]\n" "fmla z28.s, p3/M, z1.s, z11.s\n" "fmla z29.s, p3/M, z2.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x6, x15, LSL #2]\n" + "ld1w { z17.s }, p2/Z, [x6, x15, LSL #2]\n" "ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n" "fmla z28.s, p3/M, z3.s, z14.s\n" "fmla z29.s, p3/M, z0.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x6, x8, LSL #2]\n" + "ld1w { z20.s }, p2/Z, [x6, x8, LSL #2]\n" "ldr x21, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n" "fmla z28.s, p3/M, z4.s, z15.s\n" - "fmla z29.s, p3/M, z4.s, z11.s\n" - "ld1w { z14.s }, p2/Z, [x16]\n" + "fmla z29.s, p3/M, z4.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x16]\n" "cmp x3, x20\n" "fmla z28.s, p3/M, z2.s, z16.s\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "ld1w { z15.s }, p2/Z, [x7]\n" + "fmla z29.s, p3/M, z5.s, z18.s\n" + "ld1w { z18.s }, p2/Z, [x7]\n" "add x20, x2, #0x1\n" - "movprfx z30, z19\n fmla z30.s, p3/M, z2.s, z9.s\n" - "movprfx z31, z19\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z12.s }, p2/Z, [x7, x15, LSL #2]\n" + "movprfx z30, z22\n fmla z30.s, p3/M, z2.s, z9.s\n" + "movprfx z31, z22\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z19.s }, p2/Z, [x7, x15, LSL #2]\n" "csel x2, x2, x20, LT\n" - "fmla z28.s, p3/M, z5.s, z13.s\n" - "fmla z29.s, p3/M, z3.s, z13.s\n" - "ld1w { z13.s }, p2/Z, [x16, x15, LSL #2]\n" + "fmla z28.s, p3/M, z5.s, z20.s\n" + "fmla z29.s, p3/M, z3.s, z20.s\n" + "ld1w { z16.s }, p2/Z, [x16, x15, LSL #2]\n" "mov p0.b, p2.b\n" - "fmla z30.s, p3/M, z3.s, z14.s\n" - "fmla z31.s, p3/M, z4.s, z13.s\n" - "ld1w { z11.s }, p2/Z, [x16, x4, LSL #2]\n" + "fmla z30.s, p3/M, z3.s, z17.s\n" + "fmla z31.s, p3/M, z4.s, z16.s\n" + "ld1w { z17.s }, p2/Z, [x16, x4, LSL #2]\n" "csel x3, x3, XZR, LT\n" - "fmla z30.s, p3/M, z0.s, z15.s\n" - "fmla z31.s, p3/M, z1.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x16, x13, LSL #2]\n" + "fmla z30.s, p3/M, z0.s, z18.s\n" + "fmla z31.s, p3/M, z1.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x16, x13, LSL #2]\n" "cmp x2, x21\n" - "fmla z30.s, p3/M, z4.s, z11.s\n" - "fmla z31.s, p3/M, z5.s, z14.s\n" + "fmla z30.s, p3/M, z4.s, z17.s\n" + "fmla z31.s, p3/M, z5.s, z16.s\n" "ld1w { z16.s }, p2/Z, [x7, x4, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z15.s\n" - "ld1w { z11.s }, p2/Z, [x7, x13, LSL #2]\n" + "fmla z28.s, p3/M, z6.s, z18.s\n" + "ld1w { z18.s }, p2/Z, [x7, x13, LSL #2]\n" "fmla z30.s, p3/M, z1.s, z16.s\n" - "fmla z31.s, p3/M, z2.s, z11.s\n" + "fmla z31.s, p3/M, z2.s, z18.s\n" "fmla z28.s, p3/M, z7.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x14]\n" - "ld1w { z16.s }, p2/Z, [x16, x8, LSL #2]\n" - "fmla z30.s, p3/M, z6.s, z15.s\n" - "fmla z31.s, p3/M, z3.s, z16.s\n" - "ld1w { z13.s }, p2/Z, [x14, x4, LSL #2]\n" - "fmla z30.s, p3/M, z7.s, z13.s\n" - "fmla z29.s, p3/M, z7.s, z12.s\n" - "ld1w { z14.s }, p2/Z, [x14, x15, LSL #2]\n" - "fmla z31.s, p3/M, z7.s, z14.s\n" - "fmla z30.s, p3/M, z5.s, z16.s\n" - "ld1w { z15.s }, p2/Z, [x14, x8, LSL #2]\n" - "fmla z31.s, p3/M, z6.s, z15.s\n" - "fmla z29.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x14, x13, LSL #2]\n" - "fmla z30.s, p3/M, z8.s, z15.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" - ".inst 0xc1b1ca5c // fclamp { z28.s-z31.s }, z18.s, z17.s\n" + "ld1w { z16.s }, p2/Z, [x14]\n" + "ld1w { z17.s }, p2/Z, [x16, x8, LSL #2]\n" + "fmla z30.s, p3/M, z6.s, z16.s\n" + "fmla z31.s, p3/M, z3.s, z17.s\n" + "ld1w { z16.s }, p2/Z, [x14, x4, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z16.s\n" + "fmla z29.s, p3/M, z7.s, z19.s\n" + "ld1w { z16.s }, p2/Z, [x14, x15, LSL #2]\n" + "fmla z31.s, p3/M, z7.s, z16.s\n" + "fmla z30.s, p3/M, z5.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x14, x8, LSL #2]\n" + "fmla z31.s, p3/M, z6.s, z17.s\n" + "fmla z29.s, p3/M, z8.s, z18.s\n" + "ld1w { z16.s }, p2/Z, [x14, x13, LSL #2]\n" + "fmla z30.s, p3/M, z8.s, z17.s\n" + "fmla z31.s, p3/M, z8.s, z16.s\n" + ".inst 0xc1b8cb5c // fclamp { z28.s-z31.s }, z26.s, z24.s\n" "st1w { z28.s }, p0, [x24]\n" "st1w { z29.s }, p0, [x24, x25, LSL #2]\n" "st1w { z30.s }, p0, [x22]\n" |