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Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst')
-rw-r--r--src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp192
-rw-r--r--src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp252
2 files changed, 222 insertions, 222 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
index 2ee961db15..96cfd5e497 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
@@ -22,11 +22,11 @@
* SOFTWARE.
*/
-#if defined(ARM_COMPUTE_ENABLE_SME2)
-
#include <cstddef>
#include <cstdint>
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
namespace arm_conv {
namespace depthwise {
@@ -151,7 +151,7 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"ldr x22, [%x[params_struct], %[offsetof_args_ld_output_row]]\n"
"mul x21, x4, x22\n" // offset = tile_i * ld_output_row
"mov x20, #0x2\n"
- "ld1w { z18.s }, p3/Z, [x15]\n"
+ "ld1w { z22.s }, p3/Z, [x15]\n"
"ldr x25, [%x[params_struct], %[offsetof_args_ld_output_col]]\n"
"madd x21, x5, x25, x21\n" // offset += tile_j * ld_output_col
"addvl x15, x15, #1\n"
@@ -159,13 +159,13 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"ldr x24, [%x[params_struct], %[offsetof_args_outptr]]\n"
"mul x21, x21, x20\n" // offset *= output_tile_size
"cntw x23\n"
- "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ld1rw { z21.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
"addvl x15, x15, #4\n"
"add x24, x24, x21, LSL #2\n" // outptrs[0] += offset * sizeof(float)
".inst 0xa040c1e4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x15]\n"
"whilelt p2.s, XZR, %x[n_channels]\n"
"addvl x15, x15, #4\n"
- "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "ld1rw { z14.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
"cmp x23, %x[n_channels]\n"
"add x22, x24, x22, LSL #2\n"
"ld1w { z8.s }, p3/Z, [x15]\n"
@@ -179,71 +179,71 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"ld1w { z13.s }, p2/Z, [x17, x6, LSL #2]\n"
"bge 4f\n"
"3:" // Tile loop: Channel loop
- "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
- "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "movprfx z28, z22\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z22\n fmla z29.s, p3/M, z3.s, z9.s\n"
"whilelt p1.s, x23, %x[n_channels]\n"
"incw x21\n"
- "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
- "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x14]\n"
+ "movprfx z30, z22\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z22\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z18.s }, p2/Z, [x14]\n"
"incw x23\n"
"fmla z28.s, p3/M, z0.s, z10.s\n"
"fmla z29.s, p3/M, z2.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "ld1w { z17.s }, p2/Z, [x14, x13, LSL #2]\n"
"mov p0.b, p2.b\n"
"fmla z30.s, p3/M, z2.s, z12.s\n"
"fmla z31.s, p3/M, z1.s, z12.s\n"
- "ld1w { z10.s }, p2/Z, [x17, x16, LSL #2]\n"
+ "ld1w { z16.s }, p2/Z, [x17, x16, LSL #2]\n"
"incw x20\n"
"fmla z28.s, p3/M, z5.s, z12.s\n"
"fmla z29.s, p3/M, z4.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x7, x6, LSL #2]\n"
- "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z11.s }, p2/Z, [x7, x6, LSL #2]\n"
+ "fmla z30.s, p3/M, z6.s, z18.s\n"
"fmla z31.s, p3/M, z3.s, z13.s\n"
- "ld1w { z9.s }, p2/Z, [x7, x16, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x7, x16, LSL #2]\n"
"addvl x7, x7, #1\n"
"fmla z28.s, p3/M, z7.s, z13.s\n"
"fmla z29.s, p3/M, z6.s, z13.s\n"
- "ld1w { z18.s }, p3/Z, [x15]\n"
+ "ld1w { z22.s }, p3/Z, [x15]\n"
"addvl x15, x15, #1\n"
"fmla z30.s, p3/M, z4.s, z13.s\n"
- "fmla z31.s, p3/M, z8.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x8]\n"
- "fmla z28.s, p3/M, z1.s, z12.s\n"
- "fmla z29.s, p3/M, z0.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x8, x13, LSL #2]\n"
+ "fmla z31.s, p3/M, z8.s, z17.s\n"
+ "ld1w { z9.s }, p2/Z, [x8]\n"
+ "fmla z28.s, p3/M, z1.s, z11.s\n"
+ "fmla z29.s, p3/M, z0.s, z11.s\n"
+ "ld1w { z19.s }, p2/Z, [x8, x13, LSL #2]\n"
"addvl x8, x8, #1\n"
- "fmla z30.s, p3/M, z5.s, z10.s\n"
- "fmla z31.s, p3/M, z4.s, z10.s\n"
- "fmla z28.s, p3/M, z2.s, z9.s\n"
- "fmla z29.s, p3/M, z1.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x17]\n"
- "fmla z30.s, p3/M, z0.s, z11.s\n"
- "fmla z31.s, p3/M, z2.s, z12.s\n"
- "fmla z28.s, p3/M, z8.s, z10.s\n"
- "fmla z29.s, p3/M, z7.s, z10.s\n"
- "ld1w { z10.s }, p2/Z, [x17, x13, LSL #2]\n"
+ "fmla z30.s, p3/M, z5.s, z16.s\n"
+ "fmla z31.s, p3/M, z4.s, z16.s\n"
+ "fmla z28.s, p3/M, z2.s, z10.s\n"
+ "fmla z29.s, p3/M, z1.s, z10.s\n"
+ "ld1w { z18.s }, p2/Z, [x17]\n"
+ "fmla z30.s, p3/M, z0.s, z9.s\n"
+ "fmla z31.s, p3/M, z2.s, z19.s\n"
+ "fmla z28.s, p3/M, z8.s, z16.s\n"
+ "fmla z29.s, p3/M, z7.s, z16.s\n"
+ "ld1w { z17.s }, p2/Z, [x17, x13, LSL #2]\n"
"addvl x17, x17, #1\n"
- "fmla z30.s, p3/M, z3.s, z9.s\n"
- "fmla z31.s, p3/M, z5.s, z10.s\n"
+ "fmla z30.s, p3/M, z3.s, z18.s\n"
+ "fmla z31.s, p3/M, z5.s, z17.s\n"
"ld1w { z13.s }, p1/Z, [x17, x6, LSL #2]\n"
- "fmla z28.s, p3/M, z3.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x14, x6, LSL #2]\n"
- "fmla z29.s, p3/M, z5.s, z12.s\n"
- "fmla z30.s, p3/M, z7.s, z11.s\n"
- "fmla z31.s, p3/M, z6.s, z11.s\n"
- "ld1w { z12.s }, p2/Z, [x14, x16, LSL #2]\n"
+ "fmla z28.s, p3/M, z3.s, z9.s\n"
+ "ld1w { z16.s }, p2/Z, [x14, x6, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z19.s\n"
+ "fmla z30.s, p3/M, z7.s, z16.s\n"
+ "fmla z31.s, p3/M, z6.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x14, x16, LSL #2]\n"
"whilelt p2.s, x21, %x[n_channels]\n"
- "fmla z28.s, p3/M, z6.s, z9.s\n"
- "fmla z29.s, p3/M, z8.s, z10.s\n"
+ "fmla z28.s, p3/M, z6.s, z18.s\n"
+ "fmla z29.s, p3/M, z8.s, z17.s\n"
".inst 0xa040c1e0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x15]\n"
"addvl x15, x15, #4\n"
- "fmla z30.s, p3/M, z8.s, z12.s\n"
- "fmla z31.s, p3/M, z7.s, z12.s\n"
+ "fmla z30.s, p3/M, z8.s, z16.s\n"
+ "fmla z31.s, p3/M, z7.s, z16.s\n"
".inst 0xa040c1e4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x15]\n"
"addvl x15, x15, #4\n"
"cmp x23, %x[n_channels]\n"
- ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
+ ".inst 0xc1aecabc // fclamp { z28.s-z31.s }, z21.s, z14.s\n"
"addvl x14, x14, #1\n"
"ld1w { z9.s }, p1/Z, [x8, x6, LSL #2]\n"
"ld1w { z10.s }, p1/Z, [x7]\n"
@@ -259,69 +259,69 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"addvl x15, x15, #1\n"
"blt 3b\n"
"4:" // Tile loop: Channel tail
- "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
- "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "movprfx z24, z22\n fmla z24.s, p3/M, z4.s, z9.s\n"
+ "movprfx z25, z22\n fmla z25.s, p3/M, z3.s, z9.s\n"
"ldr x5, [%x[params_struct], %[offsetof_args_tile_j]]\n"
"add x5, x5, #0x1\n"
- "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
- "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x14]\n"
+ "movprfx z26, z22\n fmla z26.s, p3/M, z1.s, z9.s\n"
+ "movprfx z27, z22\n fmla z27.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z17.s }, p2/Z, [x14]\n"
"ldr x4, [%x[params_struct], %[offsetof_args_tile_i]]\n"
- "fmla z28.s, p3/M, z0.s, z10.s\n"
- "fmla z29.s, p3/M, z2.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x14, x13, LSL #2]\n"
+ "fmla z24.s, p3/M, z0.s, z10.s\n"
+ "fmla z25.s, p3/M, z2.s, z11.s\n"
+ "ld1w { z16.s }, p2/Z, [x14, x13, LSL #2]\n"
"ldr x20, [%x[params_struct], %[offsetof_args_n_tile_cols]]\n"
- "fmla z30.s, p3/M, z2.s, z12.s\n"
- "fmla z31.s, p3/M, z1.s, z12.s\n"
- "ld1w { z10.s }, p2/Z, [x17, x16, LSL #2]\n"
+ "fmla z26.s, p3/M, z2.s, z12.s\n"
+ "fmla z27.s, p3/M, z1.s, z12.s\n"
+ "ld1w { z20.s }, p2/Z, [x17, x16, LSL #2]\n"
"ldr x21, [%x[params_struct], %[offsetof_args_n_tile_rows]]\n"
- "fmla z28.s, p3/M, z5.s, z12.s\n"
- "fmla z29.s, p3/M, z4.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x7, x6, LSL #2]\n"
+ "fmla z24.s, p3/M, z5.s, z12.s\n"
+ "fmla z25.s, p3/M, z4.s, z12.s\n"
+ "ld1w { z18.s }, p2/Z, [x7, x6, LSL #2]\n"
"cmp x5, x20\n"
- "fmla z30.s, p3/M, z6.s, z9.s\n"
- "fmla z31.s, p3/M, z3.s, z13.s\n"
- "ld1w { z9.s }, p2/Z, [x7, x16, LSL #2]\n"
+ "fmla z26.s, p3/M, z6.s, z17.s\n"
+ "fmla z27.s, p3/M, z3.s, z13.s\n"
+ "ld1w { z17.s }, p2/Z, [x7, x16, LSL #2]\n"
"add x20, x4, #0x1\n"
- "fmla z28.s, p3/M, z7.s, z13.s\n"
- "fmla z29.s, p3/M, z6.s, z13.s\n"
+ "fmla z24.s, p3/M, z7.s, z13.s\n"
+ "fmla z25.s, p3/M, z6.s, z13.s\n"
"csel x4, x4, x20, LT\n"
"mov p0.b, p2.b\n"
- "fmla z30.s, p3/M, z4.s, z13.s\n"
- "fmla z31.s, p3/M, z8.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x8]\n"
+ "fmla z26.s, p3/M, z4.s, z13.s\n"
+ "fmla z27.s, p3/M, z8.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x8]\n"
"csel x5, x5, XZR, LT\n"
- "fmla z28.s, p3/M, z1.s, z12.s\n"
- "fmla z29.s, p3/M, z0.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x8, x13, LSL #2]\n"
+ "fmla z24.s, p3/M, z1.s, z18.s\n"
+ "fmla z25.s, p3/M, z0.s, z18.s\n"
+ "ld1w { z19.s }, p2/Z, [x8, x13, LSL #2]\n"
"cmp x4, x21\n"
- "fmla z30.s, p3/M, z5.s, z10.s\n"
- "fmla z31.s, p3/M, z4.s, z10.s\n"
- "fmla z28.s, p3/M, z2.s, z9.s\n"
- "fmla z29.s, p3/M, z1.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x17]\n"
- "fmla z30.s, p3/M, z0.s, z11.s\n"
- "fmla z31.s, p3/M, z2.s, z12.s\n"
- "fmla z28.s, p3/M, z8.s, z10.s\n"
- "fmla z29.s, p3/M, z7.s, z10.s\n"
- "ld1w { z10.s }, p2/Z, [x17, x13, LSL #2]\n"
- "fmla z30.s, p3/M, z3.s, z9.s\n"
- "fmla z31.s, p3/M, z5.s, z10.s\n"
- "fmla z28.s, p3/M, z3.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x14, x6, LSL #2]\n"
- "fmla z29.s, p3/M, z5.s, z12.s\n"
- "fmla z30.s, p3/M, z7.s, z11.s\n"
- "fmla z31.s, p3/M, z6.s, z11.s\n"
- "ld1w { z12.s }, p2/Z, [x14, x16, LSL #2]\n"
- "fmla z28.s, p3/M, z6.s, z9.s\n"
- "fmla z29.s, p3/M, z8.s, z10.s\n"
- "fmla z30.s, p3/M, z8.s, z12.s\n"
- "fmla z31.s, p3/M, z7.s, z12.s\n"
- ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
- "st1w { z28.s }, p0, [x24]\n"
- "st1w { z29.s }, p0, [x24, x25, LSL #2]\n"
- "st1w { z30.s }, p0, [x22]\n"
- "st1w { z31.s }, p0, [x22, x25, LSL #2]\n"
+ "fmla z26.s, p3/M, z5.s, z20.s\n"
+ "fmla z27.s, p3/M, z4.s, z20.s\n"
+ "fmla z24.s, p3/M, z2.s, z17.s\n"
+ "fmla z25.s, p3/M, z1.s, z17.s\n"
+ "ld1w { z18.s }, p2/Z, [x17]\n"
+ "fmla z26.s, p3/M, z0.s, z16.s\n"
+ "fmla z27.s, p3/M, z2.s, z19.s\n"
+ "fmla z24.s, p3/M, z8.s, z20.s\n"
+ "fmla z25.s, p3/M, z7.s, z20.s\n"
+ "ld1w { z17.s }, p2/Z, [x17, x13, LSL #2]\n"
+ "fmla z26.s, p3/M, z3.s, z18.s\n"
+ "fmla z27.s, p3/M, z5.s, z17.s\n"
+ "fmla z24.s, p3/M, z3.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x14, x6, LSL #2]\n"
+ "fmla z25.s, p3/M, z5.s, z19.s\n"
+ "fmla z26.s, p3/M, z7.s, z16.s\n"
+ "fmla z27.s, p3/M, z6.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x14, x16, LSL #2]\n"
+ "fmla z24.s, p3/M, z6.s, z18.s\n"
+ "fmla z25.s, p3/M, z8.s, z17.s\n"
+ "fmla z26.s, p3/M, z8.s, z16.s\n"
+ "fmla z27.s, p3/M, z7.s, z16.s\n"
+ ".inst 0xc1aecab8 // fclamp { z24.s-z27.s }, z21.s, z14.s\n"
+ "st1w { z24.s }, p0, [x24]\n"
+ "st1w { z25.s }, p0, [x24, x25, LSL #2]\n"
+ "st1w { z26.s }, p0, [x22]\n"
+ "st1w { z27.s }, p0, [x22, x25, LSL #2]\n"
"blt 1b\n"
".inst 0xd503467f // SMSTOP\n"
:
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp
index 079b39c5ec..39f1b3635f 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp
@@ -22,11 +22,11 @@
* SOFTWARE.
*/
-#if defined(ARM_COMPUTE_ENABLE_SME2)
-
#include <cstddef>
#include <cstdint>
+#if defined(ARM_COMPUTE_ENABLE_SME2)
+
namespace arm_conv {
namespace depthwise {
@@ -84,7 +84,7 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl(
"ptrue p3.b\n"
"ldr x14, [%x[params_struct], %[offsetof_args_params]]\n"
".inst 0x25207810 // ptrue pn8.b\n"
- "ld1w { z18.s }, p3/Z, [x14]\n"
+ "ld1w { z23.s }, p3/Z, [x14]\n"
"addvl x14, x14, #1\n"
"ldp x13, x12, [x20, #0x0]\n"
"cntw x11\n"
@@ -94,176 +94,176 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl(
"mov x28, #0x0\n"
"whilelt p2.s, XZR, %x[n_channels]\n"
".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n"
- "ldp x27, x26, [x15, #0x0]\n"
+ "ldp x24, x23, [x15, #0x0]\n"
"addvl x14, x14, #4\n"
"cmp x11, %x[n_channels]\n"
- "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
- "ldp x25, x22, [x15, #0x10]\n"
- "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
- "sub x24, XZR, x11\n"
- "ldr x23, [x15, #0x20]\n"
+ "ld1rw { z22.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n"
+ "ldp x22, x21, [x15, #0x10]\n"
+ "ld1rw { z15.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n"
+ "sub x27, XZR, x11\n"
+ "ldr x20, [x15, #0x20]\n"
"ld1w { z8.s }, p3/Z, [x14]\n"
"addvl x14, x14, #1\n"
- "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n"
- "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n"
- "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
- "ld1w { z12.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ld1w { z13.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "ld1w { z9.s }, p2/Z, [x24, x28, LSL #2]\n"
+ "ld1w { z10.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "ld1w { z11.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "ld1w { z12.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ld1w { z13.s }, p2/Z, [x20, x28, LSL #2]\n"
"bge 2f\n"
"1:" // Channel loop
- "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
- "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
- "ldr x22, [x15, #0x28]\n"
+ "movprfx z28, z23\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z23\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "ldr x20, [x15, #0x28]\n"
"whilelt p1.s, x11, %x[n_channels]\n"
- "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
- "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ldr x21, [x15, #0x30]\n"
+ "movprfx z30, z23\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z23\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z19.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x30]\n"
"fmla z28.s, p3/M, z0.s, z10.s\n"
"fmla z29.s, p3/M, z2.s, z11.s\n"
- "ldr x20, [x15, #0x38]\n"
- "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x21, [x15, #0x38]\n"
+ "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n"
"fmla z30.s, p3/M, z2.s, z12.s\n"
"fmla z31.s, p3/M, z1.s, z12.s\n"
- "ldr x26, [x15, #0x48]\n"
- "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x48]\n"
+ "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n"
"fmla z28.s, p3/M, z5.s, z12.s\n"
"fmla z29.s, p3/M, z4.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n"
- "ldr x27, [x15, #0x40]\n"
- "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z16.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x40]\n"
+ "fmla z30.s, p3/M, z6.s, z19.s\n"
"fmla z31.s, p3/M, z3.s, z13.s\n"
- "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n"
- "ldr x25, [x15, #0x50]\n"
+ "ld1w { z25.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x21, [x15, #0x50]\n"
"fmla z28.s, p3/M, z7.s, z13.s\n"
"fmla z29.s, p3/M, z6.s, z13.s\n"
- "ldr x22, [x15, #0x58]\n"
- "ld1w { z18.s }, p3/Z, [x14]\n"
+ "ldr x20, [x15, #0x58]\n"
+ "ld1w { z23.s }, p3/Z, [x14]\n"
"fmla z30.s, p3/M, z4.s, z13.s\n"
- "fmla z31.s, p3/M, z8.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
- "ldr x23, [x15, #0x60]\n"
- "fmla z28.s, p3/M, z1.s, z12.s\n"
- "fmla z29.s, p3/M, z0.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ldr x22, [x15, #0x68]\n"
- "fmla z30.s, p3/M, z5.s, z10.s\n"
- "fmla z31.s, p3/M, z4.s, z10.s\n"
- "ldr x21, [x15, #0x70]\n"
+ "fmla z31.s, p3/M, z8.s, z18.s\n"
+ "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x21, [x15, #0x60]\n"
+ "fmla z28.s, p3/M, z1.s, z16.s\n"
+ "fmla z29.s, p3/M, z0.s, z16.s\n"
+ "ld1w { z19.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x68]\n"
+ "fmla z30.s, p3/M, z5.s, z17.s\n"
+ "fmla z31.s, p3/M, z4.s, z17.s\n"
+ "ldr x26, [x15, #0x70]\n"
"addvl x14, x14, #1\n"
- "fmla z28.s, p3/M, z2.s, z9.s\n"
- "fmla z29.s, p3/M, z1.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x23, x28, LSL #2]\n"
- "ldr x20, [x15, #0x78]\n"
+ "fmla z28.s, p3/M, z2.s, z25.s\n"
+ "fmla z29.s, p3/M, z1.s, z25.s\n"
+ "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x25, [x15, #0x78]\n"
"fmla z30.s, p3/M, z0.s, z11.s\n"
- "fmla z31.s, p3/M, z2.s, z12.s\n"
- "ldp x27, x26, [x15, #0x0]\n"
- "incw x24\n"
- "fmla z28.s, p3/M, z8.s, z10.s\n"
- "fmla z29.s, p3/M, z7.s, z10.s\n"
- "ld1w { z10.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ldp x25, x22, [x15, #0x10]\n"
- "fmla z30.s, p3/M, z3.s, z9.s\n"
- "fmla z31.s, p3/M, z5.s, z10.s\n"
- "ldr x23, [x15, #0x20]\n"
- "ld1w { z13.s }, p1/Z, [x23, x11, LSL #2]\n"
+ "fmla z31.s, p3/M, z2.s, z19.s\n"
+ "ldp x24, x23, [x15, #0x0]\n"
+ "incw x27\n"
+ "fmla z28.s, p3/M, z8.s, z17.s\n"
+ "fmla z29.s, p3/M, z7.s, z17.s\n"
+ "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldp x22, x21, [x15, #0x10]\n"
+ "fmla z30.s, p3/M, z3.s, z18.s\n"
+ "fmla z31.s, p3/M, z5.s, z17.s\n"
+ "ldr x20, [x15, #0x20]\n"
+ "ld1w { z13.s }, p1/Z, [x20, x11, LSL #2]\n"
"fmla z28.s, p3/M, z3.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
- "fmla z29.s, p3/M, z5.s, z12.s\n"
+ "ld1w { z16.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z19.s\n"
"mov p0.b, p2.b\n"
- "fmla z30.s, p3/M, z7.s, z11.s\n"
- "fmla z31.s, p3/M, z6.s, z11.s\n"
- "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z7.s, z16.s\n"
+ "fmla z31.s, p3/M, z6.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x25, x28, LSL #2]\n"
"incw x28\n"
- "fmla z28.s, p3/M, z6.s, z9.s\n"
- "fmla z29.s, p3/M, z8.s, z10.s\n"
- "ld1w { z9.s }, p1/Z, [x27, x11, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z18.s\n"
+ "fmla z29.s, p3/M, z8.s, z17.s\n"
+ "ld1w { z9.s }, p1/Z, [x24, x11, LSL #2]\n"
"whilelt p2.s, x28, %x[n_channels]\n"
- "fmla z30.s, p3/M, z8.s, z12.s\n"
- "fmla z31.s, p3/M, z7.s, z12.s\n"
- "ld1w { z10.s }, p1/Z, [x26, x11, LSL #2]\n"
- "ld1w { z11.s }, p1/Z, [x25, x11, LSL #2]\n"
- ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
- "st1w { z28.s }, p0, [x13, x24, LSL #2]\n"
- "ld1w { z12.s }, p1/Z, [x22, x11, LSL #2]\n"
+ "fmla z30.s, p3/M, z8.s, z16.s\n"
+ "fmla z31.s, p3/M, z7.s, z16.s\n"
+ "ld1w { z10.s }, p1/Z, [x23, x11, LSL #2]\n"
+ "ld1w { z11.s }, p1/Z, [x22, x11, LSL #2]\n"
+ ".inst 0xc1afcadc // fclamp { z28.s-z31.s }, z22.s, z15.s\n"
+ "st1w { z28.s }, p0, [x13, x27, LSL #2]\n"
+ "ld1w { z12.s }, p1/Z, [x21, x11, LSL #2]\n"
"incw x11\n"
"cmp x11, %x[n_channels]\n"
- "st1w { z29.s }, p0, [x12, x24, LSL #2]\n"
+ "st1w { z29.s }, p0, [x12, x27, LSL #2]\n"
".inst 0xa040c1c0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x14]\n"
"addvl x14, x14, #4\n"
- "st1w { z30.s }, p0, [x10, x24, LSL #2]\n"
+ "st1w { z30.s }, p0, [x10, x27, LSL #2]\n"
".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n"
"addvl x14, x14, #4\n"
- "st1w { z31.s }, p0, [x9, x24, LSL #2]\n"
+ "st1w { z31.s }, p0, [x9, x27, LSL #2]\n"
"ld1w { z8.s }, p3/Z, [x14]\n"
"addvl x14, x14, #1\n"
"blt 1b\n"
"2:" // Channel tail
- "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n"
- "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n"
- "ldr x22, [x15, #0x28]\n"
- "incw x24\n"
- "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n"
- "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x22, x28, LSL #2]\n"
- "ldr x21, [x15, #0x30]\n"
+ "movprfx z28, z23\n fmla z28.s, p3/M, z4.s, z9.s\n"
+ "movprfx z29, z23\n fmla z29.s, p3/M, z3.s, z9.s\n"
+ "ldr x20, [x15, #0x28]\n"
+ "incw x27\n"
+ "movprfx z30, z23\n fmla z30.s, p3/M, z1.s, z9.s\n"
+ "movprfx z31, z23\n fmla z31.s, p3/M, z0.s, z9.s\n"
+ "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x30]\n"
"fmla z28.s, p3/M, z0.s, z10.s\n"
"fmla z29.s, p3/M, z2.s, z11.s\n"
- "ldr x20, [x15, #0x38]\n"
- "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x21, [x15, #0x38]\n"
+ "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n"
"fmla z30.s, p3/M, z2.s, z12.s\n"
"fmla z31.s, p3/M, z1.s, z12.s\n"
- "ldr x26, [x15, #0x48]\n"
- "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x48]\n"
+ "ld1w { z20.s }, p2/Z, [x20, x28, LSL #2]\n"
"fmla z28.s, p3/M, z5.s, z12.s\n"
"fmla z29.s, p3/M, z4.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n"
- "ldr x27, [x15, #0x40]\n"
- "fmla z30.s, p3/M, z6.s, z9.s\n"
+ "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x40]\n"
+ "fmla z30.s, p3/M, z6.s, z17.s\n"
"fmla z31.s, p3/M, z3.s, z13.s\n"
- "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n"
- "ldr x25, [x15, #0x50]\n"
+ "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x50]\n"
"fmla z28.s, p3/M, z7.s, z13.s\n"
"fmla z29.s, p3/M, z6.s, z13.s\n"
- "ldr x22, [x15, #0x58]\n"
+ "ldr x21, [x15, #0x58]\n"
"mov p0.b, p2.b\n"
"fmla z30.s, p3/M, z4.s, z13.s\n"
- "fmla z31.s, p3/M, z8.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n"
- "ldr x23, [x15, #0x60]\n"
- "fmla z28.s, p3/M, z1.s, z12.s\n"
- "fmla z29.s, p3/M, z0.s, z12.s\n"
- "ld1w { z12.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "fmla z31.s, p3/M, z8.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "ldr x20, [x15, #0x60]\n"
+ "fmla z28.s, p3/M, z1.s, z18.s\n"
+ "fmla z29.s, p3/M, z0.s, z18.s\n"
+ "ld1w { z19.s }, p2/Z, [x21, x28, LSL #2]\n"
"ldr x22, [x15, #0x68]\n"
- "fmla z30.s, p3/M, z5.s, z10.s\n"
- "fmla z31.s, p3/M, z4.s, z10.s\n"
+ "fmla z30.s, p3/M, z5.s, z20.s\n"
+ "fmla z31.s, p3/M, z4.s, z20.s\n"
"ldr x21, [x15, #0x70]\n"
- "fmla z28.s, p3/M, z2.s, z9.s\n"
- "fmla z29.s, p3/M, z1.s, z9.s\n"
- "ld1w { z9.s }, p2/Z, [x23, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z2.s, z17.s\n"
+ "fmla z29.s, p3/M, z1.s, z17.s\n"
+ "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n"
"ldr x20, [x15, #0x78]\n"
- "fmla z30.s, p3/M, z0.s, z11.s\n"
- "fmla z31.s, p3/M, z2.s, z12.s\n"
- "fmla z28.s, p3/M, z8.s, z10.s\n"
- "fmla z29.s, p3/M, z7.s, z10.s\n"
- "ld1w { z10.s }, p2/Z, [x22, x28, LSL #2]\n"
- "fmla z30.s, p3/M, z3.s, z9.s\n"
- "fmla z31.s, p3/M, z5.s, z10.s\n"
- "fmla z28.s, p3/M, z3.s, z11.s\n"
- "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n"
- "fmla z29.s, p3/M, z5.s, z12.s\n"
- "fmla z30.s, p3/M, z7.s, z11.s\n"
- "fmla z31.s, p3/M, z6.s, z11.s\n"
- "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n"
- "fmla z28.s, p3/M, z6.s, z9.s\n"
- "fmla z29.s, p3/M, z8.s, z10.s\n"
- "fmla z30.s, p3/M, z8.s, z12.s\n"
- "fmla z31.s, p3/M, z7.s, z12.s\n"
- ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n"
- "st1w { z28.s }, p0, [x13, x24, LSL #2]\n"
- "st1w { z29.s }, p0, [x12, x24, LSL #2]\n"
- "st1w { z30.s }, p0, [x10, x24, LSL #2]\n"
- "st1w { z31.s }, p0, [x9, x24, LSL #2]\n"
+ "fmla z30.s, p3/M, z0.s, z16.s\n"
+ "fmla z31.s, p3/M, z2.s, z19.s\n"
+ "fmla z28.s, p3/M, z8.s, z20.s\n"
+ "fmla z29.s, p3/M, z7.s, z20.s\n"
+ "ld1w { z17.s }, p2/Z, [x22, x28, LSL #2]\n"
+ "fmla z30.s, p3/M, z3.s, z18.s\n"
+ "fmla z31.s, p3/M, z5.s, z17.s\n"
+ "fmla z28.s, p3/M, z3.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x21, x28, LSL #2]\n"
+ "fmla z29.s, p3/M, z5.s, z19.s\n"
+ "fmla z30.s, p3/M, z7.s, z16.s\n"
+ "fmla z31.s, p3/M, z6.s, z16.s\n"
+ "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n"
+ "fmla z28.s, p3/M, z6.s, z18.s\n"
+ "fmla z29.s, p3/M, z8.s, z17.s\n"
+ "fmla z30.s, p3/M, z8.s, z16.s\n"
+ "fmla z31.s, p3/M, z7.s, z16.s\n"
+ ".inst 0xc1afcadc // fclamp { z28.s-z31.s }, z22.s, z15.s\n"
+ "st1w { z28.s }, p0, [x13, x27, LSL #2]\n"
+ "st1w { z29.s }, p0, [x12, x27, LSL #2]\n"
+ "st1w { z30.s }, p0, [x10, x27, LSL #2]\n"
+ "st1w { z31.s }, p0, [x9, x27, LSL #2]\n"
".inst 0xd503467f // SMSTOP\n"
:
: [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (&params_struct)