diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp | 252 |
1 files changed, 126 insertions, 126 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp index 079b39c5ec..39f1b3635f 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -22,11 +22,11 @@ * SOFTWARE. */ -#if defined(ARM_COMPUTE_ENABLE_SME2) - #include <cstddef> #include <cstdint> +#if defined(ARM_COMPUTE_ENABLE_SME2) + namespace arm_conv { namespace depthwise { @@ -84,7 +84,7 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl( "ptrue p3.b\n" "ldr x14, [%x[params_struct], %[offsetof_args_params]]\n" ".inst 0x25207810 // ptrue pn8.b\n" - "ld1w { z18.s }, p3/Z, [x14]\n" + "ld1w { z23.s }, p3/Z, [x14]\n" "addvl x14, x14, #1\n" "ldp x13, x12, [x20, #0x0]\n" "cntw x11\n" @@ -94,176 +94,176 @@ void sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl( "mov x28, #0x0\n" "whilelt p2.s, XZR, %x[n_channels]\n" ".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n" - "ldp x27, x26, [x15, #0x0]\n" + "ldp x24, x23, [x15, #0x0]\n" "addvl x14, x14, #4\n" "cmp x11, %x[n_channels]\n" - "ld1rw { z17.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" - "ldp x25, x22, [x15, #0x10]\n" - "ld1rw { z16.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" - "sub x24, XZR, x11\n" - "ldr x23, [x15, #0x20]\n" + "ld1rw { z22.s }, p3/Z, [%x[params_struct], %[offsetof_args_min]]\n" + "ldp x22, x21, [x15, #0x10]\n" + "ld1rw { z15.s }, p3/Z, [%x[params_struct], %[offsetof_args_max]]\n" + "sub x27, XZR, x11\n" + "ldr x20, [x15, #0x20]\n" "ld1w { z8.s }, p3/Z, [x14]\n" "addvl x14, x14, #1\n" - "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n" - "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n" - "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n" - "ld1w { z12.s }, p2/Z, [x22, x28, LSL #2]\n" - "ld1w { z13.s }, p2/Z, [x23, x28, LSL #2]\n" + "ld1w { z9.s }, p2/Z, [x24, x28, LSL #2]\n" + "ld1w { z10.s }, p2/Z, [x23, x28, LSL #2]\n" + "ld1w { z11.s }, p2/Z, [x22, x28, LSL #2]\n" + "ld1w { z12.s }, p2/Z, [x21, x28, LSL #2]\n" + "ld1w { z13.s }, p2/Z, [x20, x28, LSL #2]\n" "bge 2f\n" "1:" // Channel loop - "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n" - "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n" - "ldr x22, [x15, #0x28]\n" + "movprfx z28, z23\n fmla z28.s, p3/M, z4.s, z9.s\n" + "movprfx z29, z23\n fmla z29.s, p3/M, z3.s, z9.s\n" + "ldr x20, [x15, #0x28]\n" "whilelt p1.s, x11, %x[n_channels]\n" - "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n" - "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x22, x28, LSL #2]\n" - "ldr x21, [x15, #0x30]\n" + "movprfx z30, z23\n fmla z30.s, p3/M, z1.s, z9.s\n" + "movprfx z31, z23\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z19.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldr x20, [x15, #0x30]\n" "fmla z28.s, p3/M, z0.s, z10.s\n" "fmla z29.s, p3/M, z2.s, z11.s\n" - "ldr x20, [x15, #0x38]\n" - "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n" + "ldr x21, [x15, #0x38]\n" + "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z12.s\n" "fmla z31.s, p3/M, z1.s, z12.s\n" - "ldr x26, [x15, #0x48]\n" - "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n" + "ldr x20, [x15, #0x48]\n" + "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n" "fmla z28.s, p3/M, z5.s, z12.s\n" "fmla z29.s, p3/M, z4.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n" - "ldr x27, [x15, #0x40]\n" - "fmla z30.s, p3/M, z6.s, z9.s\n" + "ld1w { z16.s }, p2/Z, [x21, x28, LSL #2]\n" + "ldr x20, [x15, #0x40]\n" + "fmla z30.s, p3/M, z6.s, z19.s\n" "fmla z31.s, p3/M, z3.s, z13.s\n" - "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n" - "ldr x25, [x15, #0x50]\n" + "ld1w { z25.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldr x21, [x15, #0x50]\n" "fmla z28.s, p3/M, z7.s, z13.s\n" "fmla z29.s, p3/M, z6.s, z13.s\n" - "ldr x22, [x15, #0x58]\n" - "ld1w { z18.s }, p3/Z, [x14]\n" + "ldr x20, [x15, #0x58]\n" + "ld1w { z23.s }, p3/Z, [x14]\n" "fmla z30.s, p3/M, z4.s, z13.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n" - "ldr x23, [x15, #0x60]\n" - "fmla z28.s, p3/M, z1.s, z12.s\n" - "fmla z29.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x22, x28, LSL #2]\n" - "ldr x22, [x15, #0x68]\n" - "fmla z30.s, p3/M, z5.s, z10.s\n" - "fmla z31.s, p3/M, z4.s, z10.s\n" - "ldr x21, [x15, #0x70]\n" + "fmla z31.s, p3/M, z8.s, z18.s\n" + "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n" + "ldr x21, [x15, #0x60]\n" + "fmla z28.s, p3/M, z1.s, z16.s\n" + "fmla z29.s, p3/M, z0.s, z16.s\n" + "ld1w { z19.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldr x20, [x15, #0x68]\n" + "fmla z30.s, p3/M, z5.s, z17.s\n" + "fmla z31.s, p3/M, z4.s, z17.s\n" + "ldr x26, [x15, #0x70]\n" "addvl x14, x14, #1\n" - "fmla z28.s, p3/M, z2.s, z9.s\n" - "fmla z29.s, p3/M, z1.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x23, x28, LSL #2]\n" - "ldr x20, [x15, #0x78]\n" + "fmla z28.s, p3/M, z2.s, z25.s\n" + "fmla z29.s, p3/M, z1.s, z25.s\n" + "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n" + "ldr x25, [x15, #0x78]\n" "fmla z30.s, p3/M, z0.s, z11.s\n" - "fmla z31.s, p3/M, z2.s, z12.s\n" - "ldp x27, x26, [x15, #0x0]\n" - "incw x24\n" - "fmla z28.s, p3/M, z8.s, z10.s\n" - "fmla z29.s, p3/M, z7.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x22, x28, LSL #2]\n" - "ldp x25, x22, [x15, #0x10]\n" - "fmla z30.s, p3/M, z3.s, z9.s\n" - "fmla z31.s, p3/M, z5.s, z10.s\n" - "ldr x23, [x15, #0x20]\n" - "ld1w { z13.s }, p1/Z, [x23, x11, LSL #2]\n" + "fmla z31.s, p3/M, z2.s, z19.s\n" + "ldp x24, x23, [x15, #0x0]\n" + "incw x27\n" + "fmla z28.s, p3/M, z8.s, z17.s\n" + "fmla z29.s, p3/M, z7.s, z17.s\n" + "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldp x22, x21, [x15, #0x10]\n" + "fmla z30.s, p3/M, z3.s, z18.s\n" + "fmla z31.s, p3/M, z5.s, z17.s\n" + "ldr x20, [x15, #0x20]\n" + "ld1w { z13.s }, p1/Z, [x20, x11, LSL #2]\n" "fmla z28.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" + "ld1w { z16.s }, p2/Z, [x26, x28, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z19.s\n" "mov p0.b, p2.b\n" - "fmla z30.s, p3/M, z7.s, z11.s\n" - "fmla z31.s, p3/M, z6.s, z11.s\n" - "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n" + "fmla z30.s, p3/M, z7.s, z16.s\n" + "fmla z31.s, p3/M, z6.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x25, x28, LSL #2]\n" "incw x28\n" - "fmla z28.s, p3/M, z6.s, z9.s\n" - "fmla z29.s, p3/M, z8.s, z10.s\n" - "ld1w { z9.s }, p1/Z, [x27, x11, LSL #2]\n" + "fmla z28.s, p3/M, z6.s, z18.s\n" + "fmla z29.s, p3/M, z8.s, z17.s\n" + "ld1w { z9.s }, p1/Z, [x24, x11, LSL #2]\n" "whilelt p2.s, x28, %x[n_channels]\n" - "fmla z30.s, p3/M, z8.s, z12.s\n" - "fmla z31.s, p3/M, z7.s, z12.s\n" - "ld1w { z10.s }, p1/Z, [x26, x11, LSL #2]\n" - "ld1w { z11.s }, p1/Z, [x25, x11, LSL #2]\n" - ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n" - "st1w { z28.s }, p0, [x13, x24, LSL #2]\n" - "ld1w { z12.s }, p1/Z, [x22, x11, LSL #2]\n" + "fmla z30.s, p3/M, z8.s, z16.s\n" + "fmla z31.s, p3/M, z7.s, z16.s\n" + "ld1w { z10.s }, p1/Z, [x23, x11, LSL #2]\n" + "ld1w { z11.s }, p1/Z, [x22, x11, LSL #2]\n" + ".inst 0xc1afcadc // fclamp { z28.s-z31.s }, z22.s, z15.s\n" + "st1w { z28.s }, p0, [x13, x27, LSL #2]\n" + "ld1w { z12.s }, p1/Z, [x21, x11, LSL #2]\n" "incw x11\n" "cmp x11, %x[n_channels]\n" - "st1w { z29.s }, p0, [x12, x24, LSL #2]\n" + "st1w { z29.s }, p0, [x12, x27, LSL #2]\n" ".inst 0xa040c1c0 // ld1w { z0.s-z3.s }, pn8.b/Z, [x14]\n" "addvl x14, x14, #4\n" - "st1w { z30.s }, p0, [x10, x24, LSL #2]\n" + "st1w { z30.s }, p0, [x10, x27, LSL #2]\n" ".inst 0xa040c1c4 // ld1w { z4.s-z7.s }, pn8.b/Z, [x14]\n" "addvl x14, x14, #4\n" - "st1w { z31.s }, p0, [x9, x24, LSL #2]\n" + "st1w { z31.s }, p0, [x9, x27, LSL #2]\n" "ld1w { z8.s }, p3/Z, [x14]\n" "addvl x14, x14, #1\n" "blt 1b\n" "2:" // Channel tail - "movprfx z28, z18\n fmla z28.s, p3/M, z4.s, z9.s\n" - "movprfx z29, z18\n fmla z29.s, p3/M, z3.s, z9.s\n" - "ldr x22, [x15, #0x28]\n" - "incw x24\n" - "movprfx z30, z18\n fmla z30.s, p3/M, z1.s, z9.s\n" - "movprfx z31, z18\n fmla z31.s, p3/M, z0.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x22, x28, LSL #2]\n" - "ldr x21, [x15, #0x30]\n" + "movprfx z28, z23\n fmla z28.s, p3/M, z4.s, z9.s\n" + "movprfx z29, z23\n fmla z29.s, p3/M, z3.s, z9.s\n" + "ldr x20, [x15, #0x28]\n" + "incw x27\n" + "movprfx z30, z23\n fmla z30.s, p3/M, z1.s, z9.s\n" + "movprfx z31, z23\n fmla z31.s, p3/M, z0.s, z9.s\n" + "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldr x20, [x15, #0x30]\n" "fmla z28.s, p3/M, z0.s, z10.s\n" "fmla z29.s, p3/M, z2.s, z11.s\n" - "ldr x20, [x15, #0x38]\n" - "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n" + "ldr x21, [x15, #0x38]\n" + "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n" "fmla z30.s, p3/M, z2.s, z12.s\n" "fmla z31.s, p3/M, z1.s, z12.s\n" - "ldr x26, [x15, #0x48]\n" - "ld1w { z10.s }, p2/Z, [x26, x28, LSL #2]\n" + "ldr x20, [x15, #0x48]\n" + "ld1w { z20.s }, p2/Z, [x20, x28, LSL #2]\n" "fmla z28.s, p3/M, z5.s, z12.s\n" "fmla z29.s, p3/M, z4.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n" - "ldr x27, [x15, #0x40]\n" - "fmla z30.s, p3/M, z6.s, z9.s\n" + "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n" + "ldr x20, [x15, #0x40]\n" + "fmla z30.s, p3/M, z6.s, z17.s\n" "fmla z31.s, p3/M, z3.s, z13.s\n" - "ld1w { z9.s }, p2/Z, [x27, x28, LSL #2]\n" - "ldr x25, [x15, #0x50]\n" + "ld1w { z17.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldr x20, [x15, #0x50]\n" "fmla z28.s, p3/M, z7.s, z13.s\n" "fmla z29.s, p3/M, z6.s, z13.s\n" - "ldr x22, [x15, #0x58]\n" + "ldr x21, [x15, #0x58]\n" "mov p0.b, p2.b\n" "fmla z30.s, p3/M, z4.s, z13.s\n" - "fmla z31.s, p3/M, z8.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x25, x28, LSL #2]\n" - "ldr x23, [x15, #0x60]\n" - "fmla z28.s, p3/M, z1.s, z12.s\n" - "fmla z29.s, p3/M, z0.s, z12.s\n" - "ld1w { z12.s }, p2/Z, [x22, x28, LSL #2]\n" + "fmla z31.s, p3/M, z8.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n" + "ldr x20, [x15, #0x60]\n" + "fmla z28.s, p3/M, z1.s, z18.s\n" + "fmla z29.s, p3/M, z0.s, z18.s\n" + "ld1w { z19.s }, p2/Z, [x21, x28, LSL #2]\n" "ldr x22, [x15, #0x68]\n" - "fmla z30.s, p3/M, z5.s, z10.s\n" - "fmla z31.s, p3/M, z4.s, z10.s\n" + "fmla z30.s, p3/M, z5.s, z20.s\n" + "fmla z31.s, p3/M, z4.s, z20.s\n" "ldr x21, [x15, #0x70]\n" - "fmla z28.s, p3/M, z2.s, z9.s\n" - "fmla z29.s, p3/M, z1.s, z9.s\n" - "ld1w { z9.s }, p2/Z, [x23, x28, LSL #2]\n" + "fmla z28.s, p3/M, z2.s, z17.s\n" + "fmla z29.s, p3/M, z1.s, z17.s\n" + "ld1w { z18.s }, p2/Z, [x20, x28, LSL #2]\n" "ldr x20, [x15, #0x78]\n" - "fmla z30.s, p3/M, z0.s, z11.s\n" - "fmla z31.s, p3/M, z2.s, z12.s\n" - "fmla z28.s, p3/M, z8.s, z10.s\n" - "fmla z29.s, p3/M, z7.s, z10.s\n" - "ld1w { z10.s }, p2/Z, [x22, x28, LSL #2]\n" - "fmla z30.s, p3/M, z3.s, z9.s\n" - "fmla z31.s, p3/M, z5.s, z10.s\n" - "fmla z28.s, p3/M, z3.s, z11.s\n" - "ld1w { z11.s }, p2/Z, [x21, x28, LSL #2]\n" - "fmla z29.s, p3/M, z5.s, z12.s\n" - "fmla z30.s, p3/M, z7.s, z11.s\n" - "fmla z31.s, p3/M, z6.s, z11.s\n" - "ld1w { z12.s }, p2/Z, [x20, x28, LSL #2]\n" - "fmla z28.s, p3/M, z6.s, z9.s\n" - "fmla z29.s, p3/M, z8.s, z10.s\n" - "fmla z30.s, p3/M, z8.s, z12.s\n" - "fmla z31.s, p3/M, z7.s, z12.s\n" - ".inst 0xc1b0ca3c // fclamp { z28.s-z31.s }, z17.s, z16.s\n" - "st1w { z28.s }, p0, [x13, x24, LSL #2]\n" - "st1w { z29.s }, p0, [x12, x24, LSL #2]\n" - "st1w { z30.s }, p0, [x10, x24, LSL #2]\n" - "st1w { z31.s }, p0, [x9, x24, LSL #2]\n" + "fmla z30.s, p3/M, z0.s, z16.s\n" + "fmla z31.s, p3/M, z2.s, z19.s\n" + "fmla z28.s, p3/M, z8.s, z20.s\n" + "fmla z29.s, p3/M, z7.s, z20.s\n" + "ld1w { z17.s }, p2/Z, [x22, x28, LSL #2]\n" + "fmla z30.s, p3/M, z3.s, z18.s\n" + "fmla z31.s, p3/M, z5.s, z17.s\n" + "fmla z28.s, p3/M, z3.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x21, x28, LSL #2]\n" + "fmla z29.s, p3/M, z5.s, z19.s\n" + "fmla z30.s, p3/M, z7.s, z16.s\n" + "fmla z31.s, p3/M, z6.s, z16.s\n" + "ld1w { z16.s }, p2/Z, [x20, x28, LSL #2]\n" + "fmla z28.s, p3/M, z6.s, z18.s\n" + "fmla z29.s, p3/M, z8.s, z17.s\n" + "fmla z30.s, p3/M, z8.s, z16.s\n" + "fmla z31.s, p3/M, z7.s, z16.s\n" + ".inst 0xc1afcadc // fclamp { z28.s-z31.s }, z22.s, z15.s\n" + "st1w { z28.s }, p0, [x13, x27, LSL #2]\n" + "st1w { z29.s }, p0, [x12, x27, LSL #2]\n" + "st1w { z30.s }, p0, [x10, x27, LSL #2]\n" + "st1w { z31.s }, p0, [x9, x27, LSL #2]\n" ".inst 0xd503467f // SMSTOP\n" : : [n_channels] "r" ((unsigned long) n_channels), [offsetof_Args_inptrs] "I" (offsetof(Args, inptrs)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_outptrs] "I" (offsetof(Args, outptrs)), [offsetof_args_params] "I" (offsetof(Args, params)), [params_struct] "r" (¶ms_struct) |