diff options
Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp')
| -rw-r--r-- | src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp index 92d6a757f2..5ae8dd3653 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -28,39 +28,34 @@ #pragma once +#if defined(__aarch64__) + namespace arm_conv { namespace depthwise { void a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst_impl(const float *const *const, float *const *const, const void *, const unsigned int, const float, const float); -struct a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst +struct a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst : DepthfirstMultiplierStrategy<float, float, float, float> { - typedef float bias_type; - typedef float input_type; - typedef float weight_type; - typedef float return_type; - - typedef void (*kern_type)(const float *const *const, float *const *const, const void *, const unsigned int, const float, const float); - - constexpr static arm_gemm::VLType vl_type = arm_gemm::VLType::None; - + using Parent = DepthfirstMultiplierStrategy<float, float, float, float>; constexpr static unsigned int kernel_rows = 5; constexpr static unsigned int kernel_cols = 5; constexpr static unsigned int stride_rows = 1; constexpr static unsigned int stride_cols = 1; - constexpr static unsigned int output_rows = 2; - constexpr static unsigned int output_cols = 4; - - constexpr static unsigned int input_rows = 6; - constexpr static unsigned int input_cols = 8; - constexpr static unsigned int input_col_quads = 2; + a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst(const CPUInfo *) + : Parent(2, 4, kernel_rows, kernel_cols, stride_rows, stride_cols) + { + } - kern_type kernel = a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst_impl; + arm_gemm::VLType get_vl_type() const override { return arm_gemm::VLType::None; } - a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst(const CPUInfo *) {} + Parent::KernelType kernel = a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst_impl; + Parent::KernelType get_kernel(void) const override { return kernel; } }; } // namespace depthwise } // namespace arm_conv + +#endif // defined(__aarch64__) |