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Diffstat (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp')
-rw-r--r--src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp279
1 files changed, 139 insertions, 140 deletions
diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
index 2ff03aa15a..fd8686c15e 100644
--- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
+++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp
@@ -25,7 +25,7 @@
#include <cstddef>
#include <cstdint>
-#if __aarch64__
+#if defined(__aarch64__)
namespace arm_conv {
namespace depthwise {
@@ -110,15 +110,15 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"add x11, x15, x15\n"
"ldr x10, [%x[params_struct], %[offsetof_args_params]]\n"
"mul x21, x21, x27\n" // offset *= kernel_stride * output_size
- "add x13, x13, x21, LSL #2\n" // inptr[0] += offset * sizeof(float)
+ "add x13, x13, x21, LSL #2\n" // inptr[0] += offset * sizeof(float)
"add x9, x13, x25, LSL #2\n"
"mul x20, x20, x26\n" // offset *= output_tile_size
"add x28, x9, x25, LSL #2\n"
"add x12, x12, x20, LSL #2\n" // outptrs[0] += offset * sizeof(float)
"add x20, %x[params_struct], %[offsetof_args_min]\n"
- "ld1r { v18.4s }, [x20]\n"
+ "ld1r { v27.4s }, [x20]\n"
"add x20, %x[params_struct], %[offsetof_args_max]\n"
- "ld1r { v17.4s }, [x20]\n"
+ "ld1r { v26.4s }, [x20]\n"
"add x27, x28, x25, LSL #2\n"
"add x26, x11, x15\n"
"add x25, x12, x24, LSL #2\n"
@@ -126,7 +126,7 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"mov x21, #0x0\n"
"sub x20, XZR, x23\n"
"cbz x22, 4f\n"
- "ldr q16, [x10, #0x0]\n"
+ "ldr q25, [x10, #0x0]\n"
"ldr q0, [x10, #0x10]\n"
"cmp x23, x22, LSL #4\n"
"ldr q1, [x10, #0x20]\n"
@@ -145,162 +145,162 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"ldr q13, [x28, x15]\n"
"bge 3f\n"
"2:" // Tile loop: Channel loop
- "mov v28.16b, v16.16b\n fmla v28.4s, v4.4s, v9.4s\n"
- "mov v29.16b, v16.16b\n fmla v29.4s, v3.4s, v9.4s\n"
+ "mov v24.16b, v25.16b\n fmla v24.4s, v4.4s, v9.4s\n"
+ "mov v23.16b, v25.16b\n fmla v23.4s, v3.4s, v9.4s\n"
"add x23, x23, #0x10\n"
"cmp x23, x22, LSL #4\n"
- "mov v30.16b, v16.16b\n fmla v30.4s, v1.4s, v9.4s\n"
- "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v9.4s\n"
- "ld1 { v9.4s }, [x27]\n"
- "ldr q16, [x10, #0x0]\n"
- "fmla v28.4s, v0.4s, v10.4s\n"
- "ldr q10, [x28, x11]\n"
- "fmla v29.4s, v2.4s, v11.4s\n"
- "ldr q11, [x27, x26]\n"
- "fmla v30.4s, v2.4s, v12.4s\n"
- "fmla v31.4s, v1.4s, v12.4s\n"
+ "mov v22.16b, v25.16b\n fmla v22.4s, v1.4s, v9.4s\n"
+ "mov v21.16b, v25.16b\n fmla v21.4s, v0.4s, v9.4s\n"
+ "ld1 { v18.4s }, [x27]\n"
+ "ldr q25, [x10, #0x0]\n"
+ "fmla v24.4s, v0.4s, v10.4s\n"
+ "ldr q20, [x28, x11]\n"
+ "fmla v23.4s, v2.4s, v11.4s\n"
+ "ldr q17, [x27, x26]\n"
+ "fmla v22.4s, v2.4s, v12.4s\n"
+ "fmla v21.4s, v1.4s, v12.4s\n"
"add x20, x20, #0x10\n"
"add x21, x21, #0x10\n"
- "fmla v28.4s, v5.4s, v12.4s\n"
- "fmla v29.4s, v4.4s, v12.4s\n"
- "ldr q12, [x13, x15]\n"
- "fmla v30.4s, v6.4s, v9.4s\n"
- "ldr q9, [x13, x11]\n"
- "fmla v31.4s, v3.4s, v13.4s\n"
+ "fmla v24.4s, v5.4s, v12.4s\n"
+ "fmla v23.4s, v4.4s, v12.4s\n"
+ "ldr q16, [x13, x15]\n"
+ "fmla v22.4s, v6.4s, v18.4s\n"
+ "ldr q18, [x13, x11]\n"
+ "fmla v21.4s, v3.4s, v13.4s\n"
"add x13, x13, #0x10\n"
- "fmla v28.4s, v7.4s, v13.4s\n"
- "fmla v29.4s, v6.4s, v13.4s\n"
- "fmla v30.4s, v4.4s, v13.4s\n"
- "fmla v31.4s, v8.4s, v11.4s\n"
- "ld1 { v11.4s }, [x9]\n"
- "fmla v28.4s, v1.4s, v12.4s\n"
- "fmla v29.4s, v0.4s, v12.4s\n"
- "ldr q12, [x9, x26]\n"
+ "fmla v24.4s, v7.4s, v13.4s\n"
+ "fmla v23.4s, v6.4s, v13.4s\n"
+ "fmla v22.4s, v4.4s, v13.4s\n"
+ "fmla v21.4s, v8.4s, v17.4s\n"
+ "ld1 { v17.4s }, [x9]\n"
+ "fmla v24.4s, v1.4s, v16.4s\n"
+ "fmla v23.4s, v0.4s, v16.4s\n"
+ "ldr q16, [x9, x26]\n"
"add x9, x9, #0x10\n"
- "fmla v30.4s, v5.4s, v10.4s\n"
- "fmla v31.4s, v4.4s, v10.4s\n"
+ "fmla v22.4s, v5.4s, v20.4s\n"
+ "fmla v21.4s, v4.4s, v20.4s\n"
"ldr q4, [x10, #0x50]\n"
- "fmla v28.4s, v2.4s, v9.4s\n"
- "fmla v29.4s, v1.4s, v9.4s\n"
- "ld1 { v9.4s }, [x28]\n"
+ "fmla v24.4s, v2.4s, v18.4s\n"
+ "fmla v23.4s, v1.4s, v18.4s\n"
+ "ld1 { v19.4s }, [x28]\n"
"ldr q1, [x10, #0x20]\n"
- "fmla v30.4s, v0.4s, v11.4s\n"
+ "fmla v22.4s, v0.4s, v17.4s\n"
"ldr q0, [x10, #0x10]\n"
- "fmla v31.4s, v2.4s, v12.4s\n"
+ "fmla v21.4s, v2.4s, v16.4s\n"
"ldr q2, [x10, #0x30]\n"
- "fmla v28.4s, v8.4s, v10.4s\n"
- "fmla v29.4s, v7.4s, v10.4s\n"
- "ldr q10, [x28, x26]\n"
+ "fmla v24.4s, v8.4s, v20.4s\n"
+ "fmla v23.4s, v7.4s, v20.4s\n"
+ "ldr q18, [x28, x26]\n"
"add x28, x28, #0x10\n"
"ldr q13, [x28, x15]\n"
- "fmla v30.4s, v3.4s, v9.4s\n"
- "fmla v31.4s, v5.4s, v10.4s\n"
- "fmla v28.4s, v3.4s, v11.4s\n"
- "ldr q11, [x27, x15]\n"
+ "fmla v22.4s, v3.4s, v19.4s\n"
+ "fmla v21.4s, v5.4s, v18.4s\n"
+ "fmla v24.4s, v3.4s, v17.4s\n"
+ "ldr q17, [x27, x15]\n"
"ldr q3, [x10, #0x40]\n"
- "fmla v29.4s, v5.4s, v12.4s\n"
- "ldr q12, [x27, x11]\n"
+ "fmla v23.4s, v5.4s, v16.4s\n"
+ "ldr q16, [x27, x11]\n"
"ldr q5, [x10, #0x60]\n"
- "fmla v30.4s, v7.4s, v11.4s\n"
- "fmla v31.4s, v6.4s, v11.4s\n"
+ "fmla v22.4s, v7.4s, v17.4s\n"
+ "fmla v21.4s, v6.4s, v17.4s\n"
"ldr q11, [x13, x26]\n"
- "fmla v28.4s, v6.4s, v9.4s\n"
+ "fmla v24.4s, v6.4s, v19.4s\n"
"ldr q9, [x9, x15]\n"
- "fmla v29.4s, v8.4s, v10.4s\n"
+ "fmla v23.4s, v8.4s, v18.4s\n"
"ld1 { v10.4s }, [x13]\n"
"ldr q6, [x10, #0x70]\n"
- "fmla v30.4s, v8.4s, v12.4s\n"
- "fmla v31.4s, v7.4s, v12.4s\n"
+ "fmla v22.4s, v8.4s, v16.4s\n"
+ "fmla v21.4s, v7.4s, v16.4s\n"
"ldr q12, [x9, x11]\n"
"ldr q7, [x10, #0x80]\n"
- "fmax v28.4s, v28.4s, v18.4s\n"
- "fmax v29.4s, v29.4s, v18.4s\n"
+ "fmax v24.4s, v24.4s, v27.4s\n"
+ "fmax v23.4s, v23.4s, v27.4s\n"
"ldr q8, [x10, #0x90]\n"
- "fmax v30.4s, v30.4s, v18.4s\n"
- "fmax v31.4s, v31.4s, v18.4s\n"
+ "fmax v22.4s, v22.4s, v27.4s\n"
+ "fmax v21.4s, v21.4s, v27.4s\n"
"add x27, x27, #0x10\n"
- "fmin v28.4s, v28.4s, v17.4s\n"
- "fmin v29.4s, v29.4s, v17.4s\n"
- "st1 { v28.4s }, [x12]\n"
+ "fmin v24.4s, v24.4s, v26.4s\n"
+ "fmin v23.4s, v23.4s, v26.4s\n"
+ "st1 { v24.4s }, [x12]\n"
"add x10, x10, #0xa0\n"
- "fmin v30.4s, v30.4s, v17.4s\n"
- "fmin v31.4s, v31.4s, v17.4s\n"
- "str q29, [x12, x14]\n"
+ "fmin v22.4s, v22.4s, v26.4s\n"
+ "fmin v21.4s, v21.4s, v26.4s\n"
+ "str q23, [x12, x14]\n"
"add x12, x12, #0x10\n"
- "st1 { v30.4s }, [x25]\n"
- "str q31, [x25, x14]\n"
+ "st1 { v22.4s }, [x25]\n"
+ "str q21, [x25, x14]\n"
"add x25, x25, #0x10\n"
"blt 2b\n"
"3:" // Tile loop: Channel tail
- "mov v28.16b, v16.16b\n fmla v28.4s, v4.4s, v9.4s\n"
- "mov v29.16b, v16.16b\n fmla v29.4s, v3.4s, v9.4s\n"
- "mov v30.16b, v16.16b\n fmla v30.4s, v1.4s, v9.4s\n"
- "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v9.4s\n"
- "ld1 { v9.4s }, [x27]\n"
- "fmla v28.4s, v0.4s, v10.4s\n"
- "ldr q10, [x28, x11]\n"
- "fmla v29.4s, v2.4s, v11.4s\n"
- "ldr q11, [x27, x26]\n"
- "fmla v30.4s, v2.4s, v12.4s\n"
- "fmla v31.4s, v1.4s, v12.4s\n"
- "fmla v28.4s, v5.4s, v12.4s\n"
- "fmla v29.4s, v4.4s, v12.4s\n"
- "ldr q12, [x13, x15]\n"
- "fmla v30.4s, v6.4s, v9.4s\n"
- "ldr q9, [x13, x11]\n"
- "fmla v31.4s, v3.4s, v13.4s\n"
+ "mov v24.16b, v25.16b\n fmla v24.4s, v4.4s, v9.4s\n"
+ "mov v23.16b, v25.16b\n fmla v23.4s, v3.4s, v9.4s\n"
+ "mov v22.16b, v25.16b\n fmla v22.4s, v1.4s, v9.4s\n"
+ "mov v21.16b, v25.16b\n fmla v21.4s, v0.4s, v9.4s\n"
+ "ld1 { v18.4s }, [x27]\n"
+ "fmla v24.4s, v0.4s, v10.4s\n"
+ "ldr q20, [x28, x11]\n"
+ "fmla v23.4s, v2.4s, v11.4s\n"
+ "ldr q17, [x27, x26]\n"
+ "fmla v22.4s, v2.4s, v12.4s\n"
+ "fmla v21.4s, v1.4s, v12.4s\n"
+ "fmla v24.4s, v5.4s, v12.4s\n"
+ "fmla v23.4s, v4.4s, v12.4s\n"
+ "ldr q16, [x13, x15]\n"
+ "fmla v22.4s, v6.4s, v18.4s\n"
+ "ldr q18, [x13, x11]\n"
+ "fmla v21.4s, v3.4s, v13.4s\n"
"add x13, x13, #0x10\n"
- "fmla v28.4s, v7.4s, v13.4s\n"
- "fmla v29.4s, v6.4s, v13.4s\n"
- "fmla v30.4s, v4.4s, v13.4s\n"
- "fmla v31.4s, v8.4s, v11.4s\n"
- "ld1 { v11.4s }, [x9]\n"
- "fmla v28.4s, v1.4s, v12.4s\n"
- "fmla v29.4s, v0.4s, v12.4s\n"
- "ldr q12, [x9, x26]\n"
+ "fmla v24.4s, v7.4s, v13.4s\n"
+ "fmla v23.4s, v6.4s, v13.4s\n"
+ "fmla v22.4s, v4.4s, v13.4s\n"
+ "fmla v21.4s, v8.4s, v17.4s\n"
+ "ld1 { v17.4s }, [x9]\n"
+ "fmla v24.4s, v1.4s, v16.4s\n"
+ "fmla v23.4s, v0.4s, v16.4s\n"
+ "ldr q16, [x9, x26]\n"
"add x9, x9, #0x10\n"
- "fmla v30.4s, v5.4s, v10.4s\n"
- "fmla v31.4s, v4.4s, v10.4s\n"
- "fmla v28.4s, v2.4s, v9.4s\n"
- "fmla v29.4s, v1.4s, v9.4s\n"
- "ld1 { v9.4s }, [x28]\n"
- "fmla v30.4s, v0.4s, v11.4s\n"
- "fmla v31.4s, v2.4s, v12.4s\n"
- "fmla v28.4s, v8.4s, v10.4s\n"
- "fmla v29.4s, v7.4s, v10.4s\n"
- "ldr q10, [x28, x26]\n"
+ "fmla v22.4s, v5.4s, v20.4s\n"
+ "fmla v21.4s, v4.4s, v20.4s\n"
+ "fmla v24.4s, v2.4s, v18.4s\n"
+ "fmla v23.4s, v1.4s, v18.4s\n"
+ "ld1 { v19.4s }, [x28]\n"
+ "fmla v22.4s, v0.4s, v17.4s\n"
+ "fmla v21.4s, v2.4s, v16.4s\n"
+ "fmla v24.4s, v8.4s, v20.4s\n"
+ "fmla v23.4s, v7.4s, v20.4s\n"
+ "ldr q18, [x28, x26]\n"
"add x28, x28, #0x10\n"
- "fmla v30.4s, v3.4s, v9.4s\n"
- "fmla v31.4s, v5.4s, v10.4s\n"
- "fmla v28.4s, v3.4s, v11.4s\n"
- "ldr q11, [x27, x15]\n"
- "fmla v29.4s, v5.4s, v12.4s\n"
- "ldr q12, [x27, x11]\n"
- "fmla v30.4s, v7.4s, v11.4s\n"
- "fmla v31.4s, v6.4s, v11.4s\n"
+ "fmla v22.4s, v3.4s, v19.4s\n"
+ "fmla v21.4s, v5.4s, v18.4s\n"
+ "fmla v24.4s, v3.4s, v17.4s\n"
+ "ldr q17, [x27, x15]\n"
+ "fmla v23.4s, v5.4s, v16.4s\n"
+ "ldr q16, [x27, x11]\n"
+ "fmla v22.4s, v7.4s, v17.4s\n"
+ "fmla v21.4s, v6.4s, v17.4s\n"
"add x27, x27, #0x10\n"
- "fmla v28.4s, v6.4s, v9.4s\n"
- "fmla v29.4s, v8.4s, v10.4s\n"
- "fmax v28.4s, v28.4s, v18.4s\n"
- "fmla v30.4s, v8.4s, v12.4s\n"
- "fmla v31.4s, v7.4s, v12.4s\n"
- "fmax v29.4s, v29.4s, v18.4s\n"
- "fmax v30.4s, v30.4s, v18.4s\n"
- "fmax v31.4s, v31.4s, v18.4s\n"
- "fmin v28.4s, v28.4s, v17.4s\n"
- "fmin v29.4s, v29.4s, v17.4s\n"
- "st1 { v28.4s }, [x12]\n"
- "fmin v30.4s, v30.4s, v17.4s\n"
- "fmin v31.4s, v31.4s, v17.4s\n"
- "str q29, [x12, x14]\n"
+ "fmla v24.4s, v6.4s, v19.4s\n"
+ "fmla v23.4s, v8.4s, v18.4s\n"
+ "fmax v24.4s, v24.4s, v27.4s\n"
+ "fmla v22.4s, v8.4s, v16.4s\n"
+ "fmla v21.4s, v7.4s, v16.4s\n"
+ "fmax v23.4s, v23.4s, v27.4s\n"
+ "fmax v22.4s, v22.4s, v27.4s\n"
+ "fmax v21.4s, v21.4s, v27.4s\n"
+ "fmin v24.4s, v24.4s, v26.4s\n"
+ "fmin v23.4s, v23.4s, v26.4s\n"
+ "st1 { v24.4s }, [x12]\n"
+ "fmin v22.4s, v22.4s, v26.4s\n"
+ "fmin v21.4s, v21.4s, v26.4s\n"
+ "str q23, [x12, x14]\n"
"add x12, x12, #0x10\n"
- "st1 { v30.4s }, [x25]\n"
- "str q31, [x25, x14]\n"
+ "st1 { v22.4s }, [x25]\n"
+ "str q21, [x25, x14]\n"
"add x25, x25, #0x10\n"
"4:" // Tile loop: Oddments
"tst %x[n_channels], #0x3\n"
"beq 31f\n"
- "ldr q16, [x10, #0x0]\n"
+ "ldr q25, [x10, #0x0]\n"
"ldr q0, [x10, #0x10]\n"
"add x24, x9, x15\n"
"add x23, x13, XZR\n"
@@ -335,11 +335,11 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"ldr s12, [x21, #0x0]\n"
"ldr s13, [x20, #0x0]\n"
"6:" // Tile loop: Oddments: Load inputs: (1, 1), (0, 0), (0, 3), (1, 2), (2, 1): Bit 1: End
- "mov v28.16b, v16.16b\n fmla v28.4s, v4.4s, v9.4s\n"
- "mov v29.16b, v16.16b\n fmla v29.4s, v3.4s, v9.4s\n"
+ "mov v28.16b, v25.16b\n fmla v28.4s, v4.4s, v9.4s\n"
+ "mov v29.16b, v25.16b\n fmla v29.4s, v3.4s, v9.4s\n"
"add x20, x27, XZR\n"
- "mov v30.16b, v16.16b\n fmla v30.4s, v1.4s, v9.4s\n"
- "mov v31.16b, v16.16b\n fmla v31.4s, v0.4s, v9.4s\n"
+ "mov v30.16b, v25.16b\n fmla v30.4s, v1.4s, v9.4s\n"
+ "mov v31.16b, v25.16b\n fmla v31.4s, v0.4s, v9.4s\n"
"fmla v28.4s, v0.4s, v10.4s\n"
"fmla v29.4s, v2.4s, v11.4s\n"
"fmla v28.4s, v5.4s, v12.4s\n"
@@ -470,14 +470,14 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"28:" // Tile loop: Oddments: Load inputs: (3, 2): Bit 1: End
"fmla v30.4s, v8.4s, v12.4s\n"
"fmla v31.4s, v7.4s, v12.4s\n"
- "fmax v28.4s, v28.4s, v18.4s\n"
- "fmax v29.4s, v29.4s, v18.4s\n"
- "fmax v30.4s, v30.4s, v18.4s\n"
- "fmax v31.4s, v31.4s, v18.4s\n"
- "fmin v28.4s, v28.4s, v17.4s\n"
- "fmin v29.4s, v29.4s, v17.4s\n"
- "fmin v30.4s, v30.4s, v17.4s\n"
- "fmin v31.4s, v31.4s, v17.4s\n"
+ "fmax v28.4s, v28.4s, v27.4s\n"
+ "fmax v29.4s, v29.4s, v27.4s\n"
+ "fmax v30.4s, v30.4s, v27.4s\n"
+ "fmax v31.4s, v31.4s, v27.4s\n"
+ "fmin v28.4s, v28.4s, v26.4s\n"
+ "fmin v29.4s, v29.4s, v26.4s\n"
+ "fmin v30.4s, v30.4s, v26.4s\n"
+ "fmin v31.4s, v31.4s, v26.4s\n"
"tbz %x[n_channels], #1, 29f\n"
"mov x21, x12\n"
"mov x20, x25\n"
@@ -503,7 +503,6 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"st1 { v29.s }[0], [x21]\n"
"st1 { v31.s }[0], [x20]\n"
"30:" // Tile loop: Oddments: Store: Bit 1: End
-
"31:" // Tile loop: End
"ldr x22, [%x[params_struct], %[offsetof_args_tile_j]]\n"
"ldr x23, [%x[params_struct], %[offsetof_args_tile_i]]\n"
@@ -518,11 +517,11 @@ void a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl(
"blt 1b\n"
:
: [n_channels] "r" ((unsigned long) n_channels), [offsetof_args_inptr] "I" (offsetof(Args, inptr)), [offsetof_args_ld_input_col] "I" (offsetof(Args, ld_input_col)), [offsetof_args_ld_input_row] "I" (offsetof(Args, ld_input_row)), [offsetof_args_ld_output_col] "I" (offsetof(Args, ld_output_col)), [offsetof_args_ld_output_row] "I" (offsetof(Args, ld_output_row)), [offsetof_args_max] "I" (offsetof(Args, max)), [offsetof_args_min] "I" (offsetof(Args, min)), [offsetof_args_n_tile_cols] "I" (offsetof(Args, n_tile_cols)), [offsetof_args_n_tile_rows] "I" (offsetof(Args, n_tile_rows)), [offsetof_args_outptr] "I" (offsetof(Args, outptr)), [offsetof_args_params] "I" (offsetof(Args, params)), [offsetof_args_tile_i] "I" (offsetof(Args, tile_i)), [offsetof_args_tile_j] "I" (offsetof(Args, tile_j)), [params_struct] "r" (&params_struct)
- : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+ : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
);
}
} // namespace depthwise
} // namespace arm_conv
-#endif // __aarch64__
+#endif // defined(__aarch64__)
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-10 21:27:21 +0000