diff options
Diffstat (limited to 'arm_compute')
| -rw-r--r-- | arm_compute/core/CL/CLCompileContext.h | 6 | ||||
| -rw-r--r-- | arm_compute/core/ITensorInfo.h | 22 | ||||
| -rw-r--r-- | arm_compute/core/SubTensorInfo.h | 13 | ||||
| -rw-r--r-- | arm_compute/core/TensorInfo.h | 15 | ||||
| -rw-r--r-- | arm_compute/core/Types.h | 16 | ||||
| -rw-r--r-- | arm_compute/dynamic_fusion/runtime/gpu/cl/ClWorkloadRuntime.h | 80 | ||||
| -rw-r--r-- | arm_compute/dynamic_fusion/sketch/MemoryDescriptor.h | 76 | ||||
| -rw-r--r-- | arm_compute/dynamic_fusion/sketch/OperatorAttributes.h | 65 | ||||
| -rw-r--r-- | arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h | 87 | ||||
| -rw-r--r-- | arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h | 100 | ||||
| -rw-r--r-- | arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h | 84 |
11 files changed, 558 insertions, 6 deletions
diff --git a/arm_compute/core/CL/CLCompileContext.h b/arm_compute/core/CL/CLCompileContext.h index e8f2ff35da..60e0f95f83 100644 --- a/arm_compute/core/CL/CLCompileContext.h +++ b/arm_compute/core/CL/CLCompileContext.h @@ -310,6 +310,12 @@ public: */ int32_t get_ddk_version() const; + /** Return the Gpu target of the associated device + * + * @return GPUTarget + */ + GPUTarget get_gpu_target() const; + private: /** Load program and its dependencies. * diff --git a/arm_compute/core/ITensorInfo.h b/arm_compute/core/ITensorInfo.h index 6839d697e3..ca2837e450 100644 --- a/arm_compute/core/ITensorInfo.h +++ b/arm_compute/core/ITensorInfo.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2021 Arm Limited. + * Copyright (c) 2016-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -41,6 +41,11 @@ class ITensorInfo : public misc::ICloneable<ITensorInfo> { public: using TensorDimsState = std::vector<int>; + /** An id that uniquely identifies an ITensorInfo within some domain (e.g. a workload) + */ + using Id = int32_t; + /** An invalid tensor id within a domain */ + static constexpr Id invalid_tensor_id = -1; /** Get the value representing dynamic dimension state * * @return Value representing dynamic dimension state @@ -280,7 +285,20 @@ public: * @return A DataLayout containing the layout data information. */ virtual DataLayout data_layout() const = 0; - + /** Get the workload tensor id of the tensor. + * + * @return Workload tensor id of the tensor + */ + virtual Id id() const = 0; + /** Set the tensor id + */ + virtual ITensorInfo &set_id(ITensorInfo::Id id) = 0; + /** Check if the tensor id is valid + */ + bool has_valid_id() const + { + return id() != invalid_tensor_id; + } /** If infos are broadcast compatible tensor info's, return the broadcasted shape and the intersection of * the broadcasted valid regions of the tensors. * diff --git a/arm_compute/core/SubTensorInfo.h b/arm_compute/core/SubTensorInfo.h index 54836d0528..374ea5b8c6 100644 --- a/arm_compute/core/SubTensorInfo.h +++ b/arm_compute/core/SubTensorInfo.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2021 Arm Limited. + * Copyright (c) 2017-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -237,6 +237,17 @@ public: ARM_COMPUTE_ERROR_ON(_parent == nullptr); return _parent->data_layout(); } + ITensorInfo::Id id() const override + { + ARM_COMPUTE_ERROR_ON(_parent == nullptr); + return _parent->id(); + } + ITensorInfo &set_id(ITensorInfo::Id id) override + { + ARM_COMPUTE_ERROR_ON(_parent == nullptr); + _parent->set_id(id); + return *this; + } private: ITensorInfo *_parent; diff --git a/arm_compute/core/TensorInfo.h b/arm_compute/core/TensorInfo.h index 40f9ed9806..7eb8c52d07 100644 --- a/arm_compute/core/TensorInfo.h +++ b/arm_compute/core/TensorInfo.h @@ -50,7 +50,7 @@ public: /** Allow instances of this class to be copy constructed */ TensorInfo(const ITensorInfo &info); /** Allow instances of this class to be copy constructed */ - TensorInfo(const TensorInfo &) = default; + TensorInfo(const TensorInfo &); /** Allow instances of this class to be copied */ TensorInfo &operator=(const TensorInfo &) = default; /** Allow instances of this class to be move constructed */ @@ -297,6 +297,15 @@ public: _are_values_constant = are_values_constant; return *this; } + ITensorInfo::Id id() const override + { + return _id; + } + ITensorInfo &set_id(ITensorInfo::Id id) override + { + _id = id; + return *this; + } inline friend bool operator==(const TensorInfo &lhs, const TensorInfo &rhs); private: @@ -320,6 +329,7 @@ private: QuantizationInfo _quantization_info; DataLayout _data_layout; bool _are_values_constant; + ITensorInfo::Id _id; }; /** Check whether two tensor info are equal. @@ -334,7 +344,8 @@ inline bool operator==(const TensorInfo &lhs, const TensorInfo &rhs) return (lhs._total_size == rhs._total_size) && (lhs._offset_first_element_in_bytes == rhs._offset_first_element_in_bytes) && (lhs._strides_in_bytes == rhs._strides_in_bytes) && (lhs._num_channels == rhs._num_channels) && (lhs._tensor_shape == rhs._tensor_shape) && (lhs._dims_state == rhs._dims_state) && (lhs._data_type == rhs._data_type) && (lhs._format == rhs._format) && (lhs._is_resizable == rhs._is_resizable) && (lhs._valid_region == rhs._valid_region) && (lhs._padding == rhs._padding) && (lhs._quantization_info == rhs._quantization_info) - && (lhs._data_layout == rhs._data_layout) && (lhs._are_values_constant == rhs._are_values_constant); + && (lhs._data_layout == rhs._data_layout) && (lhs._are_values_constant == rhs._are_values_constant) + && (lhs._id == rhs._id); } } // namespace arm_compute #endif /*ARM_COMPUTE_TENSORINFO_H */ diff --git a/arm_compute/core/Types.h b/arm_compute/core/Types.h index fc6d46c53b..b0a6475527 100644 --- a/arm_compute/core/Types.h +++ b/arm_compute/core/Types.h @@ -782,6 +782,20 @@ private: DimensionRoundingType _round_type; }; +/** Padding information for 2D operations like Conv2d */ +struct Padding2D +{ + Padding2D() = default; + Padding2D(size_t left, size_t right, size_t top, size_t bottom) + : left(left), right(right), top(top), bottom(bottom) + { + } + size_t left = { 0 }; /**< Padding across the width dimension on the left, in elements. */ + size_t right = { 0 }; /**< Padding across the width dimension on the right, in elements. */ + size_t top = { 0 }; /**< Padding across the height dimension on the top, in elements. */ + size_t bottom = { 0 }; /**< Padding across the height dimension on the bottom, in elements. */ +}; + /** Padding information for 3D operations like Conv3d */ struct Padding3D { @@ -1642,7 +1656,7 @@ public: LINEAR, /**< Linear ( \f$ f(x)= ax + b \f$ ) */ IDENTITY, /**< Identity ( \f$ f(x)= x \f$ ) */ HARD_SWISH, /**< Hard-swish ( \f$ f(x) = (x \text{ReLU6}(x+3))/6 = x \min(\max(0,x+3),6)/6 \f$ ) */ - SWISH, /**< Swish ( \f$ f(x) = \frac{x}{1 + e^{-ax}} = x \text{logistic}(ax) \f$ ) */ + SWISH, /**< Swish ( \f$ f(x) = \frac{x}{1 + e^{-ax}} = x \text{logistic}(ax) \f$ ) */ GELU /**< GELU ( \f$ f(x) = x * 1/2 * 1 + erf(x / \sqrt{2}) \f$ ) */ }; diff --git a/arm_compute/dynamic_fusion/runtime/gpu/cl/ClWorkloadRuntime.h b/arm_compute/dynamic_fusion/runtime/gpu/cl/ClWorkloadRuntime.h new file mode 100644 index 0000000000..326880f721 --- /dev/null +++ b/arm_compute/dynamic_fusion/runtime/gpu/cl/ClWorkloadRuntime.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_DYNAMIC_FUSION_RUNTIME_GPU_CL_CLWORKLOADRUNTIME +#define ARM_COMPUTE_DYNAMIC_FUSION_RUNTIME_GPU_CL_CLWORKLOADRUNTIME + +#include "arm_compute/dynamic_fusion/sketch/MemoryDescriptor.h" + +#include <map> +#include <memory> + +namespace arm_compute +{ +/** Forward declaration */ +class CLTensor; +namespace experimental +{ +namespace dynamic_fusion +{ +/** Forward declaration */ +class GpuWorkloadSketch; + +/** OpenCL runtime to run a workload + */ +class ClWorkloadRuntime +{ +public: + ClWorkloadRuntime(); + ~ClWorkloadRuntime(); + /** Configure @ref ClWorkloadRuntime + * @note A runtime cannot be re-configured + * + * @param[in] sketch @ref GpuWorkloadSketch with which to configure + */ + Status configure(const GpuWorkloadSketch &sketch); + /** Perform run workload + * @note If the runtime is not configured, this method will not perform any action + * + * @param[in,out] tensors Tensors required by the run workloads + * + * @return Status If the run is successful + */ + Status run(const std::vector<CLTensor *> &tensors); + /** Get auxiliary tensors of the workload and their memory requirement + */ + std::vector<std::pair<CLTensor *, AuxMemoryInfo>> get_auxiliary_tensors(); + +private: + /** Enqueue prepare workload + * @note If the runtime is not configured, this method will not perform any action + */ + void prepare(); + struct Implementation; + std::unique_ptr<Implementation> _impl; +}; + +} // namespace dynamic_fusion +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_DYNAMIC_FUSION_RUNTIME_GPU_CL_CLWORKLOADRUNTIME */ diff --git a/arm_compute/dynamic_fusion/sketch/MemoryDescriptor.h b/arm_compute/dynamic_fusion/sketch/MemoryDescriptor.h new file mode 100644 index 0000000000..deedf62262 --- /dev/null +++ b/arm_compute/dynamic_fusion/sketch/MemoryDescriptor.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_MEMORYDESCRIPTOR +#define ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_MEMORYDESCRIPTOR + +#include "arm_compute/core/ITensorInfo.h" + +namespace arm_compute +{ +namespace experimental +{ +namespace dynamic_fusion +{ +/** Type of memory used by a workload tensor */ +enum class MemoryType +{ + User = 0, /**< Memory coming directly from users, e.g. for argument tensors */ + Auxiliary = 1, /**< Additional memory required by the workload tensor, e.g. for temporary tensors */ +}; + +/** Memory information for tensors with @ref MemoryType::Auxiliary. + * This informs how much additional memory is required for auxiliary tensors + */ +struct AuxMemoryInfo +{ + AuxMemoryInfo() = default; + + AuxMemoryInfo(size_t size, size_t alignment = 0) noexcept + : size(size), + alignment(alignment) + { + } + + friend bool operator==(const AuxMemoryInfo &info0, const AuxMemoryInfo &info1) + { + return info0.size == info1.size && info0.alignment == info1.alignment; + } + size_t size{ 0 }; /**< Total memory size in bytes */ + size_t alignment{ 0 }; /**< Memory alignment in bytes */ +}; + +/** Descriptor of a workload tensor memory */ +struct MemoryDescriptor +{ + MemoryType memory_type{}; /**< Memory Type*/ + AuxMemoryInfo aux_memory_info{}; /**< Auxiliary Tensor Memory Information */ +}; + +/** A map from @ref ITensorInfo to their corresponding @ref MemoryDescriptor */ +using MemoryDescriptorMap = std::map<ITensorInfo::Id, MemoryDescriptor>; + +} // namespace dynamic_fusion +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_MEMORYDESCRIPTOR */ diff --git a/arm_compute/dynamic_fusion/sketch/OperatorAttributes.h b/arm_compute/dynamic_fusion/sketch/OperatorAttributes.h new file mode 100644 index 0000000000..22c6772926 --- /dev/null +++ b/arm_compute/dynamic_fusion/sketch/OperatorAttributes.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_OPERATORATTRIBUTES +#define ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_OPERATORATTRIBUTES + +#include "arm_compute/core/Size2D.h" +#include "arm_compute/core/Types.h" +#include <cstdint> + +namespace arm_compute +{ +namespace experimental +{ +namespace dynamic_fusion +{ +/** Attributes are backend-agnostic parameters (in addition to the input/output tensors) of an operator. + */ + +/** Conv2d attributes */ +class Conv2dAttributes +{ +public: + /** Set padding */ + Conv2dAttributes &pad(const Padding2D &pad); + /** Get padding */ + Padding2D pad() const; + /** Set stride */ + Conv2dAttributes &stride(const Size2D &stride); + /** Get stride */ + Size2D stride() const; + /** Set dilation */ + Conv2dAttributes &dilation(const Size2D &dilation); + /** Get dilation */ + Size2D dilation() const; + +private: + Padding2D _pad{}; /**< Padding */ + Size2D _stride{ 1U, 1U }; /**< Stride */ + Size2D _dilation{ 1U, 1U }; /**< Dilation */ +}; +} // namespace dynamic_fusion +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_OPERATORATTRIBUTES */ diff --git a/arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h b/arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h new file mode 100644 index 0000000000..1ee3c7e3ec --- /dev/null +++ b/arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_GPUWORKLOADCONTEXT +#define ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_GPUWORKLOADCONTEXT + +#include "arm_compute/core/GPUTarget.h" + +#include <memory> + +namespace arm_compute +{ +/** Forward declaration */ +class CLCompileContext; +namespace experimental +{ +namespace dynamic_fusion +{ +/** Gpu Information such as the Gpu target (for example, G76) */ +using GpuTarget = ::arm_compute::GPUTarget; + +/** Gpu Language */ +enum class GpuLanguage +{ + OpenCL, + Unknown +}; +/** Provide context necessary for the creation and configuration of a workload + * e.g. gpu targets and capabilities, cl::Device for querying OpenCl extensions. Both can affect how a kernel is generated + * + * This context is shared between different operators within a sketch, and has to stay valid for the entire workload creation session. + * This context may also be shared between different sketches. + * + * This class only contains information for workload creation, but not for runtime (e.g. cl::Queue for enqueueing the kernels) + */ +class GpuWorkloadContext +{ +public: + /** Constructor */ + GpuWorkloadContext(CLCompileContext *cl_compile_context); + /** Allow instances of this class to be copy constructed */ + GpuWorkloadContext(const GpuWorkloadContext &config) = default; + /** Allow instances of this class to be copied */ + GpuWorkloadContext &operator=(const GpuWorkloadContext &config) = default; + /** Allow instances of this class to be move constructed */ + GpuWorkloadContext(GpuWorkloadContext &&config) = default; + /** Allow instances of this class to be moved */ + GpuWorkloadContext &operator=(GpuWorkloadContext &&config) = default; + /** Get @ref GpuLanguage of the context */ + GpuLanguage gpu_language() const; + /** Get @ref GpuTarget of the context */ + GpuTarget gpu_target() const; + /** Get @ref CLCompileContext + * If the gpu language is not OpenCL, then return nullptr + */ + const CLCompileContext *cl_compile_context() const; + +private: + GpuLanguage _gpu_language{ GpuLanguage::Unknown }; + CLCompileContext *_cl_compile_ctx{ nullptr }; +}; + +} // namespace dynamic_fusion +} // namespace experimental +} // namespace arm_compute + +#endif /* ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_GPUWORKLOADCONTEXT */ diff --git a/arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h b/arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h new file mode 100644 index 0000000000..afbe2b8d0b --- /dev/null +++ b/arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_GPUWORKLOADSKETCH +#define ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_GPUWORKLOADSKETCH + +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h" + +#include <memory> + +namespace arm_compute +{ +namespace experimental +{ +namespace dynamic_fusion +{ +/** A descriptor of a workload of operators + * + * A "workload" is a basic unit of computation to schedule and perform. It contains one or more operators that can be "fused" together. + * Note that a workload may still contain multiple kernels. + */ +class GpuWorkloadSketch +{ +public: + /** Global context used for the creation of a workload */ + using Context = GpuWorkloadContext; + /** Internal opaque implementation */ + class Implementation; + +public: + /** Constructor + * + * @param[in] context Gpu context for the creation of a workload + */ + explicit GpuWorkloadSketch(GpuWorkloadContext *context); + /** Destructor */ + ~GpuWorkloadSketch(); + /** Get the implementation */ + Implementation &implementation(); + /** Get the implementation */ + const Implementation &implementation() const; + /** Get the gpu workload context of this sketch */ + const GpuWorkloadContext *gpu_context() const; + /** Create a @ref TensorInfo associated with the workload sketch. + * + * @return TensorInfo Newly created tensor info + */ + template <typename... Args> + TensorInfo create_tensor_info(Args &&... args) + { + auto tensor_info = TensorInfo(std::forward<Args>(args)...); + tensor_info.set_id(allocate_new_tensor_id()); + return tensor_info; + } + /** Create a @ref TensorInfo associated with the workload sketch by copying from an existing tensor info + * @note The newly copied tensor will have a different identity within the workload than the one copied from + * To copy the identity of @p tensor_info as well, use @ref TensorInfo 's copy constructors instead + * + * @param[in] tensor_info @ref ITensorInfo to copy from + * + * @return TensorInfo Newly created tensor info + */ + TensorInfo create_tensor_info(const ITensorInfo &tensor_info); + /** Create a default @ref TensorInfo associated with the workload sketch + * It is usually used by a destination tensor whose @ref ITensorInfo is to be inferred automatically + * + * @return TensorInfo Newly created tensor info + */ + TensorInfo create_tensor_info(); + +private: + ITensorInfo::Id allocate_new_tensor_id(); + std::unique_ptr<Implementation> _impl; /**< Internal opaque implementation*/ +}; + +} // namespace dynamic_fusion +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_GPUWORKLOADSKETCH */ diff --git a/arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h b/arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h new file mode 100644 index 0000000000..fe9108d356 --- /dev/null +++ b/arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_OPERATORS_GPUCONV2D +#define ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_OPERATORS_GPUCONV2D + +#include "arm_compute/core/Error.h" +#include "arm_compute/dynamic_fusion/sketch/OperatorAttributes.h" + +namespace arm_compute +{ +namespace experimental +{ +namespace dynamic_fusion +{ +/** Forward declaration */ +class GpuWorkloadSketch; + +/** Operator interface. */ +class GpuConv2d final +{ +public: + /** Attributes are a set of backend-agnostic parameters that define what an operator does */ + using Attributes = Conv2dAttributes; + /** Create an operator and fuse it into the workload sketch. + * @note If @ref validate_op() fails, the creation also fails and may throw an error. + * @note If @ref validate_op() fails, @p sketch remains unchanged and valid. + * + * Valid data type configurations: + * |src |wei |bia |dst | + * |:--------------|:--------------|:--------------|:--------------| + * |F16 |F16 |F16 |F16 | + * |F32 |F32 |F32 |F32 | + * + * Valid data layouts: + * - NHWC + * + * @param[in,out] sketch Workload sketch into which the operator will be fused + * @param[in] src Source tensor + * @param[in] wei Weight tensor + * @param[in] bia (Optional) Bias tensor + * @param[out] dst Destination tensor + * @param[in] attributes Operator attributes + */ + static void create_op(GpuWorkloadSketch &sketch, + ITensorInfo *src, + ITensorInfo *wei, + ITensorInfo *bia, + ITensorInfo *dst, + const Attributes &attributes); + /** Validate the operator and check if it can be fused into the workload sketch. + * Similar to @ref GpuConv2d::create_op() + */ + static Status validate_op(const GpuWorkloadSketch &sketch, + const ITensorInfo *src, + const ITensorInfo *wei, + const ITensorInfo *bia, + const ITensorInfo *dst, + const Attributes &attributes); +}; +} // namespace dynamic_fusion +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_GPU_OPERATORS_GPUCONV2D */ |