diff options
Diffstat (limited to 'arm_compute')
-rw-r--r-- | arm_compute/core/CPP/ICPPKernel.h | 24 | ||||
-rw-r--r-- | arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h | 16 | ||||
-rw-r--r-- | arm_compute/core/experimental/Types.h | 71 | ||||
-rw-r--r-- | arm_compute/runtime/CPP/CPPScheduler.h | 16 | ||||
-rw-r--r-- | arm_compute/runtime/IOperator.h | 66 | ||||
-rw-r--r-- | arm_compute/runtime/IScheduler.h | 12 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/INEOperator.h | 67 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/functions/NEGenerateProposalsLayer.h | 7 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/functions/NEReductionOperation.h | 4 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/functions/NEReshapeLayer.h | 51 | ||||
-rw-r--r-- | arm_compute/runtime/NEON/functions/NESoftmaxLayer.h | 8 | ||||
-rw-r--r-- | arm_compute/runtime/OMP/OMPScheduler.h | 15 | ||||
-rw-r--r-- | arm_compute/runtime/OperatorTensor.h | 75 | ||||
-rw-r--r-- | arm_compute/runtime/SingleThreadScheduler.h | 10 | ||||
-rw-r--r-- | arm_compute/runtime/experimental/Types.h | 42 |
15 files changed, 458 insertions, 26 deletions
diff --git a/arm_compute/core/CPP/ICPPKernel.h b/arm_compute/core/CPP/ICPPKernel.h index ec05af20bd..21f6ab714a 100644 --- a/arm_compute/core/CPP/ICPPKernel.h +++ b/arm_compute/core/CPP/ICPPKernel.h @@ -26,10 +26,13 @@ #include "arm_compute/core/CPP/CPPTypes.h" #include "arm_compute/core/IKernel.h" +#include "arm_compute/core/Types.h" +#include "arm_compute/core/experimental/Types.h" namespace arm_compute { class Window; +class ITensor; /** Common interface for all kernels implemented in C++ */ class ICPPKernel : public IKernel @@ -51,8 +54,7 @@ public: */ virtual void run(const Window &window, const ThreadInfo &info) { - ARM_COMPUTE_UNUSED(window); - ARM_COMPUTE_UNUSED(info); + ARM_COMPUTE_UNUSED(window, info); ARM_COMPUTE_ERROR("default implementation of legacy run() virtual member function invoked"); } @@ -69,6 +71,24 @@ public: run(window, info); } + /** Execute the kernel on the passed window + * + * @warning If is_parallelisable() returns false then the passed window must be equal to window() + * + * @note The window has to be a region within the window returned by the window() method + * + * @note The width of the window has to be a multiple of num_elems_processed_per_iteration(). + * + * @param[in] inputs A vector containing the input tensors. + * @param[in] outputs A vector containing the output tensors. + * @param[in] window Region on which to execute the kernel. (Must be a region of the window returned by window()) + * @param[in] info Info about executing thread and CPU. + */ + virtual void run_op(const std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs, const Window &window, const ThreadInfo &info) + { + ARM_COMPUTE_UNUSED(inputs, outputs, window, info); + } + /** Name of the kernel * * @return Kernel name diff --git a/arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h b/arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h index fccf2685a8..6f888e0914 100644 --- a/arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -24,6 +24,7 @@ #ifndef ARM_COMPUTE_NERESHAPELAYERKERNEL_H #define ARM_COMPUTE_NERESHAPELAYERKERNEL_H +#include "arm_compute/core/NEON/INEKernel.h" #include "arm_compute/core/NEON/INESimpleKernel.h" namespace arm_compute @@ -32,19 +33,19 @@ namespace arm_compute class ITensor; /** Interface for the kernel to perform tensor reshaping */ -class NEReshapeLayerKernel : public INESimpleKernel +class NEReshapeLayerKernel : public INEKernel { public: const char *name() const override { return "NEReshapeLayerKernel"; } - /** Set the input and output of the kernel + /** Set the input and output info of the kernel * - * @param[in] input Source tensor. Data type supported: All - * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] input Source tensor info. Data type supported: All + * @param[out] output Destination tensor info. Data type supported: Same as @p input */ - void configure(const ITensor *input, ITensor *output); + void configure(const ITensorInfo *input, ITensorInfo *output); /** Static function to check if given info will lead to a valid configuration of @ref NEReshapeLayerKernel * @@ -56,7 +57,8 @@ public: static Status validate(const ITensorInfo *input, const ITensorInfo *output); // Inherited methods overridden: - void run(const Window &window, const ThreadInfo &info) override; + void run_op(const std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs, const Window &window, const ThreadInfo &info) override; }; + } // namespace arm_compute #endif /*ARM_COMPUTE_NERESHAPELAYERKERNEL_H */ diff --git a/arm_compute/core/experimental/Types.h b/arm_compute/core/experimental/Types.h new file mode 100644 index 0000000000..6043db9ff4 --- /dev/null +++ b/arm_compute/core/experimental/Types.h @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_EXPERIMENTAL_TYPES_H +#define ARM_COMPUTE_EXPERIMENTAL_TYPES_H + +#include "arm_compute/core/TensorShape.h" + +#include <map> +#include <vector> + +namespace arm_compute +{ +class ITensor; + +/** Memory type */ +enum class TensorType +{ + ACL_SRC = 0, + ACL_SRC_0 = 0, + ACL_SRC_1 = 1, + ACL_SRC_2 = 2, + ACL_DST = 30, + ACL_DST_0 = 30, + ACL_DST_1 = 31, + ACL_INT = 50, + ACL_INT_0 = 50, + ACL_INT_1 = 51, + ACL_INT_2 = 52 +}; +using InputOperatorTensors = std::pair<TensorType /* tensor type */, const ITensor * /* tensor object */>; +using OutputOperatorTensors = std::pair<TensorType /* tensor type */, ITensor * /* tensor object */>; +using OperatorTensors = OutputOperatorTensors; + +namespace experimental +{ +struct MemoryInfo +{ + MemoryInfo(TensorType type, size_t size, size_t alignment) + : type(type), size(size), alignment(alignment) + { + } + TensorType type; + size_t size; + size_t alignment; +}; + +using MemoryRequirements = std::vector<MemoryInfo>; +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_EXPERIMENTAL_TYPES_H */ diff --git a/arm_compute/runtime/CPP/CPPScheduler.h b/arm_compute/runtime/CPP/CPPScheduler.h index c8de41bf20..78ad43c2b4 100644 --- a/arm_compute/runtime/CPP/CPPScheduler.h +++ b/arm_compute/runtime/CPP/CPPScheduler.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019 ARM Limited. + * Copyright (c) 2016-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -24,6 +24,7 @@ #ifndef ARM_COMPUTE_CPPSCHEDULER_H #define ARM_COMPUTE_CPPSCHEDULER_H +#include "arm_compute/core/experimental/Types.h" #include "arm_compute/runtime/IScheduler.h" #include <memory> @@ -65,6 +66,18 @@ public: * @param[in] hints Hints for the scheduler. */ void schedule(ICPPKernel *kernel, const Hints &hints) override; + /** Multithread the execution of the passed kernel if possible. + * + * The kernel will run on a single thread if any of these conditions is true: + * - ICPPKernel::is_parallelisable() returns false + * - The scheduler has been initialized with only one thread. + * + * @param[in] kernel Kernel to execute. + * @param[in] hints Hints for the scheduler. + * @param[in] inputs Vector that contains the input tensors. + * @param[in] outputs Vector that contains the output tensors. + */ + void schedule_op(ICPPKernel *kernel, const Hints &hints, std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs) override; protected: /** Will run the workloads in parallel using num_threads @@ -74,6 +87,7 @@ protected: void run_workloads(std::vector<Workload> &workloads) override; private: + void schedule_common(ICPPKernel *kernel, const Hints &hints, std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs); struct Impl; std::unique_ptr<Impl> _impl; }; diff --git a/arm_compute/runtime/IOperator.h b/arm_compute/runtime/IOperator.h new file mode 100644 index 0000000000..110c935702 --- /dev/null +++ b/arm_compute/runtime/IOperator.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_IOPERATOR_H +#define ARM_COMPUTE_IOPERATOR_H + +#include "arm_compute/runtime/IOperator.h" +#include "arm_compute/runtime/IRuntimeContext.h" +#include "arm_compute/runtime/Types.h" + +namespace arm_compute +{ +namespace experimental +{ +/** Base class for all async functions */ +class IOperator +{ +public: + /** Destructor */ + virtual ~IOperator() = default; + /** Run the kernels contained in the function + * + * + * @param[in] inputs Vector that contains the input tensors. + * @param[in] outputs Vector that contains the output tensors. + * @param[in] workspace Vector that contains the workspace tensors. + * + */ + virtual void run(std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs, std::vector<OperatorTensors *> &workspace) = 0; + /** Prepare the function for executing + * + * Any one off pre-processing step required by the function is handled here + * + * @param[in] constants Vector that contains the constants tensors. + * + * @note Prepare stage might not need all the function's buffers' backing memory to be available in order to execute + */ + virtual void prepare(std::vector<OperatorTensors *> constants) = 0; + + /** Return the memory requirements required by the workspace + */ + virtual MemoryRequirements workspace() const = 0; +}; +} // namespace experimental +} // namespace arm_compute +#endif /*ARM_COMPUTE_IOPERATOR_H */ diff --git a/arm_compute/runtime/IScheduler.h b/arm_compute/runtime/IScheduler.h index a5e20ee627..02d0cef086 100644 --- a/arm_compute/runtime/IScheduler.h +++ b/arm_compute/runtime/IScheduler.h @@ -25,6 +25,8 @@ #define ARM_COMPUTE_ISCHEDULER_H #include "arm_compute/core/CPP/CPPTypes.h" +#include "arm_compute/core/Types.h" +#include "arm_compute/core/experimental/Types.h" #include <functional> #include <limits> @@ -32,6 +34,7 @@ namespace arm_compute { class ICPPKernel; +class ITensor; /** Scheduler interface to run kernels */ class IScheduler @@ -147,6 +150,15 @@ public: */ virtual void schedule(ICPPKernel *kernel, const Hints &hints) = 0; + /** Runs the kernel in the same thread as the caller synchronously. + * + * @param[in] kernel Kernel to execute. + * @param[in] hints Hints for the scheduler. + * @param[in] inputs Vector containing the input tensors. + * @param[in] outputs Vector containing the output tensors. + */ + virtual void schedule_op(ICPPKernel *kernel, const Hints &hints, std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs) = 0; + /** Execute all the passed workloads * * @note there is no guarantee regarding the order in which the workloads will be executed or whether or not they will be executed in parallel. diff --git a/arm_compute/runtime/NEON/INEOperator.h b/arm_compute/runtime/NEON/INEOperator.h new file mode 100644 index 0000000000..4467e6d5ab --- /dev/null +++ b/arm_compute/runtime/NEON/INEOperator.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_INEOPERATOR_H +#define ARM_COMPUTE_INEOPERATOR_H + +#include "arm_compute/core/NEON/INEKernel.h" +#include "arm_compute/runtime/IOperator.h" +#include "arm_compute/runtime/IRuntimeContext.h" +#include "arm_compute/runtime/Types.h" + +#include <memory> + +namespace arm_compute +{ +namespace experimental +{ +/** Basic interface for functions which have a single async NEON kernel */ +class INEOperator : public IOperator +{ +public: + /** Constructor + * + * @param[in] ctx Runtime context to be used by the function + */ + INEOperator(IRuntimeContext *ctx = nullptr); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + INEOperator(const INEOperator &) = delete; + /** Default move constructor */ + INEOperator(INEOperator &&) = default; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + INEOperator &operator=(const INEOperator &) = delete; + /** Default move assignment operator */ + INEOperator &operator=(INEOperator &&) = default; + + // Inherited methods overridden: + void run(std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs, std::vector<OperatorTensors *> &workspace) override final; + void prepare(std::vector<OperatorTensors *> constants) override final; + +protected: + std::unique_ptr<INEKernel> _kernel; + IRuntimeContext *_ctx; + MemoryRequirements _workspace; +}; +} // namespace experimental +} // namespace arm_compute +#endif /*ARM_COMPUTE_INEOPERATOR_H */ diff --git a/arm_compute/runtime/NEON/functions/NEGenerateProposalsLayer.h b/arm_compute/runtime/NEON/functions/NEGenerateProposalsLayer.h index 7c470fbaf0..7260434606 100644 --- a/arm_compute/runtime/NEON/functions/NEGenerateProposalsLayer.h +++ b/arm_compute/runtime/NEON/functions/NEGenerateProposalsLayer.h @@ -23,18 +23,19 @@ */ #ifndef ARM_COMPUTE_NEGENERATEPROPOSALSLAYER_H #define ARM_COMPUTE_NEGENERATEPROPOSALSLAYER_H + #include "arm_compute/core/NEON/kernels/NEBoundingBoxTransformKernel.h" #include "arm_compute/core/NEON/kernels/NEDequantizationLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEGenerateProposalsLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEPadLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEPermuteKernel.h" #include "arm_compute/core/NEON/kernels/NEQuantizationLayerKernel.h" -#include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/Types.h" #include "arm_compute/runtime/CPP/CPPScheduler.h" #include "arm_compute/runtime/CPP/functions/CPPBoxWithNonMaximaSuppressionLimit.h" #include "arm_compute/runtime/IFunction.h" #include "arm_compute/runtime/MemoryGroup.h" +#include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h" #include "arm_compute/runtime/Tensor.h" namespace arm_compute @@ -112,9 +113,9 @@ private: // Neon kernels NEPermuteKernel _permute_deltas_kernel; - NEReshapeLayerKernel _flatten_deltas_kernel; + NEReshapeLayer _flatten_deltas; NEPermuteKernel _permute_scores_kernel; - NEReshapeLayerKernel _flatten_scores_kernel; + NEReshapeLayer _flatten_scores; NEComputeAllAnchorsKernel _compute_anchors_kernel; NEBoundingBoxTransformKernel _bounding_box_kernel; NEPadLayerKernel _pad_kernel; diff --git a/arm_compute/runtime/NEON/functions/NEReductionOperation.h b/arm_compute/runtime/NEON/functions/NEReductionOperation.h index abda4159ba..78e8b04dbb 100644 --- a/arm_compute/runtime/NEON/functions/NEReductionOperation.h +++ b/arm_compute/runtime/NEON/functions/NEReductionOperation.h @@ -28,8 +28,8 @@ #include "arm_compute/core/NEON/kernels/NEFillBorderKernel.h" #include "arm_compute/core/NEON/kernels/NEReductionOperationKernel.h" -#include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/Types.h" +#include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h" #include "arm_compute/runtime/Tensor.h" namespace arm_compute @@ -76,7 +76,7 @@ private: MemoryGroup _memory_group; NEReductionOperationKernel _reduction_kernel; NEFillBorderKernel _fill_border_kernel; - NEReshapeLayerKernel _reshape_kernel; + NEReshapeLayer _reshape; Tensor _output_internal; size_t _window_split; int _reduction_axis; diff --git a/arm_compute/runtime/NEON/functions/NEReshapeLayer.h b/arm_compute/runtime/NEON/functions/NEReshapeLayer.h index d6643842d9..5a296a776d 100644 --- a/arm_compute/runtime/NEON/functions/NEReshapeLayer.h +++ b/arm_compute/runtime/NEON/functions/NEReshapeLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -24,8 +24,11 @@ #ifndef ARM_COMPUTE_NERESHAPELAYER_H #define ARM_COMPUTE_NERESHAPELAYER_H +#include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/Types.h" -#include "arm_compute/runtime/NEON/INESimpleFunctionNoBorder.h" +#include "arm_compute/runtime/IFunction.h" +#include "arm_compute/runtime/NEON/INEOperator.h" +#include "arm_compute/runtime/Types.h" namespace arm_compute { @@ -33,24 +36,62 @@ namespace arm_compute class ITensor; /** Basic function to run @ref NEReshapeLayerKernel */ -class NEReshapeLayer : public INESimpleFunctionNoBorder +class NEReshapeLayer : public IFunction { public: /** Initialise the kernel's inputs and outputs * - * @param[in] input First tensor input. Data type supported: All + * @param[in] input Input tensor. Data type supported: All * @param[out] output Output tensor. Data type supported: Same as @p input */ void configure(const ITensor *input, ITensor *output); /** Static function to check if given info will lead to a valid configuration of @ref NEReshapeLayer * - * @param[in] input First tensor info. Data type supported: All + * @param[in] input Input tensor info. Data type supported: All * @param[in] output Output tensor info. Data type supported: Same as @p input * * @return a status */ static Status validate(const ITensorInfo *input, const ITensorInfo *output); + + // Inherited methods overridden: + void run() override; + +private: + const ITensor *_input + { + nullptr + }; + ITensor *_output{ nullptr }; + std::unique_ptr<NEReshapeLayerKernel> _kernel{ nullptr }; +}; + +namespace experimental +{ +/** Basic function to run @ref NEReshapeLayerKernel */ +class NEReshapeLayer : public INEOperator +{ +public: + /** Initialise the kernel's inputs and outputs + * + * @param[in] input Input tensor info. Data type supported: All + * @param[out] output Output info. Data type supported: Same as @p input + */ + void configure(const ITensorInfo *input, ITensorInfo *output); + + /** Static function to check if given info will lead to a valid configuration of @ref NEReshapeLayer + * + * @param[in] input Input tensor info. Data type supported: All + * @param[in] output Output tensor info. Data type supported: Same as @p input + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output); + + // Inherited methods overridden: + MemoryRequirements workspace() const override; }; +} // namespace experimental } // namespace arm_compute #endif /*ARM_COMPUTE_NERESHAPELAYER_H */ diff --git a/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h b/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h index c5c83d8b5a..51d981de44 100644 --- a/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h +++ b/arm_compute/runtime/NEON/functions/NESoftmaxLayer.h @@ -25,11 +25,11 @@ #define ARM_COMPUTE_NESOFTMAXLAYER_H #include "arm_compute/core/NEON/kernels/NEFillBorderKernel.h" -#include "arm_compute/core/NEON/kernels/NEFlattenLayerKernel.h" -#include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/NEON/kernels/NESoftmaxLayerKernel.h" #include "arm_compute/runtime/IFunction.h" #include "arm_compute/runtime/MemoryGroup.h" +#include "arm_compute/runtime/NEON/functions/NEFlattenLayer.h" +#include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h" #include "arm_compute/runtime/Tensor.h" namespace arm_compute @@ -119,9 +119,9 @@ private: MemoryGroup _memory_group; NELogits1DMaxKernel _max_kernel; NELogits1DSoftmaxKernel<IS_LOG> _softmax_kernel; - std::unique_ptr<INEKernel> _flat_or_reshape_kernel_ptr; + std::unique_ptr<IFunction> _flat_or_reshape_ptr; NEFillBorderKernel _fill_border_kernel; - NEReshapeLayerKernel _reshape_kernel; + NEReshapeLayer _reshape; Tensor _max; Tensor _tmp; Tensor _input_flattened; diff --git a/arm_compute/runtime/OMP/OMPScheduler.h b/arm_compute/runtime/OMP/OMPScheduler.h index ed00833a9c..8ed1705a97 100644 --- a/arm_compute/runtime/OMP/OMPScheduler.h +++ b/arm_compute/runtime/OMP/OMPScheduler.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -55,6 +55,19 @@ public: */ void schedule(ICPPKernel *kernel, const Hints &hints) override; + /** Multithread the execution of the passed kernel if possible. + * + * The kernel will run on a single thread if any of these conditions is true: + * - ICPPKernel::is_parallelisable() returns false + * - The scheduler has been initialized with only one thread. + * + * @param[in] kernel Kernel to execute. + * @param[in] hints Hints for the scheduler. + * @param[in] inputs Vector containing the input tensors. + * @param[in] outputs Vector containing the output tensors. + */ + void schedule_op(ICPPKernel *kernel, const Hints &hints, std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs) override; + protected: /** Execute all the passed workloads * diff --git a/arm_compute/runtime/OperatorTensor.h b/arm_compute/runtime/OperatorTensor.h new file mode 100644 index 0000000000..3901f93291 --- /dev/null +++ b/arm_compute/runtime/OperatorTensor.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_OPERATORTENSOR_H +#define ARM_COMPUTE_OPERATORTENSOR_H + +#include "arm_compute/core/ITensor.h" +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/runtime/Types.h" +#include "arm_compute/runtime/experimental/Types.h" + +#include <cstdint> + +namespace arm_compute +{ +class TensorInfo; +class IRuntimeContext; +class IMemory; +namespace experimental +{ +/** Basic implementation of the tensor interface */ +class OperatorTensor : public ITensor +{ +public: + /** Constructor + * + * @param[in] info Pointer to the tensor info. + * @param[in] memory Pointer to the memory info. + * + */ + OperatorTensor(ITensorInfo *info, IMemory *memory); + /** Destructor: free the tensor's memory */ + ~OperatorTensor() = default; + /** Allow instances of this class to be move constructed */ + OperatorTensor(OperatorTensor &&) = default; + /** Allow instances of this class to be moved */ + OperatorTensor &operator=(OperatorTensor &&) = default; + /** Prevent instances of this class to be copy assigned */ + OperatorTensor &operator=(const OperatorTensor &) = delete; + /** Prevent instances of this class to be copy constructed */ + OperatorTensor(const OperatorTensor &) = delete; + + // Inherited methods overridden: + arm_compute::ITensorInfo *info() const override; + arm_compute::ITensorInfo *info() override; + uint8_t *buffer() const override; + +private: + arm_compute::ITensorInfo *_info; + arm_compute::IMemory *_memory; + MemoryType _mem_type; +}; +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_OPERATORTENSOR_H */ diff --git a/arm_compute/runtime/SingleThreadScheduler.h b/arm_compute/runtime/SingleThreadScheduler.h index 3f279ebb19..8094758249 100644 --- a/arm_compute/runtime/SingleThreadScheduler.h +++ b/arm_compute/runtime/SingleThreadScheduler.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -50,6 +50,14 @@ public: * @param[in] hints Hints for the scheduler. */ void schedule(ICPPKernel *kernel, const Hints &hints) override; + /** Runs the kernel in the same thread as the caller synchronously. + * + * @param[in] kernel Kernel to execute. + * @param[in] hints Hints for the scheduler. + * @param[in] inputs Vector containing the input tensors. + * @param[in] outputs Vector containing the output tensors. + */ + void schedule_op(ICPPKernel *kernel, const Hints &hints, std::vector<InputOperatorTensors *> &inputs, std::vector<OutputOperatorTensors *> &outputs) override; protected: /** Will run the workloads sequentially and in order. diff --git a/arm_compute/runtime/experimental/Types.h b/arm_compute/runtime/experimental/Types.h new file mode 100644 index 0000000000..bced0072b8 --- /dev/null +++ b/arm_compute/runtime/experimental/Types.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_RUNTIME_EXPERIMENTAL_TYPES_H +#define ARM_COMPUTE_RUNTIME_EXPERIMENTAL_TYPES_H + +#include <vector> + +namespace arm_compute +{ +namespace experimental +{ +/** Memory type */ +enum class MemoryType +{ + CPU, + CL, + GLES +}; +} // namespace experimental +} // namespace arm_compute +#endif /* ARM_COMPUTE_RUNTIME_EXPERIMENTAL_TYPES_H */ |