diff options
28 files changed, 149 insertions, 96 deletions
diff --git a/arm_compute/core/QuantizationInfo.h b/arm_compute/core/QuantizationInfo.h index f760d7512c..8fa513eee1 100644 --- a/arm_compute/core/QuantizationInfo.h +++ b/arm_compute/core/QuantizationInfo.h @@ -24,13 +24,10 @@ #ifndef ARM_COMPUTE_QUANTIZATION_INFO_H #define ARM_COMPUTE_QUANTIZATION_INFO_H -#include "arm_compute/core/Error.h" #include "arm_compute/core/Rounding.h" +#include "arm_compute/core/utils/misc/Utility.h" #include "support/ToolchainSupport.h" -#include "utils/misc/Utility.h" -#include <cstddef> -#include <type_traits> #include <vector> namespace arm_compute diff --git a/arm_compute/core/Utils.h b/arm_compute/core/Utils.h index edeae21c6f..188ae8cf5b 100644 --- a/arm_compute/core/Utils.h +++ b/arm_compute/core/Utils.h @@ -593,59 +593,6 @@ inline std::tuple<PixelValue, PixelValue> get_min_max(DataType dt) return std::make_tuple(min, max); } -/** Return true if the given format has horizontal subsampling. - * - * @param[in] format Format to determine subsampling. - * - * @return True if the format can be subsampled horizontaly. - */ -inline bool has_format_horizontal_subsampling(Format format) -{ - return (format == Format::YUYV422 || format == Format::UYVY422 || format == Format::NV12 || format == Format::NV21 || format == Format::IYUV || format == Format::UV88) ? true : false; -} - -/** Return true if the given format has vertical subsampling. - * - * @param[in] format Format to determine subsampling. - * - * @return True if the format can be subsampled verticaly. - */ -inline bool has_format_vertical_subsampling(Format format) -{ - return (format == Format::NV12 || format == Format::NV21 || format == Format::IYUV || format == Format::UV88) ? true : false; -} - -/** Calculate subsampled shape for a given format and channel - * - * @param[in] shape Shape of the tensor to calculate the extracted channel. - * @param[in] format Format of the tensor. - * @param[in] channel Channel to create tensor shape to be extracted. - * - * @return The subsampled tensor shape. - */ -inline TensorShape calculate_subsampled_shape(const TensorShape &shape, Format format, Channel channel = Channel::UNKNOWN) -{ - TensorShape output{ shape }; - - // Subsample shape only for U or V channel - if(Channel::U == channel || Channel::V == channel || Channel::UNKNOWN == channel) - { - // Subsample width for the tensor shape when channel is U or V - if(has_format_horizontal_subsampling(format)) - { - output.set(0, output.x() / 2U); - } - - // Subsample height for the tensor shape when channel is U or V - if(has_format_vertical_subsampling(format)) - { - output.set(1, output.y() / 2U); - } - } - - return output; -} - /** Permutes the given dimensions according the permutation vector * * @param[in,out] dimensions Dimensions to be permuted. diff --git a/arm_compute/core/Validate.h b/arm_compute/core/Validate.h index 7e387c9cc1..ff4540cd8a 100644 --- a/arm_compute/core/Validate.h +++ b/arm_compute/core/Validate.h @@ -27,6 +27,7 @@ #include "arm_compute/core/Error.h" #include "arm_compute/core/IKernel.h" #include "arm_compute/core/ITensor.h" +#include "arm_compute/core/QuantizationInfo.h" #include "arm_compute/core/Utils.h" #include "arm_compute/core/Window.h" @@ -285,6 +286,28 @@ arm_compute::Status error_on_mismatching_dimensions(const char *function, const #define ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(...) \ ARM_COMPUTE_RETURN_ON_ERROR(::arm_compute::error_on_mismatching_dimensions(__func__, __FILE__, __LINE__, __VA_ARGS__)) +/** Return true if the given format has horizontal subsampling. + * + * @param[in] format Format to determine subsampling. + * + * @return True if the format can be subsampled horizontaly. + */ +inline bool has_format_horizontal_subsampling(Format format) +{ + return (format == Format::YUYV422 || format == Format::UYVY422 || format == Format::NV12 || format == Format::NV21 || format == Format::IYUV || format == Format::UV88) ? true : false; +} + +/** Return true if the given format has vertical subsampling. + * + * @param[in] format Format to determine subsampling. + * + * @return True if the format can be subsampled verticaly. + */ +inline bool has_format_vertical_subsampling(Format format) +{ + return (format == Format::NV12 || format == Format::NV21 || format == Format::IYUV || format == Format::UV88) ? true : false; +} + /** Adjust tensor shape size if width or height are odd for a given multi-planar format. No modification is done for other formats. * * @note Adding here a few links discussing the issue of odd size and sharing the same solution: @@ -349,6 +372,37 @@ arm_compute::Status error_on_tensors_not_even(const char *function, const char * #define ARM_COMPUTE_RETURN_ERROR_ON_TENSORS_NOT_EVEN(...) \ ARM_COMPUTE_RETURN_ON_ERROR(::arm_compute::error_on_tensors_not_even(__func__, __FILE__, __LINE__, __VA_ARGS__)) +/** Calculate subsampled shape for a given format and channel + * + * @param[in] shape Shape of the tensor to calculate the extracted channel. + * @param[in] format Format of the tensor. + * @param[in] channel Channel to create tensor shape to be extracted. + * + * @return The subsampled tensor shape. + */ +inline TensorShape calculate_subsampled_shape(const TensorShape &shape, Format format, Channel channel = Channel::UNKNOWN) +{ + TensorShape output{ shape }; + + // Subsample shape only for U or V channel + if(Channel::U == channel || Channel::V == channel || Channel::UNKNOWN == channel) + { + // Subsample width for the tensor shape when channel is U or V + if(has_format_horizontal_subsampling(format)) + { + output.set(0, output.x() / 2U); + } + + // Subsample height for the tensor shape when channel is U or V + if(has_format_vertical_subsampling(format)) + { + output.set(1, output.y() / 2U); + } + } + + return output; +} + /** Return an error if the passed tensor objects are not sub-sampled. * * @param[in] function Function in which the error occurred. diff --git a/arm_compute/graph/Graph.h b/arm_compute/graph/Graph.h index d8d3feb1f7..806d84c3fd 100644 --- a/arm_compute/graph/Graph.h +++ b/arm_compute/graph/Graph.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020 Arm Limited. + * Copyright (c) 2018-2020,2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -30,7 +30,6 @@ #include "arm_compute/graph/Types.h" #include "support/Mutex.h" -#include "support/ToolchainSupport.h" #include <map> #include <memory> diff --git a/arm_compute/runtime/CPP/functions/CPPSplit.h b/arm_compute/runtime/CPP/functions/CPPSplit.h index e2e5add264..56aad2db4b 100644 --- a/arm_compute/runtime/CPP/functions/CPPSplit.h +++ b/arm_compute/runtime/CPP/functions/CPPSplit.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021 Arm Limited. + * Copyright (c) 2020-2021,2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -30,8 +30,6 @@ #include "arm_compute/core/Types.h" #include "arm_compute/core/utils/misc/ShapeCalculator.h" -#include "support/ToolchainSupport.h" - #include "arm_compute/runtime/IFunction.h" namespace arm_compute diff --git a/src/cpu/CpuTypes.h b/src/cpu/CpuTypes.h new file mode 100644 index 0000000000..0f7b9b6552 --- /dev/null +++ b/src/cpu/CpuTypes.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2023 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CPUTYPES +#define ARM_COMPUTE_CPUTYPES + +namespace arm_compute +{ +/* Type definitions compatible with arm_neon.h and arm_sve.h */ +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +typedef __fp16 float16_t; +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +typedef float float32_t; +} + +#endif /* ARM_COMPUTE_CPUTYPES */ diff --git a/src/cpu/kernels/CpuDepthwiseConv2dNativeKernel.cpp b/src/cpu/kernels/CpuDepthwiseConv2dNativeKernel.cpp index f47df1e405..d6c56d2012 100644 --- a/src/cpu/kernels/CpuDepthwiseConv2dNativeKernel.cpp +++ b/src/cpu/kernels/CpuDepthwiseConv2dNativeKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 Arm Limited. + * Copyright (c) 2019-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -32,7 +32,6 @@ #include "src/core/helpers/AutoConfiguration.h" #include "src/core/helpers/WindowHelpers.h" #include "src/cpu/kernels/depthwiseconv2d/list.h" -#include "support/ToolchainSupport.h" namespace arm_compute { diff --git a/src/cpu/kernels/CpuMaxUnpoolingLayerKernel.cpp b/src/cpu/kernels/CpuMaxUnpoolingLayerKernel.cpp index 604f22f6cc..7d077c75bf 100644 --- a/src/cpu/kernels/CpuMaxUnpoolingLayerKernel.cpp +++ b/src/cpu/kernels/CpuMaxUnpoolingLayerKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022 Arm Limited. + * Copyright (c) 2020-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -32,7 +32,6 @@ #include "src/core/helpers/AutoConfiguration.h" #include "src/core/helpers/WindowHelpers.h" #include "src/cpu/kernels/maxunpool/list.h" -#include "support/ToolchainSupport.h" namespace arm_compute { @@ -145,4 +144,4 @@ const std::vector<CpuMaxUnpoolingLayerKernel::MaxUnpoolingKernel> &CpuMaxUnpooli } } // namespace kernels } // namespace cpu -} // namespace arm_compute
\ No newline at end of file +} // namespace arm_compute diff --git a/src/cpu/kernels/add/generic/neon/fp16.cpp b/src/cpu/kernels/add/generic/neon/fp16.cpp index a847cb6f34..fca7b2cd9f 100644 --- a/src/cpu/kernels/add/generic/neon/fp16.cpp +++ b/src/cpu/kernels/add/generic/neon/fp16.cpp @@ -23,8 +23,8 @@ */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/add/generic/neon/impl.h" -#include "support/ToolchainSupport.h" namespace arm_compute { diff --git a/src/cpu/kernels/add/generic/sve/fp16.cpp b/src/cpu/kernels/add/generic/sve/fp16.cpp index f3128030c8..581f3abded 100644 --- a/src/cpu/kernels/add/generic/sve/fp16.cpp +++ b/src/cpu/kernels/add/generic/sve/fp16.cpp @@ -24,10 +24,9 @@ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/add/generic/sve/impl.h" -#include "support/ToolchainSupport.h" - namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/addmuladd/generic/neon/fp16.cpp b/src/cpu/kernels/addmuladd/generic/neon/fp16.cpp index 6fce1cd9c4..15f62fe502 100644 --- a/src/cpu/kernels/addmuladd/generic/neon/fp16.cpp +++ b/src/cpu/kernels/addmuladd/generic/neon/fp16.cpp @@ -27,6 +27,7 @@ #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" #include "arm_compute/core/Window.h" +#include "src/cpu/CpuTypes.h" #include <cstddef> #include <cstdint> @@ -35,6 +36,8 @@ #if defined(__aarch64__) && defined(ENABLE_FP16_KERNELS) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) namespace { +using arm_compute::float16_t; + void a64_add_bn_clamp_direct_fp16_2x32( float16_t *out, size_t out_stride, float16_t *out_direct, size_t out_direct_stride, diff --git a/src/cpu/kernels/boundingboxtransform/generic/neon/fp16.cpp b/src/cpu/kernels/boundingboxtransform/generic/neon/fp16.cpp index 6826ff6691..5661479059 100644 --- a/src/cpu/kernels/boundingboxtransform/generic/neon/fp16.cpp +++ b/src/cpu/kernels/boundingboxtransform/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,7 +22,9 @@ * SOFTWARE. */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/boundingboxtransform/generic/neon/impl.h" + namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/boundingboxtransform/generic/neon/impl.cpp b/src/cpu/kernels/boundingboxtransform/generic/neon/impl.cpp index 2d08c879cc..d74a8a712d 100644 --- a/src/cpu/kernels/boundingboxtransform/generic/neon/impl.cpp +++ b/src/cpu/kernels/boundingboxtransform/generic/neon/impl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 Arm Limited. + * Copyright (c) 2019-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,6 +22,9 @@ * SOFTWARE. */ #include "src/cpu/kernels/boundingboxtransform/generic/neon/impl.h" + +#include "src/cpu/CpuTypes.h" + namespace arm_compute { namespace cpu @@ -143,4 +146,4 @@ template void bounding_box_transform<float>(const ITensor *boxes, ITensor *pred_ template void bounding_box_transform<float16_t>(const ITensor *boxes, ITensor *pred_boxes, const ITensor *deltas, BoundingBoxTransformInfo bbinfo, const Window &window); #endif //defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) } // namespace cpu -} // namespace arm_compute
\ No newline at end of file +} // namespace arm_compute diff --git a/src/cpu/kernels/cast/generic/neon/fp16.cpp b/src/cpu/kernels/cast/generic/neon/fp16.cpp index d2c66923cc..385ca1898d 100644 --- a/src/cpu/kernels/cast/generic/neon/fp16.cpp +++ b/src/cpu/kernels/cast/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2022 Arm Limited. + * Copyright (c) 2016-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -28,6 +28,8 @@ #include "src/cpu/kernels/cast/list.h" #include "support/SaturateCast.h" +#include "arm_neon.h" + namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/depthwiseconv2d/generic/neon/fp16.cpp b/src/cpu/kernels/depthwiseconv2d/generic/neon/fp16.cpp index 553d816ff0..e85a1664ea 100644 --- a/src/cpu/kernels/depthwiseconv2d/generic/neon/fp16.cpp +++ b/src/cpu/kernels/depthwiseconv2d/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,7 +22,9 @@ * SOFTWARE. */ #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/depthwiseconv2d/generic/neon/impl.h" + namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/elementwise_unary/generic/sve/fp16.cpp b/src/cpu/kernels/elementwise_unary/generic/sve/fp16.cpp index 01567a7852..a883309b2e 100644 --- a/src/cpu/kernels/elementwise_unary/generic/sve/fp16.cpp +++ b/src/cpu/kernels/elementwise_unary/generic/sve/fp16.cpp @@ -23,6 +23,7 @@ */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) #include "arm_compute/core/Helpers.h" +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/elementwise_unary/generic/sve/impl.h" namespace arm_compute diff --git a/src/cpu/kernels/elementwise_unary/generic/sve/fp32.cpp b/src/cpu/kernels/elementwise_unary/generic/sve/fp32.cpp index 47645ff80f..b21ed8ddbc 100644 --- a/src/cpu/kernels/elementwise_unary/generic/sve/fp32.cpp +++ b/src/cpu/kernels/elementwise_unary/generic/sve/fp32.cpp @@ -23,6 +23,7 @@ */ #include "arm_compute/core/Helpers.h" +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/elementwise_unary/generic/sve/impl.h" namespace arm_compute diff --git a/src/cpu/kernels/instancenorm/generic/neon/impl.h b/src/cpu/kernels/instancenorm/generic/neon/impl.h index fa4b4b656c..1d413a9bcd 100644 --- a/src/cpu/kernels/instancenorm/generic/neon/impl.h +++ b/src/cpu/kernels/instancenorm/generic/neon/impl.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -24,6 +24,9 @@ #ifndef SRC_CORE_SVE_KERNELS_INSTANCENORM_IMPL_H #define SRC_CORE_SVE_KERNELS_INSTANCENORM_IMPL_H #include "arm_compute/core/Helpers.h" + +#include "arm_neon.h" + namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/l2normlayer/generic/neon/fp16.cpp b/src/cpu/kernels/l2normlayer/generic/neon/fp16.cpp index ed84c10d72..661c3d7f46 100644 --- a/src/cpu/kernels/l2normlayer/generic/neon/fp16.cpp +++ b/src/cpu/kernels/l2normlayer/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,9 +23,11 @@ */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "arm_compute/core/Helpers.h" + +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/l2normlayer/generic/neon/impl.h" -#include "arm_compute/core/Helpers.h" namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/meanstddevnorm/generic/neon/fp16.cpp b/src/cpu/kernels/meanstddevnorm/generic/neon/fp16.cpp index 3e712b5593..47bf64ae57 100644 --- a/src/cpu/kernels/meanstddevnorm/generic/neon/fp16.cpp +++ b/src/cpu/kernels/meanstddevnorm/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,6 +22,7 @@ * SOFTWARE. */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/meanstddevnorm/generic/neon/impl.h" namespace arm_compute diff --git a/src/cpu/kernels/pool3d/neon/fp16.cpp b/src/cpu/kernels/pool3d/neon/fp16.cpp index b79bcd93b5..0130a96098 100644 --- a/src/cpu/kernels/pool3d/neon/fp16.cpp +++ b/src/cpu/kernels/pool3d/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,7 +22,9 @@ * SOFTWARE. */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/pool3d/neon/impl.h" + namespace arm_compute { namespace cpu @@ -33,4 +35,4 @@ void neon_fp16_pool3d(const ITensor *src, ITensor *dst0, Pooling3dLayerInfo &poo } } // namespace cpu } // namespace arm_compute -#endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */
\ No newline at end of file +#endif /* defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) */ diff --git a/src/cpu/kernels/roialign/generic/neon/fp16.cpp b/src/cpu/kernels/roialign/generic/neon/fp16.cpp index 6e585a4dfa..c265d5d4eb 100644 --- a/src/cpu/kernels/roialign/generic/neon/fp16.cpp +++ b/src/cpu/kernels/roialign/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,7 +22,9 @@ * SOFTWARE. */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/roialign/generic/neon/impl.h" + namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/roialign/generic/neon/impl.cpp b/src/cpu/kernels/roialign/generic/neon/impl.cpp index a4502e703d..630d649aba 100644 --- a/src/cpu/kernels/roialign/generic/neon/impl.cpp +++ b/src/cpu/kernels/roialign/generic/neon/impl.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 Arm Limited. + * Copyright (c) 2019-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,7 +22,10 @@ * SOFTWARE. */ #include "src/cpu/kernels/roialign/generic/neon/impl.h" + #include "src/core/NEON/INEKernel.h" +#include "src/cpu/CpuTypes.h" + namespace arm_compute { namespace cpu diff --git a/src/cpu/kernels/softmax/generic/neon/fp16.cpp b/src/cpu/kernels/softmax/generic/neon/fp16.cpp index 3cb1cd683e..f6556696b0 100644 --- a/src/cpu/kernels/softmax/generic/neon/fp16.cpp +++ b/src/cpu/kernels/softmax/generic/neon/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. + * Copyright (c) 2021-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,6 +23,7 @@ */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #include "arm_compute/core/Helpers.h" +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/softmax/generic/neon/impl.h" namespace arm_compute diff --git a/src/cpu/kernels/softmax/generic/sve/fp16.cpp b/src/cpu/kernels/softmax/generic/sve/fp16.cpp index 7aefcb1441..15a523bfc9 100644 --- a/src/cpu/kernels/softmax/generic/sve/fp16.cpp +++ b/src/cpu/kernels/softmax/generic/sve/fp16.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022 Arm Limited. + * Copyright (c) 2021-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,6 +23,7 @@ */ #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && defined(ENABLE_FP16_KERNELS) #include "arm_compute/core/Helpers.h" +#include "src/cpu/CpuTypes.h" #include "src/cpu/kernels/softmax/generic/sve/impl.h" namespace arm_compute { diff --git a/src/graph/backends/NEON/NEDeviceBackend.cpp b/src/graph/backends/NEON/NEDeviceBackend.cpp index 47ef2c2394..18456538da 100644 --- a/src/graph/backends/NEON/NEDeviceBackend.cpp +++ b/src/graph/backends/NEON/NEDeviceBackend.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2021 Arm Limited. + * Copyright (c) 2018-2021,2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -44,8 +44,6 @@ #include "arm_compute/runtime/PoolManager.h" #include "arm_compute/runtime/Scheduler.h" -#include "support/ToolchainSupport.h" - namespace arm_compute { namespace graph diff --git a/src/graph/backends/NEON/NEFunctionFactory.cpp b/src/graph/backends/NEON/NEFunctionFactory.cpp index 0fc5291648..57c64475ec 100644 --- a/src/graph/backends/NEON/NEFunctionFactory.cpp +++ b/src/graph/backends/NEON/NEFunctionFactory.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2021 Arm Limited. + * Copyright (c) 2018-2021,2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -32,8 +32,6 @@ #include "arm_compute/graph/nodes/Nodes.h" #include "arm_compute/runtime/CPP/CPPFunctions.h" #include "arm_compute/runtime/NEON/NEFunctions.h" -#include "support/Cast.h" -#include "support/ToolchainSupport.h" using namespace arm_compute::utils::cast; diff --git a/support/ToolchainSupport.h b/support/ToolchainSupport.h index 0557d1d775..96826dad5e 100644 --- a/support/ToolchainSupport.h +++ b/support/ToolchainSupport.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2022 Arm Limited. + * Copyright (c) 2017-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -33,10 +33,6 @@ #include <string> #include <type_traits> -#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -#include <arm_neon.h> -#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC - #include "support/Bfloat16.h" #include "support/Half.h" @@ -46,6 +42,10 @@ namespace arm_compute { +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +typedef __fp16 float16_t; +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + namespace support { namespace cpp11 |