diff options
4 files changed, 19 insertions, 13 deletions
diff --git a/arm_compute/core/NEON/kernels/NEBatchToSpaceLayerKernel.h b/arm_compute/core/NEON/kernels/NEBatchToSpaceLayerKernel.h index e9bbf4eb03..61e47b0ea4 100644 --- a/arm_compute/core/NEON/kernels/NEBatchToSpaceLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NEBatchToSpaceLayerKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -92,6 +92,7 @@ private: const ITensor *_input; /**< Source tensor */ const ITensor *_block_shape; /**< Block shape tensor */ ITensor *_output; /**< Destination tensor */ + DataLayout _data_layout; /**< Data layout to be used at run-time */ int32_t _block_shape_x; int32_t _block_shape_y; diff --git a/arm_compute/core/NEON/kernels/NESpaceToBatchLayerKernel.h b/arm_compute/core/NEON/kernels/NESpaceToBatchLayerKernel.h index ec88f03df4..532fbb2852 100644 --- a/arm_compute/core/NEON/kernels/NESpaceToBatchLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NESpaceToBatchLayerKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -101,6 +101,7 @@ private: const ITensor *_block_shape; /**< Block shape tensor */ const ITensor *_paddings; /**< Paddings tensor */ ITensor *_output; /**< Destination tensor */ + DataLayout _data_layout; /**< Data layout to be used at run-time */ Size2D _padding_left; int _block_shape_x; diff --git a/src/core/NEON/kernels/NEBatchToSpaceLayerKernel.cpp b/src/core/NEON/kernels/NEBatchToSpaceLayerKernel.cpp index d167cbb05d..c4c0f01f0f 100644 --- a/src/core/NEON/kernels/NEBatchToSpaceLayerKernel.cpp +++ b/src/core/NEON/kernels/NEBatchToSpaceLayerKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -82,7 +82,7 @@ Status validate_arguments_static(const ITensorInfo *input, const int block_shape } // namespace NEBatchToSpaceLayerKernel::NEBatchToSpaceLayerKernel() - : _input(nullptr), _block_shape(nullptr), _output(nullptr), _block_shape_x(), _block_shape_y() + : _input(nullptr), _block_shape(nullptr), _output(nullptr), _data_layout(DataLayout::UNKNOWN), _block_shape_x(), _block_shape_y() { } @@ -94,6 +94,7 @@ void NEBatchToSpaceLayerKernel::configure(const ITensor *input, const ITensor *b _input = input; _block_shape = block_shape; _output = output; + _data_layout = input->info()->data_layout(); // Configure kernel window Window win = calculate_max_window(*input->info(), Steps()); @@ -114,6 +115,7 @@ void NEBatchToSpaceLayerKernel::configure(const ITensor *input, const int32_t bl _output = output; _block_shape_x = block_shape_x; _block_shape_y = block_shape_y; + _data_layout = input->info()->data_layout(); // Configure kernel window Window win = calculate_max_window(*input->info(), Steps()); @@ -162,7 +164,7 @@ void NEBatchToSpaceLayerKernel::run(const Window &window, const ThreadInfo &info int batch_id = 0; // Main loop for NCHW and NHWC - if(_input->info()->data_layout() == DataLayout::NCHW) + if(_data_layout == DataLayout::NCHW) { do { diff --git a/src/core/NEON/kernels/NESpaceToBatchLayerKernel.cpp b/src/core/NEON/kernels/NESpaceToBatchLayerKernel.cpp index ba3377f13b..88ea44ae42 100644 --- a/src/core/NEON/kernels/NESpaceToBatchLayerKernel.cpp +++ b/src/core/NEON/kernels/NESpaceToBatchLayerKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -89,7 +89,7 @@ Status validate_arguments_static(const ITensorInfo *input, const int block_shape } // namespace NESpaceToBatchLayerKernel::NESpaceToBatchLayerKernel() - : _input(nullptr), _block_shape(nullptr), _paddings(nullptr), _output(nullptr), _padding_left(), _block_shape_x(), _block_shape_y() + : _input(nullptr), _block_shape(nullptr), _paddings(nullptr), _output(nullptr), _data_layout(DataLayout::UNKNOWN), _padding_left(), _block_shape_x(), _block_shape_y() { } @@ -102,6 +102,7 @@ void NESpaceToBatchLayerKernel::configure(const ITensor *input, const ITensor *b _block_shape = block_shape; _paddings = paddings; _output = output; + _data_layout = input->info()->data_layout(); // Configure kernel window Window win = calculate_max_window(*output->info(), Steps()); @@ -123,6 +124,7 @@ void NESpaceToBatchLayerKernel::configure(const ITensor *input, const int block_ _block_shape_x = block_shape_x; _block_shape_y = block_shape_y; _padding_left = padding_left; + _data_layout = input->info()->data_layout(); // Configure kernel window Window win = calculate_max_window(*output->info(), Steps()); @@ -160,21 +162,21 @@ void NESpaceToBatchLayerKernel::run(const Window &window, const ThreadInfo &info const size_t pad_left_y = *reinterpret_cast<const size_t *>(_paddings->ptr_to_element({ 1, 0 })); _padding_left = Size2D(pad_left_x, pad_left_y); } - const DataLayout data_layout = _input->info()->data_layout(); - const int height_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT); - const int width_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH); - const int element_size = _input->info()->element_size(); + const int height_idx = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::HEIGHT); + const int width_idx = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::WIDTH); + const int batch_idx = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::BATCHES); + const int element_size = _input->info()->element_size(); const size_t height = _input->info()->dimension(height_idx); const size_t width = _input->info()->dimension(width_idx); - const size_t batch_size = _input->info()->dimension(3); + const size_t batch_size = _input->info()->dimension(batch_idx); Window slice_out = window.first_slice_window_3D(); int batch_id = 0; // Main loop for NCHW and NHWC - if(_output->info()->data_layout() == DataLayout::NCHW) + if(_data_layout == DataLayout::NCHW) { do { |