diff options
| -rw-r--r-- | src/cpu/kernels/CpuAddKernel.cpp | 6 | ||||
| -rw-r--r-- | src/cpu/kernels/CpuElementwiseUnaryKernel.cpp | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/kernels/CpuAddKernel.cpp b/src/cpu/kernels/CpuAddKernel.cpp index 07c9a65e55..edbab37301 100644 --- a/src/cpu/kernels/CpuAddKernel.cpp +++ b/src/cpu/kernels/CpuAddKernel.cpp @@ -65,7 +65,7 @@ static const AddKernel available_kernels[] = "sve2_qu8_add", [](const AddSelectorData & data) { - return (data.dt == DataType::QASYMM8) && data.ci.has_sve(); + return (data.dt == DataType::QASYMM8) && data.ci.has_sve2(); }, REGISTER_QASYMM8_SVE(arm_compute::cpu::add_qasymm8_sve) }, @@ -73,7 +73,7 @@ static const AddKernel available_kernels[] = "sve2_qs8_add", [](const AddSelectorData & data) { - return (data.dt == DataType::QASYMM8_SIGNED) && data.ci.has_sve(); + return (data.dt == DataType::QASYMM8_SIGNED) && data.ci.has_sve2(); }, REGISTER_QASYMM8_SIGNED_SVE(arm_compute::cpu::add_qasymm8_signed_sve) }, @@ -81,7 +81,7 @@ static const AddKernel available_kernels[] = "sve2_qs16_add", [](const AddSelectorData & data) { - return (data.dt == DataType::QSYMM16) && data.ci.has_sve(); + return (data.dt == DataType::QSYMM16) && data.ci.has_sve2(); }, REGISTER_QSYMM16_SVE(arm_compute::cpu::add_qsymm16_sve) }, diff --git a/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp b/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp index c587e18850..3573fa0815 100644 --- a/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp +++ b/src/cpu/kernels/CpuElementwiseUnaryKernel.cpp @@ -62,17 +62,17 @@ static const ElementwiseUnaryKernel available_kernels[] = #if defined(ARM_COMPUTE_ENABLE_SVE) { "sve_fp32_elementwise_unary", - [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::F32; }, + [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::F32 && data.ci.has_sve(); }, REGISTER_FP32_SVE(arm_compute::cpu::elementwise_sve_op<float>), }, { "sve_fp16_elementwise_unary", - [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::F16; }, + [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::F16 && data.ci.has_sve(); }, REGISTER_FP16_SVE(arm_compute::cpu::elementwise_sve_op<__fp16>), }, { "sve_s32_elementwise_unary", - [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::S32; }, + [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::S32 && data.ci.has_sve(); }, REGISTER_INTEGER_SVE(arm_compute::cpu::elementwise_sve_op<int32_t>), }, #endif // defined(ARM_COMPUTE_ENABLE_SVE) @@ -85,7 +85,7 @@ static const ElementwiseUnaryKernel available_kernels[] = #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { "neon_fp16_elementwise_unary", - [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::F16; }, + [](const ElementwiseUnarySelectorData & data) { return data.dt == DataType::F16 && data.ci.has_fp16(); }, REGISTER_FP32_NEON(arm_compute::cpu::elementwise_op<__fp16>), }, #endif // defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) |