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| author | Michele Di Giorgio <michele.digiorgio@arm.com> | 2021-01-22 15:42:59 +0000 |
|---|---|---|
| committer | Michele Di Giorgio <michele.digiorgio@arm.com> | 2021-01-26 14:11:18 +0000 |
| commit | 1e0208a66ddea1be2d0e715591598c6704660811 (patch) | |
| tree | e0cdfe503ae54f892bea84ff3f0e916464828d42 /tests | |
| parent | 7249f154c2ec029f9b8c91f2bb845abe6590f7ed (diff) | |
| download | ComputeLibrary-1e0208a66ddea1be2d0e715591598c6704660811.tar.gz | |
Make CLArithmeticAddition kernel and function state-less
Resolves COMPMID-4006
Change-Id: Iddc32b0b250142aac9a4a7b9dc0eef462d196025
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4913
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/validation/reference/Logical.cpp | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tests/validation/reference/Logical.cpp b/tests/validation/reference/Logical.cpp index 099abf6f96..aab57d9118 100644 --- a/tests/validation/reference/Logical.cpp +++ b/tests/validation/reference/Logical.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -34,18 +34,18 @@ namespace validation namespace reference { template <typename T> -T logical_binary_op(arm_compute::kernels::LogicalOperation op, T src1, T src2) +T logical_binary_op(arm_compute::LogicalOperation op, T src1, T src2) { switch(op) { - case arm_compute::kernels::LogicalOperation::And: + case arm_compute::LogicalOperation::And: return src1 && src2; - case arm_compute::kernels::LogicalOperation::Or: + case arm_compute::LogicalOperation::Or: return src1 || src2; // The following operators are either invalid or not binary operator - case arm_compute::kernels::LogicalOperation::Not: + case arm_compute::LogicalOperation::Not: // fall through - case arm_compute::kernels::LogicalOperation::Unknown: + case arm_compute::LogicalOperation::Unknown: // fall through default: ARM_COMPUTE_ASSERT(true); @@ -57,7 +57,7 @@ template <size_t dim> struct BroadcastUnroll { template <typename T> - static void unroll(arm_compute::kernels::LogicalOperation op, const SimpleTensor<T> &src1, const SimpleTensor<T> &src2, SimpleTensor<T> &dst, + static void unroll(arm_compute::LogicalOperation op, const SimpleTensor<T> &src1, const SimpleTensor<T> &src2, SimpleTensor<T> &dst, Coordinates &id_src1, Coordinates &id_src2, Coordinates &id_dst) { const bool src1_is_broadcast = (src1.shape()[dim - 1] != dst.shape()[dim - 1]); @@ -84,7 +84,7 @@ template <> struct BroadcastUnroll<0> { template <typename T> - static void unroll(arm_compute::kernels::LogicalOperation op, const SimpleTensor<T> &src1, const SimpleTensor<T> &src2, SimpleTensor<T> &dst, + static void unroll(arm_compute::LogicalOperation op, const SimpleTensor<T> &src1, const SimpleTensor<T> &src2, SimpleTensor<T> &dst, Coordinates &id_src1, Coordinates &id_src2, Coordinates &id_dst) { dst[coord2index(dst.shape(), id_dst)] = logical_binary_op(op, src1[coord2index(src1.shape(), id_src1)], src2[coord2index(src2.shape(), id_src2)]); @@ -99,7 +99,7 @@ SimpleTensor<T> logical_or(const SimpleTensor<T> &src1, const SimpleTensor<T> &s Coordinates id_dst{}; SimpleTensor<T> dst{ TensorShape::broadcast_shape(src1.shape(), src2.shape()), src1.data_type() }; - BroadcastUnroll<Coordinates::num_max_dimensions>::unroll(arm_compute::kernels::LogicalOperation::Or, src1, src2, dst, id_src1, id_src2, id_dst); + BroadcastUnroll<Coordinates::num_max_dimensions>::unroll(arm_compute::LogicalOperation::Or, src1, src2, dst, id_src1, id_src2, id_dst); return dst; } @@ -112,7 +112,7 @@ SimpleTensor<T> logical_and(const SimpleTensor<T> &src1, const SimpleTensor<T> & Coordinates id_dst{}; SimpleTensor<T> dst{ TensorShape::broadcast_shape(src1.shape(), src2.shape()), src1.data_type() }; - BroadcastUnroll<Coordinates::num_max_dimensions>::unroll(arm_compute::kernels::LogicalOperation::And, src1, src2, dst, id_src1, id_src2, id_dst); + BroadcastUnroll<Coordinates::num_max_dimensions>::unroll(arm_compute::LogicalOperation::And, src1, src2, dst, id_src1, id_src2, id_dst); return dst; } |