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| author | Michele Di Giorgio <michele.digiorgio@arm.com> | 2021-04-30 18:30:41 +0100 |
|---|---|---|
| committer | Michele Di Giorgio <michele.digiorgio@arm.com> | 2021-05-04 14:00:17 +0000 |
| commit | 4fc10b3ae968bcdc8c1aaab358e93f2e1ba328dc (patch) | |
| tree | 4a60bf21291422c4626aea42e33182cf46a5fce8 /tests/validation/fixtures/FuseBatchNormalizationFixture.h | |
| parent | 6a5eee7f267290a4894639aa349c8d82c231812a (diff) | |
| download | ComputeLibrary-4fc10b3ae968bcdc8c1aaab358e93f2e1ba328dc.tar.gz | |
Turn EXPECT into ASSERT when testing invalid conditions
Relates to COMPMID-4385
Change-Id: Ibc1d67f766b7c1a399dbeacf26a4b9d9f7323785
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5549
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'tests/validation/fixtures/FuseBatchNormalizationFixture.h')
| -rw-r--r-- | tests/validation/fixtures/FuseBatchNormalizationFixture.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/tests/validation/fixtures/FuseBatchNormalizationFixture.h b/tests/validation/fixtures/FuseBatchNormalizationFixture.h index 552dc7c360..6fbabeee56 100644 --- a/tests/validation/fixtures/FuseBatchNormalizationFixture.h +++ b/tests/validation/fixtures/FuseBatchNormalizationFixture.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -96,14 +96,14 @@ protected: FunctionType fuse_batch_normalization; fuse_batch_normalization.configure(&w, &mean, &var, w_fused_to_use, b_fused_to_use, b_to_use, beta_to_use, gamma_to_use, _epsilon, fuse_bn_type); - ARM_COMPUTE_EXPECT(w.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(b.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(mean.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(var.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(w_fused.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(b_fused.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(beta.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(gamma.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_ASSERT(w.info()->is_resizable()); + ARM_COMPUTE_ASSERT(b.info()->is_resizable()); + ARM_COMPUTE_ASSERT(mean.info()->is_resizable()); + ARM_COMPUTE_ASSERT(var.info()->is_resizable()); + ARM_COMPUTE_ASSERT(w_fused.info()->is_resizable()); + ARM_COMPUTE_ASSERT(b_fused.info()->is_resizable()); + ARM_COMPUTE_ASSERT(beta.info()->is_resizable()); + ARM_COMPUTE_ASSERT(gamma.info()->is_resizable()); // Allocate tensors w.allocator()->allocate(); @@ -115,14 +115,14 @@ protected: beta.allocator()->allocate(); gamma.allocator()->allocate(); - ARM_COMPUTE_EXPECT(!w.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!b.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!mean.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!var.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!w_fused.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!b_fused.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!beta.info()->is_resizable(), framework::LogLevel::ERRORS); - ARM_COMPUTE_EXPECT(!gamma.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_ASSERT(!w.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!b.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!mean.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!var.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!w_fused.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!b_fused.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!beta.info()->is_resizable()); + ARM_COMPUTE_ASSERT(!gamma.info()->is_resizable()); // Fill tensors fill(AccessorType(w), 0U, -1.0f, 1.0f); |