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| author | Milos Puzovic <Milos.Puzovic@arm.com> | 2022-10-28 00:09:32 +0100 |
|---|---|---|
| committer | Viet-Hoa Do <viet-hoa.do@arm.com> | 2022-11-01 11:08:33 +0000 |
| commit | 199982fc01bcce10120cd6df03d11829a215c85c (patch) | |
| tree | 5a8884fa7a216edf8c18b5cfeb8b1537935b5e80 /src | |
| parent | 4b5f6efef15efd79727a58c520c92c9e7a084256 (diff) | |
| download | ComputeLibrary-199982fc01bcce10120cd6df03d11829a215c85c.tar.gz | |
Add threshold for floating-point SOFT_RELU activation
Added missing threshold for calculating SOFT_RELU when SVE and CL implementations are used. As a result removed from the testing bounds for input values that were set to be in the interval [-40, 40].
Resolves: COMPMID-5658
Signed-off-by: Milos Puzovic <Milos.Puzovic@arm.com>
Change-Id: I3d14df60125e36e4eb85aeb222f4fb0cc5741521
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8536
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/CL/cl_kernels/activation_float_helpers.h | 2 | ||||
| -rw-r--r-- | src/cpu/kernels/activation/generic/sve/fp32.cpp | 13 |
2 files changed, 8 insertions, 7 deletions
diff --git a/src/core/CL/cl_kernels/activation_float_helpers.h b/src/core/CL/cl_kernels/activation_float_helpers.h index 3f93c8d6fc..fe124bc032 100644 --- a/src/core/CL/cl_kernels/activation_float_helpers.h +++ b/src/core/CL/cl_kernels/activation_float_helpers.h @@ -52,7 +52,7 @@ #define lrelu_op(DATA_TYPE, VEC_SIZE, x, A_VAL, B_VAL) ((min(x, (DATA_TYPE)0.0) * (DATA_TYPE)A_VAL) + max(x, (DATA_TYPE)0.0)) // Soft RELU Activation -#define srelu_op(DATA_TYPE, VEC_SIZE, x, A_VAL, B_VAL) (log((DATA_TYPE)1.0 + exp(x))) +#define srelu_op(DATA_TYPE, VEC_SIZE, x, A_VAL, B_VAL) (select((log((DATA_TYPE)1.0 + exp(x))), x, (SELECT_VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))isgreaterequal(x,(DATA_TYPE)16.63553047))) // ELU Activation #define elu_op(DATA_TYPE, VEC_SIZE, x, A_VAL, B_VAL) (select(((DATA_TYPE)A_VAL * (exp(x) - (DATA_TYPE)1.0)), x, (SELECT_VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))isgreaterequal(x, (DATA_TYPE)0.0))) diff --git a/src/cpu/kernels/activation/generic/sve/fp32.cpp b/src/cpu/kernels/activation/generic/sve/fp32.cpp index b5490063cf..8d5d627d70 100644 --- a/src/cpu/kernels/activation/generic/sve/fp32.cpp +++ b/src/cpu/kernels/activation/generic/sve/fp32.cpp @@ -48,11 +48,12 @@ void sve_fp32_activation(const ITensor *src, ITensor *dst, const ActivationLayer Iterator input(src, win_collapsed); Iterator output(dst, win_collapsed); - const auto const_1 = svdup_n_f32(1.f); - const auto const_0 = svdup_n_f32(0.f); - const auto const_6 = svdup_n_f32(6.f); - const auto const_3 = svdup_n_f32(3.f); - const auto const_inv_6 = svdup_n_f32(0.166666667f); + const auto const_1 = svdup_n_f32(1.f); + const auto const_0 = svdup_n_f32(0.f); + const auto const_6 = svdup_n_f32(6.f); + const auto const_3 = svdup_n_f32(3.f); + const auto const_inv_6 = svdup_n_f32(0.166666667f); + const auto soft_relu_thresh = svdup_n_f32(16.63553047f); const auto va = svdup_n_f32(act_info.a()); const auto vb = svdup_n_f32(act_info.b()); @@ -93,7 +94,7 @@ void sve_fp32_activation(const ITensor *src, ITensor *dst, const ActivationLayer tmp = svadd_f32_z(pg, svmul_f32_z(pg, svmin_f32_z(pg, vin, const_0), va), svmax_f32_z(pg, vin, const_0)); break; case ActivationLayerInfo::ActivationFunction::SOFT_RELU: - tmp = svlog_f32_z(pg, svadd_f32_z(pg, const_1, svexp_f32_z(pg, vin))); + tmp = svsel_f32(svcmpgt_f32(pg, vin, soft_relu_thresh), vin, svlog_f32_z(pg, svadd_f32_z(pg, const_1, svexp_f32_z(pg, vin)))); break; case ActivationLayerInfo::ActivationFunction::ELU: tmp = svsel_f32(svcmpgt_f32(pg, vin, const_0), vin, svmul_f32_z(pg, va, svsub_f32_z(pg, svexp_f32_z(pg, vin), const_1))); |