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author | Michele Di Giorgio <michele.digiorgio@arm.com> | 2018-05-01 16:52:00 +0100 |
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committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:50:48 +0000 |
commit | 721756352e68602fe6aaf90b3ca031c947cd2176 (patch) | |
tree | 33921f257424524e82d8aeaec62447f4dbc5b440 /src | |
parent | c0f54434383f945d95f95549c1c4b0d5f5d2caff (diff) | |
download | ComputeLibrary-721756352e68602fe6aaf90b3ca031c947cd2176.tar.gz |
COMPMID-1107: Add support for ChannelShuffle in CL
Change-Id: I56d2a02b316f0c69ff1fd7220e732f775414fe69
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/129709
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/core/CL/CLKernelLibrary.cpp | 5 | ||||
-rw-r--r-- | src/core/CL/cl_kernels/channel_shuffle.cl | 132 | ||||
-rw-r--r-- | src/core/CL/kernels/CLChannelShuffleLayerKernel.cpp | 153 | ||||
-rw-r--r-- | src/runtime/CL/functions/CLChannelShuffleLayer.cpp | 43 |
4 files changed, 333 insertions, 0 deletions
diff --git a/src/core/CL/CLKernelLibrary.cpp b/src/core/CL/CLKernelLibrary.cpp index 577ba762cb..7e3eebc3b4 100644 --- a/src/core/CL/CLKernelLibrary.cpp +++ b/src/core/CL/CLKernelLibrary.cpp @@ -162,6 +162,7 @@ const std::map<std::string, std::string> CLKernelLibrary::_kernel_program_map = { "channel_combine_RGBA8888", "channel_combine.cl" }, { "channel_combine_UYVY422", "channel_combine.cl" }, { "channel_combine_YUYV422", "channel_combine.cl" }, + { "channel_shuffle_nchw", "channel_shuffle.cl" }, { "channel_extract_NV12", "channel_extract.cl" }, { "channel_extract_NV21", "channel_extract.cl" }, { "channel_extract_RGB888", "channel_extract.cl" }, @@ -416,6 +417,10 @@ const std::map<std::string, std::string> CLKernelLibrary::_program_source_map = #include "./cl_kernels/channel_extract.clembed" }, { + "channel_shuffle.cl", +#include "./cl_kernels/channel_shuffle.clembed" + }, + { "col2im.cl", #include "./cl_kernels/col2im.clembed" }, diff --git a/src/core/CL/cl_kernels/channel_shuffle.cl b/src/core/CL/cl_kernels/channel_shuffle.cl new file mode 100644 index 0000000000..d5cb10086e --- /dev/null +++ b/src/core/CL/cl_kernels/channel_shuffle.cl @@ -0,0 +1,132 @@ +/* +* Copyright (c) 2018 ARM Limited. +* +* SPDX-License-Identifier: MIT +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to +* deal in the Software without restriction, including without limitation the +* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or +* sell copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all +* copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +*/ +#include "helpers.h" + +#if defined(DATA_TYPE) && defined(BLOCK_SIZE) && defined(NUM_GROUPS) && defined(K) + +// Check valid BLOCK_SIZES +#if BLOCK_SIZE != 4 && BLOCK_SIZE != 8 && BLOCK_SIZE != 16 +#error "Only block sizes 4, 8 and 16 are supported" +#endif /* BLOCK_SIZE != 4 && BLOCK_SIZE != 8 && BLOCK_SIZE != 16 */ + +#define TYPE VEC_DATA_TYPE(DATA_TYPE, BLOCK_SIZE) + +/** Perfoms channel shuffle see https://arxiv.org/pdf/1707.01083.pdf for details. + * + * @note The number of groups should be given as a preprocessor argument using -DNUM_GROUPS=num_groups. e.g. -DNUM_GROUPS=2 + * @note The number of channels in each group should be given as a preprocessor argument using -DK=num. e.g. -DK=1 + * K is equal to num_channels / num_groups. + * + * @param[in] src_ptr Pointer to the source matrix. Supported data types: U8/S8/QS8/QASYMM8/U16/S16/QS16/F16/U32/S32/F32 + * @param[in] src_stride_x Stride of the first source tensor in X dimension (in bytes) + * @param[in] src_step_x src_stride_x * number of elements along X processed per workitem(in bytes) + * @param[in] src_stride_y Stride of the first source tensor in Y dimension (in bytes) + * @param[in] src_step_y src_stride_y * number of elements along Y processed per workitem(in bytes) + * @param[in] src_stride_z Stride of the first source tensor in Z dimension (in bytes) + * @param[in] src_step_z src_stride_z * number of elements along Z processed per workitem(in bytes) + * @param[in] src_offset_first_element_in_bytes The offset of the first element in the first source tensor + * @param[out] dst_ptr Pointer to the destination tensor. Supported data types: same as @p src_ptr + * @param[in] dst_stride_x Stride of the destination tensor in X dimension (in bytes) + * @param[in] dst_step_x output_stride_x * number of elements along X processed per workitem(in bytes) + * @param[in] dst_stride_y Stride of the destination tensor in Y dimension (in bytes) + * @param[in] dst_step_y output_stride_y * number of elements along Y processed per workitem(in bytes) + * @param[in] dst_stride_z Stride of the destination tensor in Z dimension (in bytes) + * @param[in] dst_step_z output_stride_z * number of elements along Z processed per workitem(in bytes) + * @param[in] dst_offset_first_element_in_bytes The offset of the first element in the destination tensor + */ +__kernel void channel_shuffle_nchw(TENSOR3D_DECLARATION(src), + TENSOR3D_DECLARATION(dst)) +{ + Tensor3D src = CONVERT_TO_TENSOR3D_STRUCT(src); + Tensor3D dst = CONVERT_TO_TENSOR3D_STRUCT_NO_STEP(dst); + + const uint curr_channel = get_global_id(2); // channel id of input + const uint group_id = curr_channel / NUM_GROUPS; // group id + const uint channel_id = curr_channel % NUM_GROUPS; // channel id within the group + + const uint x = get_global_id(0) * BLOCK_SIZE; + const uint y = get_global_id(1) * BLOCK_SIZE; + const uint z = channel_id * K + group_id; + + // Load the NxN block + TYPE u0 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 0, 0)); + TYPE u1 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 1, 0)); + TYPE u2 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 2, 0)); + TYPE u3 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 3, 0)); +#if BLOCK_SIZE > 4 + TYPE u4 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 4, 0)); + TYPE u5 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 5, 0)); + TYPE u6 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 6, 0)); + TYPE u7 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 7, 0)); +#if BLOCK_SIZE == 16 + TYPE u8 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 8, 0)); + TYPE u9 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 9, 0)); + TYPE u10 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 10, 0)); + TYPE u11 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 11, 0)); + TYPE u12 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 12, 0)); + TYPE u13 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 13, 0)); + TYPE u14 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 14, 0)); + TYPE u15 = VLOAD(BLOCK_SIZE)(0, (__global DATA_TYPE *)tensor3D_offset(&src, 0, 15, 0)); +#endif /* BLOCK_SIZE == 16 */ +#endif /* BLOCK_SIZE > 4 */ + + // Store blocks + VSTORE(BLOCK_SIZE) + (u0, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 0, z)); + VSTORE(BLOCK_SIZE) + (u1, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 1, z)); + VSTORE(BLOCK_SIZE) + (u2, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 2, z)); + VSTORE(BLOCK_SIZE) + (u3, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 3, z)); +#if BLOCK_SIZE > 4 + VSTORE(BLOCK_SIZE) + (u4, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 4, z)); + VSTORE(BLOCK_SIZE) + (u5, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 5, z)); + VSTORE(BLOCK_SIZE) + (u6, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 6, z)); + VSTORE(BLOCK_SIZE) + (u7, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 7, z)); +#if BLOCK_SIZE == 16 + VSTORE(BLOCK_SIZE) + (u8, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 8, z)); + VSTORE(BLOCK_SIZE) + (u9, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 9, z)); + VSTORE(BLOCK_SIZE) + (u10, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 10, z)); + VSTORE(BLOCK_SIZE) + (u11, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 11, z)); + VSTORE(BLOCK_SIZE) + (u12, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 12, z)); + VSTORE(BLOCK_SIZE) + (u13, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 13, z)); + VSTORE(BLOCK_SIZE) + (u14, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 14, z)); + VSTORE(BLOCK_SIZE) + (u15, 0, (__global DATA_TYPE *)tensor3D_offset(&dst, x, y + 15, z)); +#endif /* BLOCK_SIZE == 16 */ +#endif /* BLOCK_SIZE > 4 */ +} +#endif /* defined(DATA_TYPE) && defined(BLOCK_SIZE) && defined(NUM_GROUPS) && defined(K) */ diff --git a/src/core/CL/kernels/CLChannelShuffleLayerKernel.cpp b/src/core/CL/kernels/CLChannelShuffleLayerKernel.cpp new file mode 100644 index 0000000000..a667119c13 --- /dev/null +++ b/src/core/CL/kernels/CLChannelShuffleLayerKernel.cpp @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/core/CL/kernels/CLChannelShuffleLayerKernel.h" + +#include "arm_compute/core/CL/CLHelpers.h" +#include "arm_compute/core/CL/CLKernelLibrary.h" +#include "arm_compute/core/CL/ICLTensor.h" +#include "arm_compute/core/Error.h" +#include "arm_compute/core/Helpers.h" +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/core/Validate.h" +#include "arm_compute/core/Window.h" + +namespace arm_compute +{ +namespace +{ +Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output, unsigned int num_groups) +{ + ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::S8, DataType::QS8, DataType::QASYMM8, + DataType::U16, DataType::S16, DataType::QS16, + DataType::U32, DataType::S32, + DataType::F16, DataType::F32); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(num_groups < 2, "Channel shuffling with less than 2 groups would be inefficient"); + + const unsigned int channels = input->dimension(get_data_layout_dimension_index(input->data_layout(), DataLayoutDimension::CHANNEL)); + + ARM_COMPUTE_RETURN_ERROR_ON_MSG(num_groups == channels, "Channel shuffling with same number of groups as number of channels would be inefficient"); + // There cannot be more groups than channels + ARM_COMPUTE_RETURN_ERROR_ON(num_groups > channels); + ARM_COMPUTE_RETURN_ERROR_ON_MSG((channels % num_groups) != 0, "The number of channels must be a multiple of the number of groups"); + + // Checks performed when output is configured + if(output->total_size() != 0) + { + ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(input, output); + ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output); + } + + return Status{}; +} + +std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *output) +{ + // Output tensor auto initialization if not yet initialized + auto_init_if_empty(*output, *input->clone()); + + const unsigned int num_elems_processed_per_iteration = max_cl_vector_width / input->element_size(); + + // Configure kernel window + Window win = calculate_max_window(*input, Steps(num_elems_processed_per_iteration, num_elems_processed_per_iteration)); + AccessWindowRectangle input_access(input, 0, 0, num_elems_processed_per_iteration, num_elems_processed_per_iteration); + AccessWindowRectangle output_access(output, 0, 0, num_elems_processed_per_iteration, num_elems_processed_per_iteration); + + const bool window_changed = update_window_and_padding(win, input_access, output_access); + output_access.set_valid_region(win, input->valid_region()); + + Status err = (window_changed) ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!") : Status{}; + return std::make_pair(err, win); +} +} // namespace + +CLChannelShuffleLayerKernel::CLChannelShuffleLayerKernel() + : _input(nullptr), _output(nullptr) +{ +} + +void CLChannelShuffleLayerKernel::configure(const ICLTensor *input, ICLTensor *output, unsigned int num_groups) +{ + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + + _input = input; + _output = output; + + ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), num_groups)); + + const unsigned int channels = input->info()->dimension(get_data_layout_dimension_index(input->info()->data_layout(), DataLayoutDimension::CHANNEL)); + const unsigned int block_size = max_cl_vector_width / input->info()->element_size(); + + // Set kernel build options + CLBuildOptions build_opts; + build_opts.add_option("-DNUM_GROUPS=" + support::cpp11::to_string(num_groups)); + build_opts.add_option("-DK=" + support::cpp11::to_string(channels / num_groups)); + build_opts.add_option("-DBLOCK_SIZE=" + support::cpp11::to_string(block_size)); + switch(input->info()->element_size()) + { + case 1: + build_opts.add_option("-DDATA_TYPE=uchar"); + break; + case 2: + build_opts.add_option("-DDATA_TYPE=ushort"); + break; + case 4: + build_opts.add_option("-DDATA_TYPE=uint"); + break; + default: + ARM_COMPUTE_ERROR("Data type not supported"); + } + + // Create kernel + _kernel = static_cast<cl::Kernel>(CLKernelLibrary::get().create_kernel("channel_shuffle_nchw", build_opts.options())); + + // Configure kernel window + auto win_config = validate_and_configure_window(input->info(), output->info()); + ARM_COMPUTE_ERROR_THROW_ON(win_config.first); + ICLKernel::configure(win_config.second); +} + +Status CLChannelShuffleLayerKernel::validate(const ITensorInfo *input, const ITensorInfo *output, unsigned int num_groups) +{ + ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, num_groups)); + ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(input->clone().get(), output->clone().get()).first); + + return Status{}; +} + +void CLChannelShuffleLayerKernel::run(const Window &window, cl::CommandQueue &queue) +{ + ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this); + ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window); + + Window slice = window.first_slice_window_3D(); + do + { + unsigned int idx = 0; + add_3D_tensor_argument(idx, _input, slice); + add_3D_tensor_argument(idx, _output, slice); + enqueue(queue, *this, slice); + } + while(window.slide_window_slice_3D(slice)); +} +} // namespace arm_compute diff --git a/src/runtime/CL/functions/CLChannelShuffleLayer.cpp b/src/runtime/CL/functions/CLChannelShuffleLayer.cpp new file mode 100644 index 0000000000..ff50073f89 --- /dev/null +++ b/src/runtime/CL/functions/CLChannelShuffleLayer.cpp @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/runtime/CL/functions/CLChannelShuffleLayer.h" + +#include "arm_compute/core/CL/kernels/CLChannelShuffleLayerKernel.h" +#include "arm_compute/core/Types.h" +#include "support/ToolchainSupport.h" + +namespace arm_compute +{ +void CLChannelShuffleLayer::configure(const ICLTensor *input, ICLTensor *output, unsigned int num_groups) +{ + auto k = arm_compute::support::cpp14::make_unique<CLChannelShuffleLayerKernel>(); + k->configure(input, output, num_groups); + _kernel = std::move(k); +} + +Status CLChannelShuffleLayer::validate(const ITensorInfo *input, const ITensorInfo *output, unsigned int num_groups) +{ + return CLChannelShuffleLayerKernel::validate(input, output, num_groups); +} +} // namespace arm_compute |