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author | Manuel Bottini <manuel.bottini@arm.com> | 2021-06-09 16:37:32 +0100 |
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committer | Manuel Bottini <manuel.bottini@arm.com> | 2021-06-15 16:31:27 +0000 |
commit | 94f799e8f6f605333d40472860fb472e8ba6d83d (patch) | |
tree | ce528244814463ed42dc86a84d54ea870c75d592 /src/runtime/cpu/utils | |
parent | 36dff9f81e3a95aea19fcc7246a4896930a14bc6 (diff) | |
download | ComputeLibrary-94f799e8f6f605333d40472860fb472e8ba6d83d.tar.gz |
Fix incorrect memory handling in ported functions
Details of the functions:
- ClSoftmax
- CpuSoftmax
- CpuPool2d
Change-Id: Icd2c14d5df010c3b2301e2693ce6f414d7c61916
Resolves: COMPMID-4404
Signed-off-by: Manuel Bottini <manuel.bottini@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5797
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/runtime/cpu/utils')
-rw-r--r-- | src/runtime/cpu/utils/CpuAuxTensorHandler.h | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/src/runtime/cpu/utils/CpuAuxTensorHandler.h b/src/runtime/cpu/utils/CpuAuxTensorHandler.h new file mode 100644 index 0000000000..644018a718 --- /dev/null +++ b/src/runtime/cpu/utils/CpuAuxTensorHandler.h @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CPU_UTILS_CPU_AUX_TENSOR_HANDLER_H +#define ARM_COMPUTE_CPU_UTILS_CPU_AUX_TENSOR_HANDLER_H + +#include "arm_compute/core/ITensorPack.h" +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/runtime/Tensor.h" + +#include "support/Cast.h" + +namespace arm_compute +{ +namespace cpu +{ +/* Tensor handler to wrap and handle tensor allocations on workspace buffers */ +class CpuAuxTensorHandler +{ +public: + CpuAuxTensorHandler(int slot_id, TensorInfo &info, ITensorPack &pack, bool pack_inject = false) + : _tensor() + { + _tensor.allocator()->soft_init(info); + + ITensor *packed_tensor = utils::cast::polymorphic_downcast<ITensor *>(pack.get_tensor(slot_id)); + if((packed_tensor == nullptr) || (info.total_size() > packed_tensor->info()->total_size())) + { + _tensor.allocator()->allocate(); + if(pack_inject) + { + pack.add_tensor(slot_id, &_tensor); + _injected_tensor_pack = &pack; + _injected_slot_id = slot_id; + } + } + else + { + _tensor.allocator()->import_memory(packed_tensor->buffer()); + } + } + + CpuAuxTensorHandler(TensorInfo &info, ITensor &tensor) + : _tensor() + { + _tensor.allocator()->soft_init(info); + if(info.total_size() <= tensor.info()->total_size()) + { + _tensor.allocator()->import_memory(tensor.buffer()); + } + } + + CpuAuxTensorHandler(const CpuAuxTensorHandler &) = delete; + CpuAuxTensorHandler &operator=(const CpuAuxTensorHandler) = delete; + + ~CpuAuxTensorHandler() + { + if(_injected_tensor_pack) + { + _injected_tensor_pack->remove_tensor(_injected_slot_id); + } + } + + ITensor *get() + { + return &_tensor; + } + + ITensor *operator()() + { + return &_tensor; + } + +private: + Tensor _tensor{}; + ITensorPack *_injected_tensor_pack{ nullptr }; + int _injected_slot_id{ TensorType::ACL_UNKNOWN }; +}; +} // namespace cpu +} // namespace arm_compute +#endif /* ARM_COMPUTE_CPU_UTILS_CPU_AUX_TENSOR_HANDLER_H */
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