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| author | Michele Di Giorgio <michele.digiorgio@arm.com> | 2020-01-02 12:11:13 +0000 |
|---|---|---|
| committer | Giorgio Arena <giorgio.arena@arm.com> | 2020-01-10 18:08:22 +0000 |
| commit | 13ec5f0a09e038f12cbe0f3b119a215934b72b42 (patch) | |
| tree | 9a574b7d5227176d1fb9216587d30b60a97125b3 /src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp | |
| parent | 781d727a741eb264f0e6614b41780c05050972e3 (diff) | |
| download | ComputeLibrary-13ec5f0a09e038f12cbe0f3b119a215934b72b42.tar.gz | |
COMPMID-2800: Add support for QASYMM8_SIGNED in NEDepthwiseConvolutionLayer3x3Kernel
Change-Id: Ia5d23ff2c9e59c80ded2fac5ca02704214f0a01a
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/2537
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez <pablo.tello@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp')
| -rw-r--r-- | src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp b/src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp index 142f873ef4..e0094f4eec 100644 --- a/src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp +++ b/src/runtime/NEON/functions/assembly/NEDepthwiseConvolutionAssemblyDispatch.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -469,8 +469,12 @@ bool NEDepthwiseConvolutionAssemblyDispatch::is_optimized_supported(const ITenso } // Check data type - const DataType data_type = weights->data_type(); - bool is_data_type_valid = is_data_type_float(data_type) || is_data_type_quantized_asymmetric(data_type) || data_type == DataType::QSYMM8_PER_CHANNEL; + // TODO (COMPMID-3004): Add assembly optimized routine for QASYMM8_SIGNED NEDepthwiseConvolutionLayer + const DataType input_type = input->data_type(); + const bool is_input_type_valid = is_data_type_float(input_type) || input_type == DataType::QASYMM8; + const DataType weights_type = weights->data_type(); + const bool is_weights_type_valid = is_data_type_float(weights_type) || weights_type == DataType::QASYMM8 || weights_type == DataType::QASYMM8_SIGNED + || weights_type == DataType::QSYMM8_PER_CHANNEL; // Check weighs size std::set<unsigned int> supported_kernel_sizes = { 3, 5 }; @@ -496,12 +500,12 @@ bool NEDepthwiseConvolutionAssemblyDispatch::is_optimized_supported(const ITenso // TODO(COMPMID-2464): Enable once dilated conv with stride 2 is supported bool is_dilation_supported = ((dilation == Size2D(1U, 1U)) || ((dilation.x() == dilation.y()) && strides.first == 1)); - if(data_type == DataType::QSYMM8_PER_CHANNEL) + if(weights_type == DataType::QSYMM8_PER_CHANNEL) { is_dilation_supported = is_dilation_supported && (dilation == Size2D(1U, 1U)); } - return is_data_type_valid && weights_supported && supported_strides && supported_padding && (depth_multiplier == 1) && is_dilation_supported; + return is_input_type_valid && is_weights_type_valid && weights_supported && supported_strides && supported_padding && (depth_multiplier == 1) && is_dilation_supported; } void NEDepthwiseConvolutionAssemblyDispatch::run() |