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| author | David Mansell <David.Mansell@arm.com> | 2020-08-25 15:02:02 +0100 |
|---|---|---|
| committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2020-09-22 10:13:53 +0000 |
| commit | 9e698d55d861b3a2a2deb9486a75dd541e928705 (patch) | |
| tree | 4f7a25d8af58a5d714971635ad4ba36850cd6d6b /src/runtime/NEON/functions/NEReductionOperation.cpp | |
| parent | 047c6fcd2ead657ea251a251893767aa90d6bde3 (diff) | |
| download | ComputeLibrary-9e698d55d861b3a2a2deb9486a75dd541e928705.tar.gz | |
COMPMID-3757: (u)int8: Don't select the 16-bit route on A53 for cases with very few rows
Also added 2D version of the 16-bit route, and altered the selection
heuristic so that 2D mode will be used in cases where 1D mode won't
thread well.
Change-Id: I0057fde08456771dc0090ac51f50d82f8bb86044
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3903
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: SiCong Li <sicong.li@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/runtime/NEON/functions/NEReductionOperation.cpp')
0 files changed, 0 insertions, 0 deletions