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author | Michele Di Giorgio <michele.digiorgio@arm.com> | 2019-12-20 13:26:08 +0000 |
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committer | Michele Di Giorgio <michele.digiorgio@arm.com> | 2020-01-14 17:21:26 +0000 |
commit | cbbed288a71f2f048123db3cf396361e5d66ce93 (patch) | |
tree | bd48122e283272adb668a42097ea69ca3f0473a6 /src/runtime/CL/functions/CLPoolingLayer.cpp | |
parent | 70d33bdfd36e1b44b0573189dca67ed7c63dd59e (diff) | |
download | ComputeLibrary-cbbed288a71f2f048123db3cf396361e5d66ce93.tar.gz |
COMPMID-2991: Add support for QASYMM8_SIGNED in CL kernels/functions - part 2
Adding support for QASYMM8_SIGNED to the following CL kernels/functions:
- CLActivationLayerKernel/CLActivationLayer
- CLComparisonKernel/CLComparison
- CLConvertFullyConnectedWeightsKernel/CLConvertFullyConnectedWeights
- CLDeconvolutionLayerUpsampleKernel/CLDeconvolutionLayerUpsample
- CLDepthToSpaceLayerKernel/CLDepthToSpaceLayer
- CLDequantizationLayerKernel/CLDequantizationLayer
- CLGEMMMatrixVectorMultiplyKernel
- CLNormalizePlanarYUVLayerKernel
- CLPReluLayer
- CLPixelWiseMultiplicationKernel/CLPixelWiseMultiplication
- CLPoolingLayerKernel/CLPoolingLayer
Change-Id: I874bbb7c2b08baa9c5ff4c9e6bc8778b42a6bec5
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/2539
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/runtime/CL/functions/CLPoolingLayer.cpp')
-rw-r--r-- | src/runtime/CL/functions/CLPoolingLayer.cpp | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/src/runtime/CL/functions/CLPoolingLayer.cpp b/src/runtime/CL/functions/CLPoolingLayer.cpp index 086017a7fd..f3ea926ae7 100644 --- a/src/runtime/CL/functions/CLPoolingLayer.cpp +++ b/src/runtime/CL/functions/CLPoolingLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -28,8 +28,8 @@ #include "arm_compute/runtime/CL/CLScheduler.h" #include "support/ToolchainSupport.h" -using namespace arm_compute; - +namespace arm_compute +{ void CLPoolingLayer::configure(ICLTensor *input, ICLTensor *output, const PoolingLayerInfo &pool_info) { ARM_COMPUTE_ERROR_ON_NULLPTR(input); @@ -40,12 +40,14 @@ void CLPoolingLayer::configure(ICLTensor *input, ICLTensor *output, const Poolin k->configure(input, output, pool_info); _kernel = std::move(k); + const DataType data_type = input->info()->data_type(); + // Configure border depending on operation required (quantize border in case of asymmetric data_type) BorderMode border_mode{}; PixelValue pixel_value(0.f); - if(is_data_type_quantized_asymmetric(input->info()->data_type()) && !pool_info.exclude_padding()) + if(is_data_type_quantized_asymmetric(data_type) && !pool_info.exclude_padding()) { - pixel_value = PixelValue(static_cast<uint32_t>(input->info()->quantization_info().uniform().offset)); + pixel_value = PixelValue(0, data_type, input->info()->quantization_info()); } switch(input->info()->data_layout()) { @@ -54,9 +56,16 @@ void CLPoolingLayer::configure(ICLTensor *input, ICLTensor *output, const Poolin break; case DataLayout::NHWC: border_mode = BorderMode::CONSTANT; - if(PoolingType::MAX == pool_info.pool_type() && !is_data_type_quantized_asymmetric(input->info()->data_type())) + if(PoolingType::MAX == pool_info.pool_type()) { - pixel_value = PixelValue(std::numeric_limits<float>::lowest()); + if(is_data_type_quantized(data_type)) + { + std::tie(pixel_value, std::ignore) = get_min_max(data_type); + } + else + { + pixel_value = PixelValue(std::numeric_limits<float>::lowest()); + } } break; default: @@ -71,4 +80,5 @@ void CLPoolingLayer::configure(ICLTensor *input, ICLTensor *output, const Poolin Status CLPoolingLayer::validate(const ITensorInfo *input, const ITensorInfo *output, const PoolingLayerInfo &pool_info) { return CLPoolingLayerKernel::validate(input, output, pool_info); -}
\ No newline at end of file +} +} // namespace arm_compute
\ No newline at end of file |