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| author | Michael Tyler <michael.tyler@arm.com> | 2023-06-30 11:26:05 +0100 |
|---|---|---|
| committer | michael.tyler <michael.tyler@arm.com> | 2023-07-04 14:34:58 +0000 |
| commit | 8deee9bd9b9137c256c23b86be11dbf0466f3aa8 (patch) | |
| tree | ac80b3bdd992552b65e306b77f061484da0591ca /src/cpu | |
| parent | 19844f605f5e5b71d05164711dee13f8652adafe (diff) | |
| download | ComputeLibrary-8deee9bd9b9137c256c23b86be11dbf0466f3aa8.tar.gz | |
Depthwise channel pre-multiplication
Resolves: COMPMID-6337
Change-Id: Ie9097b3f56e8071426c621386a5988bd7f7e8ef2
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9852
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu')
3 files changed, 6 insertions, 7 deletions
diff --git a/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp b/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp index 8cda5c6afd..e092c836af 100644 --- a/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp +++ b/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.cpp @@ -363,9 +363,9 @@ size_t CpuDepthwiseConv2dAssemblyWrapperKernel::get_storage_size() const return _kernel_asm->get_storage_size(); } -size_t CpuDepthwiseConv2dAssemblyWrapperKernel::get_working_size(unsigned int num_threads, unsigned int num_input_channels) const +size_t CpuDepthwiseConv2dAssemblyWrapperKernel::get_working_size(unsigned int num_threads) const { - return _kernel_asm->get_working_size(num_threads, num_input_channels); + return _kernel_asm->get_working_size(num_threads); } bool CpuDepthwiseConv2dAssemblyWrapperKernel::is_configured() const diff --git a/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.h b/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.h index 16d3b21fe2..f61cb1b09c 100644 --- a/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.h +++ b/src/cpu/kernels/internal/CpuDepthwiseConv2dAssemblyWrapperKernel.h @@ -98,12 +98,11 @@ public: /** Get size of the workspace needed by the assembly kernel. * - * @param[in] num_threads Maximum number of threads that are going to be spawned. - * @param[in] num_input_channels Number of channels of the input tensor. + * @param[in] num_threads Maximum number of threads that are going to be spawned. * * @return size of workspace */ - size_t get_working_size(unsigned int num_threads, unsigned int num_input_channels) const; + size_t get_working_size(unsigned int num_threads) const; /** Was the asm kernel successfully configured? * diff --git a/src/cpu/operators/CpuDepthwiseConv2dAssemblyDispatch.cpp b/src/cpu/operators/CpuDepthwiseConv2dAssemblyDispatch.cpp index a5b9eca56e..d078155155 100644 --- a/src/cpu/operators/CpuDepthwiseConv2dAssemblyDispatch.cpp +++ b/src/cpu/operators/CpuDepthwiseConv2dAssemblyDispatch.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 Arm Limited. + * Copyright (c) 2019-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -77,7 +77,7 @@ void CpuDepthwiseConv2dAssemblyDispatch::configure(const ITensorInfo *src, // Compute memory requirements for assembly kernels constexpr size_t alignment = 4096; - _pImpl->mem_req.push_back({ TensorType::ACL_INT_0, dwc_wrapper->get_working_size(num_threads, src->dimension(0)), alignment }); + _pImpl->mem_req.push_back({ TensorType::ACL_INT_0, dwc_wrapper->get_working_size(num_threads), alignment }); _pImpl->mem_req.push_back({ TensorType::ACL_INT_1, dwc_wrapper->get_storage_size(), alignment }); _pImpl->asm_kernel = std::move(dwc_wrapper); } |