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| author | Freddie Liardet <frederick.liardet@arm.com> | 2021-10-18 13:28:57 +0100 |
|---|---|---|
| committer | Sheri Zhang <sheri.zhang@arm.com> | 2021-10-22 13:54:17 +0000 |
| commit | f727ef49e2109bdac105dd6575d2e336adf780a3 (patch) | |
| tree | bc7e9381fab039cd1281bf189188ece318a4a955 /src/cpu/operators/CpuDirectConv3d.h | |
| parent | 00ff6641b70382a7882b8a04fe67fb4a93ee5675 (diff) | |
| download | ComputeLibrary-f727ef49e2109bdac105dd6575d2e336adf780a3.tar.gz | |
Add uint8/int8 support to cpu conv3d
Add support for qasymm8/qasymm8_signed in cpu conv3d.
Resolves: COMPMID-4665
Signed-off-by: Freddie Liardet <frederick.liardet@arm.com>
Change-Id: I2450bb6f24969745c8b936f4b657bd406b788c57
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6478
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu/operators/CpuDirectConv3d.h')
| -rw-r--r-- | src/cpu/operators/CpuDirectConv3d.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/operators/CpuDirectConv3d.h b/src/cpu/operators/CpuDirectConv3d.h index f7c3099be0..cde01f07c2 100644 --- a/src/cpu/operators/CpuDirectConv3d.h +++ b/src/cpu/operators/CpuDirectConv3d.h @@ -65,6 +65,8 @@ public: * |:--------------|:------------------|:------|:--------------| * |F16 |F16 |F16 |F16 | * |F32 |F32 |F32 |F32 | + * |QASYMM8 |QASYMM8 |S32 |QASYMM8 | + * |QASYMM8_SIGNED |QASYMM8_SIGNED |S32 |QASYMM8_SIGNED | * * @param[in, out] src0 Input tensor info. * @param[in] src1 Set of kernels to convolve the input volume. |